NO155830B - Databehandlingssystem. - Google Patents
Databehandlingssystem. Download PDFInfo
- Publication number
- NO155830B NO155830B NO802760A NO802760A NO155830B NO 155830 B NO155830 B NO 155830B NO 802760 A NO802760 A NO 802760A NO 802760 A NO802760 A NO 802760A NO 155830 B NO155830 B NO 155830B
- Authority
- NO
- Norway
- Prior art keywords
- capability
- register
- pointer
- access
- instruction
- Prior art date
Links
- 238000000034 method Methods 0.000 claims abstract description 33
- 238000012545 processing Methods 0.000 claims description 15
- 230000000873 masking effect Effects 0.000 claims 1
- 238000012360 testing method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 238000012546 transfer Methods 0.000 description 3
- 102100021753 Cardiolipin synthase (CMP-forming) Human genes 0.000 description 2
- 101001091379 Homo sapiens Kallikrein-5 Proteins 0.000 description 2
- 102100034868 Kallikrein-5 Human genes 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 101000895518 Homo sapiens Cardiolipin synthase (CMP-forming) Proteins 0.000 description 1
- 101100256290 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) SCS3 gene Proteins 0.000 description 1
- 101100256289 Schizosaccharomyces pombe (strain 972 / ATCC 24843) fit1 gene Proteins 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001143 conditioned effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000003607 modifier Substances 0.000 description 1
- JDBZJNUHQINERI-UHFFFAOYSA-N n-(4-chlorophenyl)-5-nitrofuran-2-carboxamide Chemical compound O1C([N+](=O)[O-])=CC=C1C(=O)NC1=CC=C(Cl)C=C1 JDBZJNUHQINERI-UHFFFAOYSA-N 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
- Control Of Position, Course, Altitude, Or Attitude Of Moving Bodies (AREA)
- Train Traffic Observation, Control, And Security (AREA)
- Soundproofing, Sound Blocking, And Sound Damping (AREA)
- Control By Computers (AREA)
- Hardware Redundancy (AREA)
- Communication Control (AREA)
- Multi Processors (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB7933857A GB2059652B (en) | 1979-09-29 | 1979-09-29 | Memory protection system using capability registers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| NO802760L NO802760L (no) | 1981-03-30 |
| NO155830B true NO155830B (no) | 1987-02-23 |
Family
ID=10508177
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NO802760A NO155830B (no) | 1979-09-29 | 1980-09-17 | Databehandlingssystem. |
Country Status (18)
| Country | Link |
|---|---|
| US (1) | US4408274A (fr) |
| EP (1) | EP0026590B1 (fr) |
| JP (1) | JPS5657155A (fr) |
| KR (1) | KR860000838B1 (fr) |
| AT (1) | ATE3339T1 (fr) |
| AU (1) | AU540594B2 (fr) |
| CA (1) | CA1162655A (fr) |
| DE (1) | DE3063150D1 (fr) |
| DK (1) | DK409080A (fr) |
| ES (1) | ES495454A0 (fr) |
| GB (1) | GB2059652B (fr) |
| HK (1) | HK76884A (fr) |
| IE (1) | IE50161B1 (fr) |
| NO (1) | NO155830B (fr) |
| NZ (1) | NZ195063A (fr) |
| PT (1) | PT71825B (fr) |
| SG (1) | SG43684G (fr) |
| ZA (1) | ZA805537B (fr) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4500952A (en) * | 1980-05-23 | 1985-02-19 | International Business Machines Corporation | Mechanism for control of address translation by a program using a plurality of translation tables |
| US4528624A (en) * | 1981-03-25 | 1985-07-09 | International Business Machines Corporation | Method and apparatus for allocating memory space based upon free space in diverse memory devices |
| US4525780A (en) * | 1981-05-22 | 1985-06-25 | Data General Corporation | Data processing system having a memory using object-based information and a protection scheme for determining access rights to such information |
| GB8308149D0 (en) * | 1983-03-24 | 1983-05-05 | Int Computers Ltd | Computer system |
| US4891749A (en) * | 1983-03-28 | 1990-01-02 | International Business Machines Corporation | Multiprocessor storage serialization apparatus |
| JPS60110056A (ja) * | 1983-10-31 | 1985-06-15 | Nec Corp | デ−タ処理システムにおけるメモリのアドレス生成を動的に変更する方法 |
| JPH0782458B2 (ja) * | 1985-09-06 | 1995-09-06 | 株式会社日立製作所 | データ処理装置 |
| US4800524A (en) * | 1985-12-20 | 1989-01-24 | Analog Devices, Inc. | Modulo address generator |
| US4831517A (en) * | 1986-10-10 | 1989-05-16 | International Business Machines Corporation | Branch and return on address instruction and methods and apparatus for implementing same in a digital data processing system |
| US5175828A (en) * | 1989-02-13 | 1992-12-29 | Hewlett-Packard Company | Method and apparatus for dynamically linking subprogram to main program using tabled procedure name comparison |
| US4941175A (en) * | 1989-02-24 | 1990-07-10 | International Business Machines Corporation | Tamper-resistant method for authorizing access to data between a host and a predetermined number of attached workstations |
| US5075842A (en) * | 1989-12-22 | 1991-12-24 | Intel Corporation | Disabling tag bit recognition and allowing privileged operations to occur in an object-oriented memory protection mechanism |
| US5623621A (en) * | 1990-11-02 | 1997-04-22 | Analog Devices, Inc. | Apparatus for generating target addresses within a circular buffer including a register for storing position and size of the circular buffer |
| WO1992008186A1 (fr) * | 1990-11-02 | 1992-05-14 | Analog Devices, Inc. | Generateur d'adresses pour memoire tampon circulaire |
| IE910553A1 (en) * | 1991-02-19 | 1992-08-26 | Tolsys Ltd | Improvements in and relating to stable memory circuits |
| ES2128393T3 (es) | 1992-05-15 | 1999-05-16 | Addison M Fischer | Metodo y aparato para sistemas de ordenador con estructuras de datos de informacion para programas de autorizacion. |
| US5412717A (en) * | 1992-05-15 | 1995-05-02 | Fischer; Addison M. | Computer system security method and apparatus having program authorization information data structures |
| US5467473A (en) * | 1993-01-08 | 1995-11-14 | International Business Machines Corporation | Out of order instruction load and store comparison |
| US5513337A (en) * | 1994-05-25 | 1996-04-30 | Intel Corporation | System for protecting unauthorized memory accesses by comparing base memory address with mask bits and having attribute bits for identifying access operational mode and type |
| US5845331A (en) * | 1994-09-28 | 1998-12-01 | Massachusetts Institute Of Technology | Memory system including guarded pointers |
| US5995752A (en) * | 1998-02-03 | 1999-11-30 | International Business Machines Corporation | Use of language instructions and functions across multiple processing sub-environments |
| US6104873A (en) * | 1998-02-03 | 2000-08-15 | International Business Machines Corporation | Use of language instructions and functions across multiple processing sub-environments |
| US7020788B2 (en) | 2001-06-01 | 2006-03-28 | Microchip Technology Incorporated | Reduced power option |
| US7467178B2 (en) | 2001-06-01 | 2008-12-16 | Microchip Technology Incorporated | Dual mode arithmetic saturation processing |
| US7007172B2 (en) | 2001-06-01 | 2006-02-28 | Microchip Technology Incorporated | Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection |
| US7003543B2 (en) | 2001-06-01 | 2006-02-21 | Microchip Technology Incorporated | Sticky z bit |
| US6985986B2 (en) | 2001-06-01 | 2006-01-10 | Microchip Technology Incorporated | Variable cycle interrupt disabling |
| US6937084B2 (en) | 2001-06-01 | 2005-08-30 | Microchip Technology Incorporated | Processor with dual-deadtime pulse width modulation generator |
| US6934728B2 (en) | 2001-06-01 | 2005-08-23 | Microchip Technology Incorporated | Euclidean distance instructions |
| US6976158B2 (en) | 2001-06-01 | 2005-12-13 | Microchip Technology Incorporated | Repeat instruction with interrupt |
| US6975679B2 (en) | 2001-06-01 | 2005-12-13 | Microchip Technology Incorporated | Configuration fuses for setting PWM options |
| US20020184566A1 (en) | 2001-06-01 | 2002-12-05 | Michael Catherwood | Register pointer trap |
| US6952711B2 (en) | 2001-06-01 | 2005-10-04 | Microchip Technology Incorporated | Maximally negative signed fractional number multiplication |
| US7953773B2 (en) * | 2005-07-15 | 2011-05-31 | Oracle International Corporation | System and method for deterministic garbage collection in a virtual machine environment |
| US8364910B2 (en) * | 2007-03-08 | 2013-01-29 | Daniel Shawcross Wilkerson | Hard object: hardware protection for software objects |
| US9934166B2 (en) | 2010-12-10 | 2018-04-03 | Daniel Shawcross Wilkerson | Hard object: constraining control flow and providing lightweight kernel crossings |
| US9569612B2 (en) | 2013-03-14 | 2017-02-14 | Daniel Shawcross Wilkerson | Hard object: lightweight hardware enforcement of encapsulation, unforgeability, and transactionality |
| GB2564130B (en) | 2017-07-04 | 2020-10-07 | Advanced Risc Mach Ltd | An apparatus and method for controlling execution of instructions |
| US10642752B2 (en) * | 2017-07-28 | 2020-05-05 | Intel Corporation | Auxiliary processor resources |
| GB2592069B (en) * | 2020-02-17 | 2022-04-27 | Advanced Risc Mach Ltd | Address calculating instruction |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1329721A (en) * | 1970-05-26 | 1973-09-12 | Plessey Co Ltd | Data processing devices |
| JPS5040738B1 (fr) * | 1970-06-11 | 1975-12-26 | ||
| GB1344474A (en) * | 1971-03-04 | 1974-01-23 | Plessey Co Ltd | Fault detection and handling arrangements for use in data proces sing systems |
| GB1410631A (en) * | 1972-01-26 | 1975-10-22 | Plessey Co Ltd | Data processing system interrupt arrangements |
| US3905023A (en) * | 1973-08-15 | 1975-09-09 | Burroughs Corp | Large scale multi-level information processing system employing improved failsaft techniques |
| GB1548401A (en) * | 1975-10-08 | 1979-07-11 | Plessey Co Ltd | Data processing memory space allocation and deallocation arrangements |
| US4104721A (en) * | 1976-12-30 | 1978-08-01 | International Business Machines Corporation | Hierarchical security mechanism for dynamically assigning security levels to object programs |
| DE2837241C2 (de) * | 1978-08-25 | 1982-05-06 | Siemens AG, 1000 Berlin und 8000 München | Einrichtung zum Sichern von Daten gegen unberechtigten Zugriff |
-
1979
- 1979-09-29 GB GB7933857A patent/GB2059652B/en not_active Expired
-
1980
- 1980-09-05 AT AT80303124T patent/ATE3339T1/de not_active IP Right Cessation
- 1980-09-05 EP EP80303124A patent/EP0026590B1/fr not_active Expired
- 1980-09-05 CA CA000359590A patent/CA1162655A/fr not_active Expired
- 1980-09-05 DE DE8080303124T patent/DE3063150D1/de not_active Expired
- 1980-09-08 ZA ZA00805537A patent/ZA805537B/xx unknown
- 1980-09-09 AU AU62154/80A patent/AU540594B2/en not_active Ceased
- 1980-09-17 NO NO802760A patent/NO155830B/no unknown
- 1980-09-22 PT PT71825A patent/PT71825B/pt unknown
- 1980-09-26 NZ NZ195063A patent/NZ195063A/en unknown
- 1980-09-26 IE IE2026/80A patent/IE50161B1/en unknown
- 1980-09-26 DK DK409080A patent/DK409080A/da not_active Application Discontinuation
- 1980-09-29 KR KR1019800003775A patent/KR860000838B1/ko active IP Right Grant
- 1980-09-29 ES ES495454A patent/ES495454A0/es active Granted
- 1980-09-29 US US06/191,849 patent/US4408274A/en not_active Expired - Lifetime
- 1980-09-29 JP JP13573480A patent/JPS5657155A/ja active Pending
-
1984
- 1984-06-18 SG SG43684A patent/SG43684G/en unknown
- 1984-10-11 HK HK768/84A patent/HK76884A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IE50161B1 (en) | 1986-02-19 |
| EP0026590A3 (en) | 1981-08-05 |
| AU540594B2 (en) | 1984-11-29 |
| NZ195063A (en) | 1984-09-28 |
| HK76884A (en) | 1984-10-19 |
| PT71825A (en) | 1980-10-01 |
| PT71825B (en) | 1981-06-30 |
| EP0026590B1 (fr) | 1983-05-11 |
| JPS5657155A (en) | 1981-05-19 |
| AU6215480A (en) | 1981-05-21 |
| SG43684G (en) | 1985-09-13 |
| GB2059652A (en) | 1981-04-23 |
| US4408274A (en) | 1983-10-04 |
| DE3063150D1 (en) | 1983-06-16 |
| DK409080A (da) | 1981-03-30 |
| ATE3339T1 (de) | 1983-05-15 |
| ES8106811A1 (es) | 1981-09-01 |
| IE802026L (en) | 1981-03-29 |
| EP0026590A2 (fr) | 1981-04-08 |
| KR860000838B1 (ko) | 1986-07-02 |
| ZA805537B (en) | 1981-09-30 |
| NO802760L (no) | 1981-03-30 |
| CA1162655A (fr) | 1984-02-21 |
| GB2059652B (en) | 1983-08-24 |
| ES495454A0 (es) | 1981-09-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| NO155830B (no) | Databehandlingssystem. | |
| US4486831A (en) | Multi-programming data processing system process suspension | |
| US4794524A (en) | Pipelined single chip microprocessor having on-chip cache and on-chip memory management unit | |
| US3825902A (en) | Interlevel communication in multilevel priority interrupt system | |
| US4539637A (en) | Method and apparatus for handling interprocessor calls in a multiprocessor system | |
| US4527238A (en) | Cache with independent addressable data and directory arrays | |
| CA1223371A (fr) | Dispositif de controle de contournement pour ordinateur pipeline | |
| US4707784A (en) | Prioritized secondary use of a cache with simultaneous access | |
| EP0121700B1 (fr) | Appareil de sérialisation de mémoire pour ordinateur de multitraitement | |
| EP0464615A2 (fr) | Micro-ordinateur équipé d'un appareil de commande DMA | |
| WO1987005417A1 (fr) | Appareil de commande pour la preextraction d'instructions | |
| US3654621A (en) | Information processing system having means for dynamic memory address preparation | |
| EP0026587B1 (fr) | Système de traitement des données avec appareillage pour adresser des registres internes | |
| US4670836A (en) | Device for detecting an overlap of operands to be accessed | |
| EP0518479B1 (fr) | Système et méthode de traitement comprenant une sélection de mémoire | |
| US5179691A (en) | N-byte stack-oriented CPU using a byte-selecting control for enhancing a dual-operation with an M-byte instruction word user program where M<N<2M | |
| CA1308812C (fr) | Dispositif et methode de protection de memoire centrale utilisant des signaux d'acces | |
| US4547848A (en) | Access control processing system in computer system | |
| CA1302580C (fr) | Dispositif et methode de verrouillage pour la synchronisation desacces aux groupes de signaux en memoire centrale dans un systeme multiprocesseur de traitement de donnees | |
| JPH0668725B2 (ja) | データ処理システムにおける割込条件に応答する装置及び非同期割込条件に応答する方法 | |
| US5117491A (en) | Ring reduction logic using parallel determination of ring numbers in a plurality of functional units and forced ring numbers by instruction decoding | |
| KR930005767B1 (ko) | 마이크로프로그램 제어를 기초로한 데이타 처리장치 | |
| EP0098170B1 (fr) | Système de traitement de commande d'accès dans un système ordinateur | |
| JPH0412861B2 (fr) | ||
| JPS5824948A (ja) | オペランドのアドレス指定方法 |