NL8701406A - Relaxation oscillator with comparator bistable element - produces square wave output with minimal noise content - Google Patents

Abstract

The oscillator consists of a capacitor (1), fed by a charge and discharge circuit and a comparator flip-flop (5) which provides feedback. The charge and discharge circuit consists of a long-tailed pair of transistors (T3, T4) with a common emitter current source (14). One collector feeds the square wave output (u) across a load resistor (15), while the other charges the oscillator capacitor (1) whichis in parallel with another current source (13). The transistor bases are fed by the flip-flop outputs. The flip-flop (5) has a cross-coupling capacitor (c') which, together with the collector loads (10, 11) acts as a bandpass filter to eliminate noise. The flip-flop detects when the sawtooth signal (Vc) across the oscillator capacitor (1) is above a predetermined level.

Description

t 9 PHN 12.158 1 N.V. Philips' Gloeilampenfabrieken in Eindhoven Relaxation oscillator with comparator flip-flop circuit.

The invention relates to a relaxation oscillator with a capacitor, a charging and a discharging circuit, switching means for charging the capacitor in the first position by means of the charging circuit and in a second position in the capacitor 5 by means of the discharging circuit. and with a comparator flip-flop circuit, which, once the capacitor voltage has reached a first value, outputs a control signal to bring the switching means from the first to the second position, and which, once the capacitor voltage has reached a second value, control signal 10 to bring the switching means from the second to the first position.

Such a relaxation oscillator supplies a triangular voltage across the capacitor, the peak-peak value of which is determined by inter alia the said first and second voltage value, the hysteresis of the flip-flop circuit and the circular gain present at the switching moment.

Relaxation oscillators of the type described here are known from IEEE Journal of Solid State Circuits, Vol. SC-18, No. 6, December 1983, pages 794-801. In this article, explicitly or not, a number of possibilities are given to improve the noise behavior of the relaxation oscillators, namely: increasing the capacitor triangle voltage, increasing the circular gain at the switching moment, reducing the influence of the hysteresis of the flip-flop circuit and the rapid switching of the current with a fast flop-flop circuit.

The noise problem in relaxation oscillators can often be avoided by using quieter types of oscillators. However, in view of the advantages that a relaxation oscillator offers, such as a large tunable frequency range and the integrability on an IC, it is desirable to further improve the noise behavior of the relaxation oscillators.

The object of the invention is therefore to provide a relaxation 870 140 6 t PHN 12.158 2 oscillator, which exhibits a further improved noise behavior.

According to the invention, the relaxation oscillator as described in the preamble has the feature that the comparator flip-flop circuit is provided with bandwidth limiting means. This bandwidth limiting means is preferably provided at those points of the comparator flip-flop circuit where the input signal of this circuit is amplified; in particular they are included in a collector circuit of the comparator-10 flip-flop circuit.

The invention is based on the following insight. Rapid switching of the current with a fast flip-flop circuit is not in itself sufficient to obtain a further improved noise behavior: the switching must also always take place at the right time.

15 Switching implies sampling, which causes the noise of a very large number of top tires to fold back. By decreasing the noise bandwidth by means of bandwidth limiting means and only then switching the current quickly, that is to say after sampling has occurred, the noise of a less number of upper bands 20 is folded back. The result is that the switching moment is better averaged.

The design of relaxation oscillators should focus on the following four functions: the circuit should define the aforementioned first and second voltage values; the capacitor voltage should be compared to these voltage values; the charging and discharging current must be defined; and switching of these currents must be performed. The first two functions can be realized together in a separate comparator flip-flop circuit. If this circuit is formed in a simple embodiment by a separate differential amplifier comparator (WC), according to the invention the bandwidth limiting means are formed by the collector resistors of the two transistors of the differential amplifier comparator (WC) and connecting the two collectors. capacitor.

However, it is also possible to interweave all four of the aforementioned functions, as illustrated, for example, by the balanced relaxation oscillator in Figure 1 in the aforementioned 8701406 PHN 12.158 3 magazine article. In that case, the bandwidth limiting means could be formed by the resistors R1 indicated there and a capacitor to be arranged between the collectors of the transistors Q1 and Q2. A similar solution will also be possible with the embodiment shown in Figure 15 in the aforementioned magazine article.

The relaxation oscillator can further, also according to the invention, be included in an integrated circuit.

For application of the relaxation oscillator principle described here in a voltage controlled oscillator (VCO) with a large control range or in cases where low distortion is desired, the bandwidth limiting means can be made controllable and coupled to the oscillator frequency, for example via the varicap voltage of the capacitor or via the charging current. The goal then is to keep the percentage contribution of the delay introduced by the filter to the noise constant.

The invention will now be explained in more detail with reference to the appended drawing, of which: Figure 1 shows the principle diagram of the known type of relaxation oscillator; and

Figure 2 shows an exemplary embodiment of a relaxation oscillator according to the invention.

Corresponding parts in the figures are indicated with the same reference numerals. The exemplary embodiment to be described with reference to the drawing should not be regarded as a limitation of the invention; this exemplary embodiment serves only to illustrate the invention.

The relaxation 30 oscillator schematically shown in Figure 1 comprises a capacitor 1, a charging circuit 2, a discharging circuit 3, a switch 4 and a comparator flip-flop circuit 5. The charging and discharging circuit 2, 3, respectively, are indicated as current sources in Figure 1, which draw a current I, 21 respectively. If the switch 4 is in the open state (shown in Figure 1), the capacitor 1 is charged by the power source 2; when the switch 4 is closed, the current source 3 is supplied in addition to the current I supplied by the current source 2

8701406 3 PHN 12.158 4 also draw a discharge current I of the capacitor, so in total a current 21. The capacitance C of the capacitor 1 is further such that during charging and discharging there is an almost linear voltage variation across the capacitor, so that eventually an almost triangular voltage is applied across the capacitor.

The comparator flip-flop circuit 5 is here composed of two comparators 6 and 7 and a flip-flop 8. The capacitor voltage Vc is applied to the two comparators; in the comparator 6, the capacitor voltage Vc is compared with a first, higher voltage value Vref.1 and in the comparator 7 with a second, lower voltage value Vref.2. When the capacitor voltage Vc reaches the value Vref.1, the flip-flop 8 is switched in such a way that a control signal is produced, so that the switch 4 closes, so that the capacitor 1 is discharged and the capacitor voltage Vc therefore decreases. As soon as the capacitor voltage Vc has reached the value Vref.2, the flip-flop 8 is switched over and gives a control signal which opens the switch 4, so that the capacitor 1 is charged again and the capacitor voltage Vc therefore increases again.

In Figure 2, the comparator flip-flop circuit 5 is formed by a differential amplifier comparator WC, composed of transistors T1 and T2, a current source 9, collector resistors 10 and 11, which will preferably have an equal value R, and a capacitor 12 with a capacitance C ', which together with the resistors 10 and 11 form bandwidth limiting means, in this example a low-pass fliter. The charging and discharging circuit together with the switching means are constituted by a differential amplifier, which is composed of transistor T3 and T4 and current sources 13 and 14, which draw a current I and 21, respectively.

The capacitor 1 is here coupled to the supply voltage V. As soon as the transistor T3 is open and the transistor T4 is cut off, this capacitor is charged with the aid of the current source 13 and the capacitor voltage Vc rises until the (hitherto cut off) transistor T1 opens. The collector voltage of transistor T1 then decreases due to the voltage drop across resistor 10, 35 while also decreasing the base voltage of transistors T2 and T3 and blocking them. The collector voltage of the transistor T2 then rises, and with it the base voltage of the 8701406 i PHN 12.158 5 transistor T4, so that the latter opens again and the capacitor 1 is discharged again. The capacitor voltage Vc then decreases until the transistor T1 is turned off again. Thus, the capacitor voltage Vc takes a triangular shape; a corresponding voltage variation u corresponding to this is obtained at the collector of the transistor T3, to which a resistor 15 is connected.

The resistors 10 and 11 and the capacitor 12 form a low-pass filter for the noise at the collectors of the transistors T1 and T2, as a result of which the voltage there is better defined and thereby also the switching of the transistors in the relaxation oscillator as the capacitor voltage Vc the values Vref.1 and Vref.2 respectively.

87 0 HO6

Claims (5)

1. Relaxation oscillator with a capacitor, a charging and a discharging circuit, switching means for charging the capacitor with the aid of the charging circuit in a first position and for discharging the capacitor with the discharging circuit in a second position, and with a comparator flip-flop circuit which, once the capacitor voltage has reached a first value, outputs a control signal to bring the switching means from the first to the second position, and which, once the capacitor voltage has reached a second value, outputs a control signal to to bring switching means from the second 10 to the first position, characterized in that the comparator flip-flop circuit is provided with bandwidth limiting means. 2. Relaxation oscillator according to claim 1, characterized in that the bandwidth limiting means are arranged in those points of the comparator flip-flop circuit, where the input signal of this circuit is amplified. Relaxation oscillator according to claim 2, characterized in that the bandwidth limiting means are included in a collector circuit of the comparator flip-flop circuit. Relaxation oscillator according to claim 3, wherein the comparator flip-flop circuit is designed as a separate differential amplifier comparator (WC), characterized in that the bandwidth limiting means are formed by the collector resistors of the two transistors of the differential amplifier comparator. (WC) and a capacitor connecting both collectors. 25 Integrated circuit, provided with a relaxation oscillator according to any one of the preceding claims. 87 01 4 0 6