NL7706389A - SEMI-SHEET DEVICE WITH HIGH DEVICE VOLTAGE AND A PROCESS FOR MANUFACTURING IT. - Google Patents

SEMI-SHEET DEVICE WITH HIGH DEVICE VOLTAGE AND A PROCESS FOR MANUFACTURING IT.

Info

Publication number
NL7706389A
NL7706389A NL7706389A NL7706389A NL7706389A NL 7706389 A NL7706389 A NL 7706389A NL 7706389 A NL7706389 A NL 7706389A NL 7706389 A NL7706389 A NL 7706389A NL 7706389 A NL7706389 A NL 7706389A
Authority
NL
Netherlands
Prior art keywords
semi
manufacturing
sheet
voltage
device voltage
Prior art date
Application number
NL7706389A
Other languages
Dutch (nl)
Other versions
NL180265C (en
NL180265B (en
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of NL7706389A publication Critical patent/NL7706389A/en
Publication of NL180265B publication Critical patent/NL180265B/en
Application granted granted Critical
Publication of NL180265C publication Critical patent/NL180265C/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
NLAANVRAGE7706389,A 1976-06-21 1977-06-10 SEMICONDUCTOR FOR HIGH VOLTAGE. NL180265C (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69801476A 1976-06-21 1976-06-21

Publications (3)

Publication Number Publication Date
NL7706389A true NL7706389A (en) 1977-12-23
NL180265B NL180265B (en) 1986-08-18
NL180265C NL180265C (en) 1987-01-16

Family

ID=24803556

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7706389,A NL180265C (en) 1976-06-21 1977-06-10 SEMICONDUCTOR FOR HIGH VOLTAGE.

Country Status (5)

Country Link
JP (1) JPS538069A (en)
DE (1) DE2727487C2 (en)
FR (1) FR2356276A1 (en)
NL (1) NL180265C (en)
SE (1) SE7707190L (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1212404B (en) * 1979-02-22 1989-11-22 Rca Corp METHOD OF A SINGLE ATTACK FOR THE FORMATION OF A MESA PRESENTING A MULTIPLE WALL.
EP0144876B1 (en) * 1983-12-07 1988-03-09 BBC Brown Boveri AG Semiconductor device
DE3422051C2 (en) * 1984-06-14 1986-06-26 Brown, Boveri & Cie Ag, 6800 Mannheim Silicon semiconductor component with an edge contour produced by etching technology and a method for producing this component
JPS6190463A (en) * 1984-10-11 1986-05-08 Hitachi Ltd Semiconductor device
EP0389863B1 (en) * 1989-03-29 1996-12-18 Siemens Aktiengesellschaft Process for manufacturing a high-voltage withstanding planar p-n junction
DE10349908C5 (en) * 2003-10-25 2009-02-12 Semikron Elektronik Gmbh & Co. Kg Method for producing a doubly passivated power semiconductor device having a MESA edge structure

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1052661A (en) * 1963-01-30 1900-01-01
DE1539961A1 (en) * 1965-03-17 1970-01-22 Fuji Electric Co Ltd Semiconductor component with at least two pn junctions in the monocrystalline semiconductor body
DE1276207B (en) * 1966-09-09 1968-08-29 Licentia Gmbh Semiconductor component

Also Published As

Publication number Publication date
FR2356276A1 (en) 1978-01-20
JPS538069A (en) 1978-01-25
DE2727487C2 (en) 1985-05-15
NL180265C (en) 1987-01-16
SE7707190L (en) 1977-12-22
JPS5639057B2 (en) 1981-09-10
NL180265B (en) 1986-08-18
DE2727487A1 (en) 1977-12-29
FR2356276B1 (en) 1983-02-04

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Legal Events

Date Code Title Description
BB A search report has been drawn up
BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee