NL7414194A - Transfer of digital data between non-synchronised networks - uses digital circuits for phase control - Google Patents

Transfer of digital data between non-synchronised networks - uses digital circuits for phase control

Info

Publication number
NL7414194A
NL7414194A NL7414194A NL7414194A NL7414194A NL 7414194 A NL7414194 A NL 7414194A NL 7414194 A NL7414194 A NL 7414194A NL 7414194 A NL7414194 A NL 7414194A NL 7414194 A NL7414194 A NL 7414194A
Authority
NL
Netherlands
Prior art keywords
data
total
read
transfer
phase control
Prior art date
Application number
NL7414194A
Other languages
Dutch (nl)
Original Assignee
Nokia Oy Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Oy Ab filed Critical Nokia Oy Ab
Publication of NL7414194A publication Critical patent/NL7414194A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073—Bit stuffing, e.g. PDH

Abstract

Data is transferred between two networks through an 'elastic' memory (EM) such as an n-stage shift register, with n typically 8, into which data is fed synchronously with one network, and from which data is read synchronously with the other. The read and write switching is controlled by n-dividers (D1, D2). The divider outputs are compared in a digital comparator, the output of which feeds via logical gates (P1, P2) a counter (L), such that if the read pulse precedes the write and total is increased by a fixed amount (typically 1) and vice versa. Resetting of the counter may be at regular intervals, when the total is a measure of the phase difference, or after the total exceeds a predetermined value, equivalent to an integrated phase shift. Information transfer is modified in a standard manner if the phase shift is excessive.
NL7414194A 1973-10-30 1974-10-30 Transfer of digital data between non-synchronised networks - uses digital circuits for phase control NL7414194A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI335573A FI335573A (en) 1973-10-30 1973-10-30

Publications (1)

Publication Number Publication Date
NL7414194A true NL7414194A (en) 1975-05-02

Family

ID=8508324

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7414194A NL7414194A (en) 1973-10-30 1974-10-30 Transfer of digital data between non-synchronised networks - uses digital circuits for phase control

Country Status (3)

Country Link
FI (1) FI335573A (en)
NL (1) NL7414194A (en)
SE (1) SE7413562L (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0503732A2 (en) * 1991-03-15 1992-09-16 Philips Patentverwaltung GmbH Transmission system for synchronous digital hierarchy
EP0507385A2 (en) * 1991-04-04 1992-10-07 Philips Patentverwaltung GmbH Transmission system for synchronous digital hierarchy

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0503732A2 (en) * 1991-03-15 1992-09-16 Philips Patentverwaltung GmbH Transmission system for synchronous digital hierarchy
EP0503732B1 (en) * 1991-03-15 1998-01-28 Lucent Technologies Inc. Transmission method and system for synchronous digital hierarchy
EP0507385A2 (en) * 1991-04-04 1992-10-07 Philips Patentverwaltung GmbH Transmission system for synchronous digital hierarchy
EP0507385A3 (en) * 1991-04-04 1993-02-24 Philips Patentverwaltung Gmbh Transmission system for synchronous digital hierarchy

Also Published As

Publication number Publication date
SE7413562L (en) 1975-05-02
FI335573A (en) 1975-05-01

Similar Documents

Publication Publication Date Title
US2961535A (en) Automatic delay compensation
US2978680A (en) Precession storage delay circuit
KR910013272A (en) Method and apparatus for determining a comparison difference between two asynchronous pointers and a measurement difference between program values
US5206817A (en) Pipelined circuitry for allowing the comparison of the relative difference between two asynchronous pointers and a programmable value
NL7414194A (en) Transfer of digital data between non-synchronised networks - uses digital circuits for phase control
KR840009143A (en) Phase Modulated Digital Position Detector
US3324456A (en) Binary counter
US4426667A (en) Pulse width modulation system
US2896160A (en) Time interval encoder
US3262102A (en) Information buffer input circuit
GB1266047A (en)
GB1451202A (en) Apparatus for detect phase encoded data being read from a data storage subsystem
US5903144A (en) Circuit configuration for phase difference measurement
GB1293032A (en) Improvements in or relating to data signal buffer stores
US3870969A (en) Digital logic frequency control loop for multivibrator composed of two monostable elements
JPS5799841A (en) Automatic signal phase matching circuit
GB1018762A (en) Data transfer system
SU423176A1 (en) DEVICE FOR SHIFT INFORMATION
SU822298A1 (en) Device for monitoring fixed storage unit
SU474003A1 (en) Device for multiplying pulse frequency
JPS6233394Y2 (en)
JPS54126006A (en) Information service device
SU1120326A1 (en) Firmware control unit
JPS61243527A (en) Bit buffer circuit
SU366578A1 (en) COUNTER WITH INFORMATION REGENERATION "FOUNDATION i ^ 40EFT ^^