NL7300289A - - Google Patents

Info

Publication number
NL7300289A
NL7300289A NL7300289A NL7300289A NL7300289A NL 7300289 A NL7300289 A NL 7300289A NL 7300289 A NL7300289 A NL 7300289A NL 7300289 A NL7300289 A NL 7300289A NL 7300289 A NL7300289 A NL 7300289A
Authority
NL
Netherlands
Application number
NL7300289A
Other versions
NL162521C (nl
NL162521B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL7300289A publication Critical patent/NL7300289A/xx
Publication of NL162521B publication Critical patent/NL162521B/xx
Application granted granted Critical
Publication of NL162521C publication Critical patent/NL162521C/xx

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Shift Register Type Memory (AREA)
NL7300289.A 1972-01-11 1973-01-09 Synchronisatie-inrichting. NL162521C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7200790A FR2167259B1 (cg-RX-API-DMAC7.html) 1972-01-11 1972-01-11

Publications (3)

Publication Number Publication Date
NL7300289A true NL7300289A (cg-RX-API-DMAC7.html) 1973-07-13
NL162521B NL162521B (nl) 1979-12-17
NL162521C NL162521C (nl) 1980-05-16

Family

ID=9091714

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7300289.A NL162521C (nl) 1972-01-11 1973-01-09 Synchronisatie-inrichting.

Country Status (4)

Country Link
FR (1) FR2167259B1 (cg-RX-API-DMAC7.html)
GB (1) GB1366472A (cg-RX-API-DMAC7.html)
IT (1) IT980399B (cg-RX-API-DMAC7.html)
NL (1) NL162521C (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2479620B1 (fr) * 1980-03-28 1988-01-08 Thomson Csf Dispositif de synchronisation d'informations numeriques transmises par paquets et recepteur comportant un tel dispositif
JPS5923983A (ja) * 1982-07-30 1984-02-07 Toshiba Corp サンプリングパルス発生回路
JPS5986385A (ja) * 1982-11-09 1984-05-18 Toshiba Corp サンプリングパルス生成回路
US4617679A (en) * 1983-09-20 1986-10-14 Nec Electronics U.S.A., Inc. Digital phase lock loop circuit
IT1212796B (it) * 1983-12-12 1989-11-30 Ates Componenti Elettron Sincronizzatore di fase di tipo digitale per segnali isofrequenziali, particolarmente per demodulatore di segnali.
DE3635429A1 (de) * 1986-10-17 1988-04-21 Siemens Ag Phasenregelkreis
DE68919211T2 (de) * 1989-03-29 1995-05-11 Ibm Empfänger für seriellen Daten.
NZ261053A (en) * 1992-12-23 1997-11-24 Comstream Corp Signal controlled phase shifter
US5521499A (en) * 1992-12-23 1996-05-28 Comstream Corporation Signal controlled phase shifter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3024417A (en) * 1960-01-07 1962-03-06 Collins Radio Co Proportional digital synchronizer

Also Published As

Publication number Publication date
NL162521C (nl) 1980-05-16
FR2167259B1 (cg-RX-API-DMAC7.html) 1976-06-11
GB1366472A (en) 1974-09-11
DE2301315B2 (de) 1975-12-18
IT980399B (it) 1974-09-30
DE2301315A1 (de) 1973-07-12
NL162521B (nl) 1979-12-17
FR2167259A1 (cg-RX-API-DMAC7.html) 1973-08-24

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee