NL7113856A - - Google Patents

Info

Publication number
NL7113856A
NL7113856A NL7113856A NL7113856A NL7113856A NL 7113856 A NL7113856 A NL 7113856A NL 7113856 A NL7113856 A NL 7113856A NL 7113856 A NL7113856 A NL 7113856A NL 7113856 A NL7113856 A NL 7113856A
Authority
NL
Netherlands
Prior art keywords
strip
cut
lead frame
frame
lengthened
Prior art date
Application number
NL7113856A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL7113856A publication Critical patent/NL7113856A/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12188—All metal or with adjacent metals having marginal feature for indexing or weakened portion for severing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12361—All metal or with adjacent metals having aperture or cut
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528—Semiconductor component

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
NL7113856A 1970-10-09 1971-10-08 NL7113856A (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7960270A 1970-10-09 1970-10-09

Publications (1)

Publication Number Publication Date
NL7113856A true NL7113856A (https=) 1972-04-11

Family

ID=22151587

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7113856A NL7113856A (https=) 1970-10-09 1971-10-08

Country Status (4)

Country Link
US (1) US3795492A (https=)
JP (1) JPS559827B1 (https=)
DE (2) DE2150432C3 (https=)
NL (1) NL7113856A (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511072A (en) * 1974-06-21 1976-01-07 Fujitsu Ltd Jushifujigatahandotaisochino seizohoho
DE2930760A1 (de) * 1979-07-28 1981-02-12 Itt Ind Gmbh Deutsche Verfahren zum umhuellen von halbleiterbauelementen mittels spritzgiessens
EP0305589B1 (en) * 1982-10-04 1997-12-17 Texas Instruments Incorporated Method and apparatus for the encapsulation of a semiconductor device mounted on a lead-frame
US4504435A (en) * 1982-10-04 1985-03-12 Texas Instruments Incorporated Method for semiconductor device packaging
DE3320700A1 (de) * 1983-06-08 1984-12-13 Siemens AG, 1000 Berlin und 8000 München Verfahren zum kunststoffumhuellen von elektrischen bauelementen

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1015909A (en) * 1963-12-30 1966-01-05 Gen Micro Electronics Inc Method of and product for packaging electronic devices
US3440027A (en) * 1966-06-22 1969-04-22 Frances Hugle Automated packaging of semiconductors
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method
US3537175A (en) * 1966-11-09 1970-11-03 Advalloy Inc Lead frame for semiconductor devices and method for making same
US3469684A (en) * 1967-01-26 1969-09-30 Advalloy Inc Lead frame package for semiconductor devices and method for making same
US3436810A (en) * 1967-07-17 1969-04-08 Jade Corp Method of packaging integrated circuits
US3550766A (en) * 1969-03-03 1970-12-29 David Nixen Flat electronic package assembly
US3597666A (en) * 1969-11-26 1971-08-03 Fairchild Camera Instr Co Lead frame design
US3627901A (en) * 1969-12-19 1971-12-14 Texas Instruments Inc Composite electronic device package-connector unit
US3611061A (en) * 1971-07-07 1971-10-05 Motorola Inc Multiple lead integrated circuit device and frame member for the fabrication thereof

Also Published As

Publication number Publication date
DE2150432A1 (de) 1972-05-31
JPS559827B1 (https=) 1980-03-12
DE2150432C3 (de) 1980-01-10
DE7138302U (de) 1972-01-27
DE2150432B2 (de) 1979-05-23
US3795492A (en) 1974-03-05

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