NL7010420A - - Google Patents
Info
- Publication number
- NL7010420A NL7010420A NL7010420A NL7010420A NL7010420A NL 7010420 A NL7010420 A NL 7010420A NL 7010420 A NL7010420 A NL 7010420A NL 7010420 A NL7010420 A NL 7010420A NL 7010420 A NL7010420 A NL 7010420A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
- G06F7/5306—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/552—Powers or roots, e.g. Pythagorean sums
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/552—Powers or roots, e.g. Pythagorean sums
- G06F7/5525—Roots or inverse roots of single operands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
- H03M7/12—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word having two radices, e.g. binary-coded-decimal code
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3852—Calculation with most significant digit first
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3868—Bypass control, i.e. possibility to transfer an operand unchanged to the output
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
- G06F2207/5352—Non-restoring division not covered by G06F7/5375
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/552—Indexing scheme relating to groups G06F7/552 - G06F7/5525
- G06F2207/5523—Calculates a power, e.g. the square, of a number or a function, e.g. polynomials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
- Breeding Of Plants And Reproduction By Means Of Culturing (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US63555267A | 1967-05-02 | 1967-05-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7010420A true NL7010420A (de) | 1972-01-18 |
Family
ID=24548238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7010420A NL7010420A (de) | 1967-05-02 | 1970-07-14 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3535498A (de) |
| DE (1) | DE2034841C3 (de) |
| FR (1) | FR2098559A5 (de) |
| GB (2) | GB1323771A (de) |
| NL (1) | NL7010420A (de) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4181970A (en) * | 1973-10-08 | 1980-01-01 | Nippon Telegraph And Telephone Public Corporation | Digital attenuator for compressed PCM signals |
| US3983538A (en) * | 1974-05-01 | 1976-09-28 | International Business Machines Corporation | Universal LSI array logic modules with integral storage array and variable autonomous sequencing |
| JPS5731042A (en) * | 1980-07-31 | 1982-02-19 | Toshiba Corp | Multiplaying and dividing circuits |
| JPS62256129A (ja) * | 1986-04-30 | 1987-11-07 | Sony Corp | 演算処理装置 |
| US5047973A (en) * | 1989-04-26 | 1991-09-10 | Texas Instruments Incorporated | High speed numerical processor for performing a plurality of numeric functions |
| US5097434A (en) * | 1990-10-03 | 1992-03-17 | The Ohio State University Research Foundation | Hybrid signed-digit/logarithmic number system processor |
| US5235221A (en) * | 1992-04-08 | 1993-08-10 | Micron Technology, Inc. | Field programmable logic array with speed optimized architecture |
| US5287017A (en) * | 1992-05-15 | 1994-02-15 | Micron Technology, Inc. | Programmable logic device macrocell with two OR array inputs |
| US5384500A (en) * | 1992-05-15 | 1995-01-24 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes |
| US5300830A (en) * | 1992-05-15 | 1994-04-05 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control |
| US5220215A (en) * | 1992-05-15 | 1993-06-15 | Micron Technology, Inc. | Field programmable logic array with two or planes |
| US5331227A (en) * | 1992-05-15 | 1994-07-19 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line |
| US5298803A (en) * | 1992-07-15 | 1994-03-29 | Micron Semiconductor, Inc. | Programmable logic device having low power microcells with selectable registered and combinatorial output signals |
| US5333119A (en) * | 1992-09-30 | 1994-07-26 | Regents Of The University Of Minnesota | Digital signal processor with delayed-evaluation array multipliers and low-power memory addressing |
| KR0175974B1 (ko) * | 1995-07-04 | 1999-05-15 | 김은영 | 파이프라인 구조에 근거한 곱셈/나눗셈 공유 처리기 구조 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2934268A (en) * | 1956-05-28 | 1960-04-26 | Bell Telephone Labor Inc | Square root computer |
| GB1076186A (en) * | 1962-11-01 | 1967-07-19 | Gen Precision Inc | Improvements in or relating to digital computing circuits |
| US3374463A (en) * | 1964-12-23 | 1968-03-19 | Bell Telephone Labor Inc | Shift and rotate circuit for a data processor |
-
1967
- 1967-05-02 US US635552A patent/US3535498A/en not_active Expired - Lifetime
-
1970
- 1970-07-04 GB GB3251770A patent/GB1323771A/en not_active Expired
- 1970-07-04 GB GB4199072A patent/GB1323772A/en not_active Expired
- 1970-07-14 DE DE2034841A patent/DE2034841C3/de not_active Expired
- 1970-07-14 NL NL7010420A patent/NL7010420A/xx unknown
- 1970-07-20 FR FR7026721A patent/FR2098559A5/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2098559A5 (de) | 1972-03-10 |
| DE2034841B2 (de) | 1973-11-08 |
| US3535498A (en) | 1970-10-20 |
| GB1323772A (en) | 1973-07-18 |
| DE2034841C3 (de) | 1974-06-06 |
| GB1323771A (en) | 1973-07-18 |
| DE2034841A1 (de) | 1972-01-20 |