NL7004130A - - Google Patents
Info
- Publication number
- NL7004130A NL7004130A NL7004130A NL7004130A NL7004130A NL 7004130 A NL7004130 A NL 7004130A NL 7004130 A NL7004130 A NL 7004130A NL 7004130 A NL7004130 A NL 7004130A NL 7004130 A NL7004130 A NL 7004130A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
- H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US81310569A | 1969-04-03 | 1969-04-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7004130A true NL7004130A (enExample) | 1970-10-06 |
Family
ID=25211462
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7004130A NL7004130A (enExample) | 1969-04-03 | 1970-03-23 |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS505915B1 (enExample) |
| BE (1) | BE748240A (enExample) |
| DE (1) | DE2014155A1 (enExample) |
| FR (1) | FR2038223B1 (enExample) |
| GB (1) | GB1300727A (enExample) |
| NL (1) | NL7004130A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4021270A (en) * | 1976-06-28 | 1977-05-03 | Motorola, Inc. | Double master mask process for integrated circuit manufacture |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3200019A (en) * | 1962-01-19 | 1965-08-10 | Rca Corp | Method for making a semiconductor device |
| FR1520515A (fr) * | 1967-02-07 | 1968-04-12 | Radiotechnique Coprim Rtc | Circuits intégrés comportant des transistors de types opposés et leurs procédésde fabrication |
-
1970
- 1970-03-23 GB GB03904/70A patent/GB1300727A/en not_active Expired
- 1970-03-23 NL NL7004130A patent/NL7004130A/xx unknown
- 1970-03-24 DE DE19702014155 patent/DE2014155A1/de active Pending
- 1970-03-31 JP JP45026915A patent/JPS505915B1/ja active Pending
- 1970-03-31 BE BE748240D patent/BE748240A/xx unknown
- 1970-04-02 FR FR7011998A patent/FR2038223B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS505915B1 (enExample) | 1975-03-08 |
| GB1300727A (en) | 1972-12-20 |
| FR2038223B1 (enExample) | 1977-03-18 |
| BE748240A (fr) | 1970-09-30 |
| FR2038223A1 (enExample) | 1971-01-08 |
| DE2014155A1 (de) | 1971-04-15 |