NL6915569A - - Google Patents

Info

Publication number
NL6915569A
NL6915569A NL6915569A NL6915569A NL6915569A NL 6915569 A NL6915569 A NL 6915569A NL 6915569 A NL6915569 A NL 6915569A NL 6915569 A NL6915569 A NL 6915569A NL 6915569 A NL6915569 A NL 6915569A
Authority
NL
Netherlands
Application number
NL6915569A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP43074653A external-priority patent/JPS497632B1/ja
Priority claimed from JP43088214A external-priority patent/JPS4831033B1/ja
Priority claimed from JP43092354A external-priority patent/JPS5123863B1/ja
Application filed filed Critical
Publication of NL6915569A publication Critical patent/NL6915569A/xx

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40Crystalline structures
    • H10D62/405Orientations of crystalline planes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/115Orientation
NL6915569A 1968-10-15 1969-10-15 NL6915569A (en, 2012)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP43074653A JPS497632B1 (en, 2012) 1968-10-15 1968-10-15
JP43088214A JPS4831033B1 (en, 2012) 1968-12-03 1968-12-03
JP43092354A JPS5123863B1 (en, 2012) 1968-12-18 1968-12-18

Publications (1)

Publication Number Publication Date
NL6915569A true NL6915569A (en, 2012) 1970-04-17

Family

ID=27301575

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6915569A NL6915569A (en, 2012) 1968-10-15 1969-10-15

Country Status (3)

Country Link
US (1) US3612960A (en, 2012)
DE (1) DE1951986A1 (en, 2012)
NL (1) NL6915569A (en, 2012)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL171309C (nl) * 1970-03-02 1983-03-01 Hitachi Ltd Werkwijze voor de vervaardiging van een halfgeleiderlichaam, waarbij een laag van siliciumdioxyde wordt gevormd op een oppervlak van een monokristallijn lichaam van silicium.
JPS5624380B2 (en, 2012) * 1973-07-13 1981-06-05
FR2396418A1 (fr) * 1977-06-29 1979-01-26 Tokyo Shibaura Electric Co Dispositif a semi-conducteurs integre dont les caracteristiques ne sont pas alterees par l'encapsulage
US4768076A (en) * 1984-09-14 1988-08-30 Hitachi, Ltd. Recrystallized CMOS with different crystal planes
US4777517A (en) * 1984-11-29 1988-10-11 Fujitsu Limited Compound semiconductor integrated circuit device
WO1990007796A1 (en) * 1989-01-03 1990-07-12 Massachusetts Institute Of Technology Insulator films on diamond
JP3017860B2 (ja) * 1991-10-01 2000-03-13 株式会社東芝 半導体基体およびその製造方法とその半導体基体を用いた半導体装置
JP3187109B2 (ja) * 1992-01-31 2001-07-11 キヤノン株式会社 半導体部材およびその製造方法
US5459085A (en) * 1994-05-13 1995-10-17 Lsi Logic Corporation Gate array layout to accommodate multi angle ion implantation
US5729045A (en) * 1996-04-02 1998-03-17 Advanced Micro Devices, Inc. Field effect transistor with higher mobility
US7186622B2 (en) * 2004-07-15 2007-03-06 Infineon Technologies Ag Formation of active area using semiconductor growth process without STI integration
US7298009B2 (en) 2005-02-01 2007-11-20 Infineon Technologies Ag Semiconductor method and device with mixed orientation substrate
CN100508144C (zh) * 2005-06-20 2009-07-01 日本电信电话株式会社 金刚石半导体元件及其制造方法
US8530355B2 (en) * 2005-12-23 2013-09-10 Infineon Technologies Ag Mixed orientation semiconductor device and method
US20070190795A1 (en) * 2006-02-13 2007-08-16 Haoren Zhuang Method for fabricating a semiconductor device with a high-K dielectric
JP7078947B2 (ja) * 2017-02-06 2022-06-01 信越化学工業株式会社 ダイヤモンド製膜用下地基板及びそれを用いたダイヤモンド基板の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3152023A (en) * 1961-10-25 1964-10-06 Cutler Hammer Inc Method of making semiconductor devices
NL297836A (en, 2012) * 1962-09-14
US3476991A (en) * 1967-11-08 1969-11-04 Texas Instruments Inc Inversion layer field effect device with azimuthally dependent carrier mobility

Also Published As

Publication number Publication date
US3612960A (en) 1971-10-12
DE1951986A1 (de) 1970-04-16

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