NL6807952A - - Google Patents
Info
- Publication number
- NL6807952A NL6807952A NL6807952A NL6807952A NL6807952A NL 6807952 A NL6807952 A NL 6807952A NL 6807952 A NL6807952 A NL 6807952A NL 6807952 A NL6807952 A NL 6807952A NL 6807952 A NL6807952 A NL 6807952A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/115—Orientation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES0110700 | 1967-07-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
NL6807952A true NL6807952A (ko) | 1969-01-08 |
Family
ID=7530427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL6807952A NL6807952A (ko) | 1967-07-06 | 1968-06-06 |
Country Status (6)
Country | Link |
---|---|
US (1) | US3583857A (ko) |
CH (1) | CH483121A (ko) |
FR (1) | FR1575985A (ko) |
GB (1) | GB1170912A (ko) |
NL (1) | NL6807952A (ko) |
SE (1) | SE350653B (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2020531C2 (de) * | 1970-04-27 | 1982-10-21 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung von Silizium-Höchstfrequenz-Planartransistoren |
JP2006148050A (ja) * | 2004-10-21 | 2006-06-08 | Seiko Epson Corp | 薄膜トランジスタ、電気光学装置、及び電子機器 |
-
1968
- 1968-06-06 NL NL6807952A patent/NL6807952A/xx unknown
- 1968-07-03 US US742263A patent/US3583857A/en not_active Expired - Lifetime
- 1968-07-04 CH CH1004568A patent/CH483121A/de not_active IP Right Cessation
- 1968-07-05 SE SE09329/68A patent/SE350653B/xx unknown
- 1968-07-05 FR FR1575985D patent/FR1575985A/fr not_active Expired
- 1968-07-05 GB GB32114/68A patent/GB1170912A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
CH483121A (de) | 1969-12-15 |
SE350653B (ko) | 1972-10-30 |
DE1614553B2 (de) | 1975-10-23 |
GB1170912A (en) | 1969-11-19 |
FR1575985A (ko) | 1969-07-25 |
DE1614553A1 (de) | 1970-08-20 |
US3583857A (en) | 1971-06-08 |