NL6706649A - - Google Patents

Info

Publication number
NL6706649A
NL6706649A NL6706649A NL6706649A NL6706649A NL 6706649 A NL6706649 A NL 6706649A NL 6706649 A NL6706649 A NL 6706649A NL 6706649 A NL6706649 A NL 6706649A NL 6706649 A NL6706649 A NL 6706649A
Authority
NL
Netherlands
Application number
NL6706649A
Other versions
NL154872B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6706649A publication Critical patent/NL6706649A/xx
Publication of NL154872B publication Critical patent/NL154872B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S206/00Special receptacle or package
    • Y10S206/82Separable, striplike plural articles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S228/00Metal fusion bonding
    • Y10S228/903Metal to nonmetal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49204Contact or terminal manufacturing
    • Y10T29/49208Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49222Contact or terminal manufacturing by assembling plural parts forming array of contacts or terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Manufacture Of Electron Tubes, Discharge Lamp Vessels, Lead-In Wires, And The Like (AREA)
  • Joining Of Glass To Other Materials (AREA)
NL676706649A 1966-05-16 1967-05-12 Een werkwijze voor het vervaardigen van omhulsels voor halfgeleiderelementen en voor geintegreerde halfgeleiderschakelingen en omhulsels vervaardigd volgens de werkwijze. NL154872B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US55817266A 1966-05-16 1966-05-16

Publications (2)

Publication Number Publication Date
NL6706649A true NL6706649A (de) 1967-11-17
NL154872B NL154872B (nl) 1977-10-17

Family

ID=24228485

Family Applications (1)

Application Number Title Priority Date Filing Date
NL676706649A NL154872B (nl) 1966-05-16 1967-05-12 Een werkwijze voor het vervaardigen van omhulsels voor halfgeleiderelementen en voor geintegreerde halfgeleiderschakelingen en omhulsels vervaardigd volgens de werkwijze.

Country Status (7)

Country Link
US (1) US3444619A (de)
BE (1) BE698414A (de)
CH (1) CH475651A (de)
DE (1) DE1614975C3 (de)
GB (1) GB1188375A (de)
NL (1) NL154872B (de)
SE (1) SE357098B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3832770A (en) * 1969-10-24 1974-09-03 Amp Inc Electrical connectors
US3636235A (en) * 1970-06-11 1972-01-18 Sealtronics Inc Header having high-density conductor arrangement and method of making same
US3977075A (en) * 1971-10-28 1976-08-31 Amp Incorporated Method of fabricating multi-layer printed circuit board
US3893235A (en) * 1972-11-17 1975-07-08 Texas Instruments Inc Keyboard electronic apparatus and method of making
US3833753A (en) * 1972-11-30 1974-09-03 V Garboushian Hermetically sealed mounting structure for miniature electronic circuitry
JPS5848425B2 (ja) * 1980-04-10 1983-10-28 富士通株式会社 電子部品の包装方法
US4417396A (en) * 1981-11-02 1983-11-29 Elfab Corporation Method for manufacturing integrated circuit connectors
US4506438A (en) * 1981-11-02 1985-03-26 Elfab Corporation Apparatus for manufacturing integrated circuit connectors
GB8303555D0 (en) * 1983-02-09 1983-03-16 Strain Measurement Dev Ltd Strain gauges
US4628597A (en) * 1983-11-25 1986-12-16 Meehan Robert F Method of making an electrical connector
US4541174A (en) * 1984-06-04 1985-09-17 Allied Corporation Process of making a jack-type electrical connector
US4616406A (en) * 1984-09-27 1986-10-14 Advanced Micro Devices, Inc. Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein
US4665614A (en) * 1985-04-04 1987-05-19 Molex Incorporated Method of making a multiconductor electrical connector arrangement
US4856189A (en) * 1988-06-16 1989-08-15 Liao Pen Lin Method for manufacturing multiple push-button and conductive members for DIP switches
KR960000793B1 (ko) * 1993-04-07 1996-01-12 삼성전자주식회사 노운 굳 다이 어레이 및 그 제조방법
US6206272B1 (en) * 1999-04-08 2001-03-27 Intel Corporation Alignment weight for floating field pin design
CN107351013B (zh) * 2017-07-12 2022-12-16 蚌埠市创业电子有限责任公司 一种用于传感器基座引线与玻璃胚子的装配工装
CN112707631B (zh) * 2020-12-30 2023-10-31 中国电子科技集团公司第四十研究所 一种THz玻璃绝缘子的烧制组件及烧制方法
CN113035789B (zh) * 2021-02-07 2022-07-05 深圳市星欣磊实业有限公司 一种to封装的高精度夹具及其使用方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2899659A (en) * 1952-03-07 1959-08-11 mcllvaine
US2804581A (en) * 1953-10-05 1957-08-27 Sarkes Tarzian Semiconductor device and method of manufacture thereof
US3109225A (en) * 1958-08-29 1963-11-05 Rca Corp Method of mounting a semiconductor device
NL261280A (de) * 1960-02-25 1900-01-01
US3300832A (en) * 1963-06-28 1967-01-31 Rca Corp Method of making composite insulatorsemiconductor wafer
US3317983A (en) * 1963-11-25 1967-05-09 Philips Corp Method of making a vibratory capacitor
DE1514883C3 (de) * 1965-10-19 1975-02-27 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Verfahren zur serienmäßigen Herstellung von Halbleiterbauelementen

Also Published As

Publication number Publication date
NL154872B (nl) 1977-10-17
DE1614975A1 (de) 1971-01-14
DE1614975C3 (de) 1981-11-26
DE1614975B2 (de) 1977-11-24
SE357098B (de) 1973-06-12
BE698414A (de) 1967-11-13
US3444619A (en) 1969-05-20
CH475651A (it) 1969-07-15
GB1188375A (en) 1970-04-15

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Legal Events

Date Code Title Description
VJC Lapsed due to non-payment of the due maintenance fee for the patent or patent application
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: VARO