NL6616126A - - Google Patents

Info

Publication number
NL6616126A
NL6616126A NL6616126A NL6616126A NL6616126A NL 6616126 A NL6616126 A NL 6616126A NL 6616126 A NL6616126 A NL 6616126A NL 6616126 A NL6616126 A NL 6616126A NL 6616126 A NL6616126 A NL 6616126A
Authority
NL
Netherlands
Application number
NL6616126A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6616126A publication Critical patent/NL6616126A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1657Access to multiple memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663Access to shared memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • General Factory Administration (AREA)
  • Communication Control (AREA)
  • Devices For Executing Special Programs (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
NL6616126A 1965-11-16 1966-11-15 NL6616126A (xx)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US50816865A 1965-11-16 1965-11-16

Publications (1)

Publication Number Publication Date
NL6616126A true NL6616126A (xx) 1967-05-17

Family

ID=24021665

Family Applications (3)

Application Number Title Priority Date Filing Date
NL6616125A NL6616125A (xx) 1965-11-16 1966-11-15
NL6616126A NL6616126A (xx) 1965-11-16 1966-11-15
NL6616124A NL6616124A (xx) 1965-11-16 1966-11-15

Family Applications Before (1)

Application Number Title Priority Date Filing Date
NL6616125A NL6616125A (xx) 1965-11-16 1966-11-15

Family Applications After (1)

Application Number Title Priority Date Filing Date
NL6616124A NL6616124A (xx) 1965-11-16 1966-11-15

Country Status (8)

Country Link
US (1) US3487373A (xx)
JP (1) JPS4943819B1 (xx)
CH (2) CH483061A (xx)
DE (2) DE1524126A1 (xx)
FR (4) FR1513354A (xx)
GB (3) GB1170587A (xx)
NL (3) NL6616125A (xx)
SE (1) SE329029B (xx)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3569938A (en) * 1967-12-20 1971-03-09 Ibm Storage manager
JPS5169498U (xx) * 1974-11-28 1976-06-01
JPS5356934U (xx) * 1976-10-16 1978-05-16
US4149243A (en) * 1977-10-20 1979-04-10 International Business Machines Corporation Distributed control architecture with post and wait logic
DE3176857D1 (en) * 1980-12-29 1988-09-29 Ibm Data processing apparatus including a peripheral processing complex
US4550368A (en) * 1982-07-02 1985-10-29 Sun Microsystems, Inc. High-speed memory and memory management system
US4539637A (en) * 1982-08-26 1985-09-03 At&T Bell Laboratories Method and apparatus for handling interprocessor calls in a multiprocessor system
US4710868A (en) * 1984-06-29 1987-12-01 International Business Machines Corporation Interconnect scheme for shared memory local networks
US4991084A (en) * 1988-02-05 1991-02-05 International Business Machines Corporation N×M round robin order arbitrating switching matrix system
EP0730237A1 (en) * 1995-02-28 1996-09-04 Nec Corporation Multi-processor system with virtually addressable communication registers and controlling method thereof

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL223913A (xx) * 1957-01-11 1900-01-01
US3292151A (en) * 1962-06-04 1966-12-13 Ibm Memory expansion
US3270324A (en) * 1963-01-07 1966-08-30 Ibm Means of address distribution
US3311887A (en) * 1963-04-12 1967-03-28 Ibm File memory system with key to address transformation apparatus
US3311888A (en) * 1963-04-12 1967-03-28 Ibm Method and apparatus for addressing a memory
DE1218761B (de) * 1963-07-19 1966-06-08 International Business Machines Corporation, Armonk, N. Y. (V. St. A.) Datenspeidbereinrichtung
GB1051786A (xx) * 1963-10-23 1900-01-01
US3323109A (en) * 1963-12-30 1967-05-30 North American Aviation Inc Multiple computer-multiple memory system

Also Published As

Publication number Publication date
DE1524127B2 (de) 1976-02-26
SE329029B (xx) 1970-09-28
FR1513353A (fr) 1968-02-16
DE1524127A1 (de) 1970-01-08
NL6616124A (xx) 1967-05-17
GB1170587A (en) 1969-11-12
US3487373A (en) 1969-12-30
NL6616125A (xx) 1967-05-17
FR1513352A (fr) 1968-02-16
DE1524126A1 (de) 1970-06-25
FR1514164A (fr) 1968-02-23
JPS4943819B1 (xx) 1974-11-25
CH483061A (de) 1969-12-15
FR1513354A (fr) 1968-02-16
GB1170434A (en) 1969-11-12
GB1170586A (en) 1969-11-12
CH495584A (de) 1970-08-31

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