NL6606453A - - Google Patents
Info
- Publication number
- NL6606453A NL6606453A NL6606453A NL6606453A NL6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A NL 6606453 A NL6606453 A NL 6606453A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H10P50/691—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
-
- H10W10/019—
-
- H10W10/10—
-
- H10W74/01—
-
- H10W74/473—
-
- H10W90/00—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DES0097037 | 1965-05-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL6606453A true NL6606453A (enExample) | 1966-11-14 |
Family
ID=7520460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL6606453A NL6606453A (enExample) | 1965-05-11 | 1966-05-11 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3466741A (enExample) |
| AT (1) | AT262381B (enExample) |
| CH (1) | CH455052A (enExample) |
| DE (1) | DE1514460A1 (enExample) |
| GB (1) | GB1142816A (enExample) |
| NL (1) | NL6606453A (enExample) |
| SE (1) | SE315661B (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL6714336A (enExample) * | 1967-10-21 | 1969-04-23 | ||
| US3947952A (en) * | 1970-12-28 | 1976-04-06 | Bell Telephone Laboratories, Incorporated | Method of encapsulating beam lead semiconductor devices |
| US3660732A (en) * | 1971-02-08 | 1972-05-02 | Signetics Corp | Semiconductor structure with dielectric and air isolation and method |
| US4587719A (en) * | 1983-08-01 | 1986-05-13 | The Board Of Trustees Of The Leland Stanford Junior University | Method of fabrication of long arrays using a short substrate |
| US4815208A (en) * | 1987-05-22 | 1989-03-28 | Texas Instruments Incorporated | Method of joining substrates for planar electrical interconnections of hybrid circuits |
| US5874346A (en) * | 1996-05-23 | 1999-02-23 | Advanced Micro Devices, Inc. | Subtrench conductor formation with large tilt angle implant |
| US6182342B1 (en) | 1999-04-02 | 2001-02-06 | Andersen Laboratories, Inc. | Method of encapsulating a saw device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3079254A (en) * | 1959-01-26 | 1963-02-26 | George W Crowley | Photographic fabrication of semiconductor devices |
| US3158788A (en) * | 1960-08-15 | 1964-11-24 | Fairchild Camera Instr Co | Solid-state circuitry having discrete regions of semi-conductor material isolated by an insulating material |
| US3206647A (en) * | 1960-10-31 | 1965-09-14 | Sprague Electric Co | Semiconductor unit |
| DE1188731B (de) * | 1961-03-17 | 1965-03-11 | Intermetall | Verfahren zum gleichzeitigen Herstellen von mehreren Halbleiteranordnungen |
| US3300832A (en) * | 1963-06-28 | 1967-01-31 | Rca Corp | Method of making composite insulatorsemiconductor wafer |
| US3290753A (en) * | 1963-08-19 | 1966-12-13 | Bell Telephone Labor Inc | Method of making semiconductor integrated circuit elements |
| US3307239A (en) * | 1964-02-18 | 1967-03-07 | Bell Telephone Labor Inc | Method of making integrated semiconductor devices |
-
1965
- 1965-05-11 DE DE19651514460 patent/DE1514460A1/de active Pending
-
1966
- 1966-05-05 US US547990A patent/US3466741A/en not_active Expired - Lifetime
- 1966-05-09 CH CH671466A patent/CH455052A/de unknown
- 1966-05-09 AT AT436466A patent/AT262381B/de active
- 1966-05-10 GB GB20612/66A patent/GB1142816A/en not_active Expired
- 1966-05-11 SE SE6500/66A patent/SE315661B/xx unknown
- 1966-05-11 NL NL6606453A patent/NL6606453A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE1514460A1 (de) | 1969-05-22 |
| GB1142816A (en) | 1969-02-12 |
| AT262381B (de) | 1968-06-10 |
| SE315661B (enExample) | 1969-10-06 |
| US3466741A (en) | 1969-09-16 |
| CH455052A (de) | 1968-04-30 |