NL6604323A - - Google Patents

Info

Publication number
NL6604323A
NL6604323A NL6604323A NL6604323A NL6604323A NL 6604323 A NL6604323 A NL 6604323A NL 6604323 A NL6604323 A NL 6604323A NL 6604323 A NL6604323 A NL 6604323A NL 6604323 A NL6604323 A NL 6604323A
Authority
NL
Netherlands
Application number
NL6604323A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6604323A publication Critical patent/NL6604323A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • G06F7/508Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • Error Detection And Correction (AREA)
NL6604323A 1965-04-05 1966-04-01 NL6604323A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44532065A 1965-04-05 1965-04-05
US44532165A 1965-04-05 1965-04-05

Publications (1)

Publication Number Publication Date
NL6604323A true NL6604323A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1966-10-06

Family

ID=27034268

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6604323A NL6604323A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1965-04-05 1966-04-01

Country Status (3)

Country Link
CH (1) CH450769A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE1524141A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (1) NL6604323A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2621480B2 (ja) * 1989-06-06 1997-06-18 日本電気株式会社 加算回路検査装置

Also Published As

Publication number Publication date
DE1524141A1 (de) 1970-07-09
CH450769A (de) 1968-01-31

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