NL6504880A - - Google Patents

Info

Publication number
NL6504880A
NL6504880A NL6504880A NL6504880A NL6504880A NL 6504880 A NL6504880 A NL 6504880A NL 6504880 A NL6504880 A NL 6504880A NL 6504880 A NL6504880 A NL 6504880A NL 6504880 A NL6504880 A NL 6504880A
Authority
NL
Netherlands
Application number
NL6504880A
Other versions
NL151530B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6504880A publication Critical patent/NL6504880A/xx
Publication of NL151530B publication Critical patent/NL151530B/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285—Halt processor DMA

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
NL656504880A 1964-04-16 1965-04-15 Elektronisch digitaal computerstelsel. NL151530B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US360271A US3334333A (en) 1964-04-16 1964-04-16 Memory sharing between computer and peripheral units

Publications (2)

Publication Number Publication Date
NL6504880A true NL6504880A (xx) 1965-10-18
NL151530B NL151530B (nl) 1976-11-15

Family

ID=23417295

Family Applications (1)

Application Number Title Priority Date Filing Date
NL656504880A NL151530B (nl) 1964-04-16 1965-04-15 Elektronisch digitaal computerstelsel.

Country Status (8)

Country Link
US (1) US3334333A (xx)
JP (1) JPS5019896B1 (xx)
BE (1) BE662044A (xx)
CH (1) CH423309A (xx)
DE (1) DE1296430B (xx)
GB (1) GB1033874A (xx)
NL (1) NL151530B (xx)
SE (1) SE310278B (xx)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3426328A (en) * 1965-01-18 1969-02-04 Ncr Co Electronic data processing system
US3626427A (en) * 1967-01-13 1971-12-07 Ibm Large-scale data processing system
US4845437A (en) * 1985-07-09 1989-07-04 Minolta Camera Kabushiki Kaisha Synchronous clock frequency conversion circuit
JP2520872B2 (ja) * 1985-12-10 1996-07-31 オリンパス光学工業株式会社 画像表示装置
FR2728369B1 (fr) * 1994-12-19 1997-01-31 Sgs Thomson Microelectronics Procede et dispositif pour accroitre la securite d'un circuit integre

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL248274A (xx) * 1959-02-16
USRE26087E (en) * 1959-12-30 1966-09-20 Multi-computer system including multiplexed memories. lookahead, and address interleaving features
US3242467A (en) * 1960-06-07 1966-03-22 Ibm Temporary storage register
US3142043A (en) * 1960-07-28 1964-07-21 Honeywell Regulator Co Information handling apparatus for distributing data in a storage apparatus
NL280931A (xx) * 1961-07-14
BE622921A (xx) * 1961-10-06
FR1355865A (fr) * 1962-03-14 1964-03-20 Westinghouse Electric Corp Sélecteur de programme prioritaire
US3263219A (en) * 1963-01-03 1966-07-26 Sylvania Electric Prod Electronic data processing equipment

Also Published As

Publication number Publication date
DE1296430B (de) 1969-05-29
US3334333A (en) 1967-08-01
JPS5019896B1 (xx) 1975-07-10
NL151530B (nl) 1976-11-15
BE662044A (xx) 1965-08-02
DE1296430C2 (xx) 1973-07-12
GB1033874A (en) 1966-06-22
SE310278B (xx) 1969-04-21
CH423309A (fr) 1966-10-31

Similar Documents

Publication Publication Date Title
DE1296430C2 (xx)
AU4679664A (xx)
BE642458A (xx)
BE660971A (xx)
BE660734A (xx)
BE659595A (xx)
BE659512A (xx)
BE659345A (xx)
BE483969A (xx)
BE659189A (xx)
BE659124A (xx)
BE658933A (xx)
BE658752A (xx)
BE658721A (xx)
BE658413A (xx)
BE657747A (xx)
BE657653A (xx)
BE656615A (xx)
BE650584A (xx)
BE649029A (xx)
BE646329A (xx)
BE642974A (xx)
BE642797A (xx)
BE642770A (xx)
BE642741A (xx)

Legal Events

Date Code Title Description
VJC Lapsed due to non-payment of the due maintenance fee for the patent or patent application
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: NCR