NL2003511C2 - Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method. - Google Patents
Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method. Download PDFInfo
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- NL2003511C2 NL2003511C2 NL2003511A NL2003511A NL2003511C2 NL 2003511 C2 NL2003511 C2 NL 2003511C2 NL 2003511 A NL2003511 A NL 2003511A NL 2003511 A NL2003511 A NL 2003511A NL 2003511 C2 NL2003511 C2 NL 2003511C2
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- monocrystalline silicon
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- 238000000034 method Methods 0.000 title claims description 131
- 239000000758 substrate Substances 0.000 claims description 199
- 239000002019 doping agent Substances 0.000 claims description 111
- 125000004429 atom Chemical group 0.000 claims description 110
- 239000004065 semiconductor Substances 0.000 claims description 90
- 239000000463 material Substances 0.000 claims description 79
- 238000009792 diffusion process Methods 0.000 claims description 75
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 58
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 49
- 229910052710 silicon Inorganic materials 0.000 claims description 49
- 239000010703 silicon Substances 0.000 claims description 49
- 239000005368 silicate glass Substances 0.000 claims description 33
- 238000004519 manufacturing process Methods 0.000 claims description 29
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims description 26
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 25
- 125000004437 phosphorous atom Chemical group 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 15
- 239000007864 aqueous solution Substances 0.000 claims description 15
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 15
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 15
- 229910052796 boron Inorganic materials 0.000 claims description 14
- 239000007788 liquid Substances 0.000 claims description 13
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 12
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 11
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 229910052698 phosphorus Inorganic materials 0.000 claims description 9
- 239000011574 phosphorus Substances 0.000 claims description 9
- 230000000737 periodic effect Effects 0.000 claims description 8
- 239000002210 silicon-based material Substances 0.000 claims description 8
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 claims description 7
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 6
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 5
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 claims description 5
- 239000004327 boric acid Substances 0.000 claims description 4
- 238000005507 spraying Methods 0.000 claims description 4
- 239000003989 dielectric material Substances 0.000 claims description 3
- 238000005096 rolling process Methods 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical compound ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 claims 1
- 239000000969 carrier Substances 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 10
- 239000002800 charge carrier Substances 0.000 description 10
- 239000005388 borosilicate glass Substances 0.000 description 8
- 239000005360 phosphosilicate glass Substances 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 235000011007 phosphoric acid Nutrition 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000006731 degradation reaction Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- XGCTUKUCGUNZDN-UHFFFAOYSA-N [B].O=O Chemical compound [B].O=O XGCTUKUCGUNZDN-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 238000005381 potential energy Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-NJFSPNSNSA-N silicon-30 atom Chemical compound [30Si] XUIMIQQOPSSXEZ-NJFSPNSNSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Sustainable Development (AREA)
- Photovoltaic Devices (AREA)
Description
Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method
The present invention relates to a method for fabricating a photovoltaic cell, for 5 example a solar cell, comprising a semiconductor substrate having a front side and a back side, wherein an emitter and a back surface field portion are fabricated at the front side and back side, respectively. The present invention further relates to a photovoltaic cell that is obtained using such a method.
A photovoltaic cell, for example a solar cell, comprises a semiconductor substrate 10 having a front side and a back side. Depending on the design of the photovoltaic cell, non-rectifying electrical contacts that may connect the photovoltaic cell to an external electrical load are applied at both the front side and back side or only at the back side of the substrate.
At the front side radiation, for example sunlight, may be received. Electrical 15 contacts applied at the front side of the substrate are patterned such that blocking of the incident radiation is substantially minimized.
The semiconductor substrate comprises for example silicon-based material. To achieve high-performance photovoltaic cells, the silicon-based substrate material may have a monocrystalline crystal structure. In addition, the silicon-based substrate is 20 provided with dopant atoms to substantially achieve an n-type or p-type doping.
A photocurrent that is extracted from the photovoltaic cell comprises charge carriers generated by incident photons substantially in a depletion region of a p-n junction in the silicon-based substrate. In the case of a p-type doped silicon-based substrate an n-typc doped emitter is applied to form the p-n junction. In the case of an 25 n-type doped silicon-based substrate the emitter is p-type doped. Depending on the design of the photovoltaic cell, the emitter can be fabricated at the front side or at the back side of the semiconductor substrate.
The electron-hole pairs that are generated in the depletion region of the p-n junction are separated by an internal electric field across the p-n junction and are 30 provided by the electrical contacts to the external load. Depending on the design of the photovoltaic cell, the electrical contacts are arranged at both the front side and the back side or only at the back side of the silicon-based substrate. In the latter case, both n- 2 type and p-type doped regions have to be fabricated at the back side of the silicon-based substrate.
The life time of generated excess minority carriers, i.e. electrons in the case of a p-type doped silicon-based substrate and holes in the case of an n-type doped silicon-5 based substrate, is substantially increased by a surface field portion. Depending on the design of the photovoltaic cell the surface field portion is provided by significantly increasing the doping level of the silicon-based substrate at its front side or at its back side. The surface field portion substantially increases the probability that the generated excess minority carriers reach the electrical contacts before recombining with excess 10 majority carriers. As a result, the photocurrent that can be extracted from the photovoltaic cell is substantially being improved.
In the case of for example a p-type doped silicon-based substrate, wherein the emitter is fabricated at the front side and the electrical contacts are arranged at both the front side and the back side of the silicon-based substrate, a so-called back surface field 15 portion is provided by significantly increasing the doping level of the p-type doped silicon-based substrate at the surface of the back side adjacent to the electrical contacts. A resulting p+-doping level of the back surface field portion provides a potential energy barrier for the generated excess minority carriers, i.e. electrons. This potential barrier substantially confines the generated excess minority carriers to the p-type doped 20 silicon-based substrate and drives them towards the electrical contacts at the front side of the silicon-based substrate.
Known fabrication methods for the abovementioned photovoltaic cells use multiple different doping processes to form the emitter and surface field portion, respectively. A drawback of the known fabrication methods may be that tuning of the 25 multiple different doping processes can be rather tedious as different dopant atoms and drive-in temperatures are involved. Another drawback of the known fabrication methods may be high manufacturing costs of the photovoltaic cells due to high complexity of the fabrication process and the use of multiple different manufacturing tools.
30 It is an object of the present invention to provide a method for fabricating a photovoltaic cell wherein at least one of the abovementioned drawbacks is obviated or at least reduced. It is a further object of the present invention to provide a fabrication method that allows a substantially simpler tuning of the multiple different doping 3 processes. An even further object of the present invention is to provide a fabrication method for the emitter and surface field portion that allows substantially decreased manufacturing costs of the photovoltaic cells due to decreased complexity of the fabrication process and the use of less manufacturing tools. It is a further object of the 5 present invention to provide a photovoltaic cell that can be manufactured at relatively low costs.
At least one of the objects may be achieved by a method for fabricating a photovoltaic cell according to the present invention wherein an emitter and a back surface field portion are fabricated by applying a layer of diffusion source material at 10 the front side of the semiconductor substrate for the formation of the emitter, wherein the diffusion source material comprises first dopant atoms of a type that dopes at least part of the semiconductor substrate n-type or p-type, wherein applying the diffusion source material is carried out at conditions at which at least a substantial part of the first dopant atoms substantially does not diffuse into at least part of the semiconductor 15 substrate and by applying second dopant atoms, which are of a type opposite to the type of the first dopant atoms, at the back side of the semiconductor substrate for the formation of the back surface field portion, wherein applying the second dopant atoms at the back side of the semiconductor substrate is carried out at conditions at which at least part of the first dopant atoms and at least part of the second dopant atoms are 20 substantially simultaneously being driven into the front side and back side of the semiconductor substrate to form the emitter and back side surface field portion, respectively. By driving at least part of the first dopant atoms and at least part of the second dopant atoms into the front side and back side of the semiconductor substrate, respectively at substantially the same time, the tuning of the abovementioned doping 25 processes to form the emitter and the back surface field portion may significantly be reduced. The desired emitter and back surface field portion can substantially be achieved by simply optimizing conditions, such as temperature and time, of the process wherein the second dopant atoms are applied to and diffused into the back side of the semiconductor substrate. In addition, the complexity of the fabrication process and the 30 use of multiple different manufacturing tools may be reduced. As a result, manufacturing costs of the photovoltaic cell fabricated according to the method of the present invention may substantially be reduced.
4
In a preferred embodiment of the present invention, a capping layer is applied to encapsulate the layer of diffusion source material on the front side of the semiconductor substrate and at least part of the back side of the semiconductor substrate to substantially prevent the diffusion of at least part of the first dopant atoms out of at 5 least part of the diffusion source material into a process ambient and to substantially prevent the diffusion of at least part of the second dopant atoms into at least part of the diffusion source material or into at least part of the semiconductor substrate underneath the diffusion source material when the emitter and the back surface field portion are substantially simultaneously being formed. The capping layer has a dual function as it 10 is a sacrificial layer that absorbs the first dopant atoms and is a diffusion barrier for the second dopant atoms during the application of the second dopant atoms to the back side of the semiconductor substrate. Hence, the capping layer substantially prevents that at least part of the first dopant atoms end up in the process ambient during the application of the second dopant atoms. In addition, the capping layer substantially prevents that at 15 least part of the second dopant atoms end up at locations in the semiconductor substrate, such as the emitter, where substantially first dopant atoms should be present. The application of the capping layer makes tuning of the diffusion processes at least simpler and at least reduces the complexity of the fabrication process of the photovoltaic cell.
20 In another embodiment of the present invention, the capping layer is applied on top of the diffusion source to substantially prevent the diffusion of at least part of the first dopant atoms out of at least part of the diffusion source material into the process ambient and to substantially prevent the diffusion of at least part of the second dopant atoms into at least part of the diffusion source material when the emitter and the back 25 surface field portion are substantially simultaneously being formed.
In an embodiment of the present invention, the capping layer comprises undoped dielectric material. However, the capping layer may consist of any suitable material that substantially acts as a barrier for dopant atoms.
In another embodiment of the present invention, the capping layer is applied 30 using a chemical vapor deposition (CVD) process. The capping layer may be applied using any suitable process such as plasma enhanced chemical vapor deposition (PECVD).
5
In yet another embodiment of the present invention, the conditions of the chemical vapor deposition process for applying the capping layer comprise an atmospheric or low ambient pressure and an ambient temperature at which at least part of the first dopant atoms substantially do not diffuse out of at least part of the diffusion 5 source material into the process ambient and substantially do not diffuse into at least part of the semiconductor substrate underneath the diffusion source material.
In an embodiment of the present invention, the capping layer comprises silicon oxide (SiOx). By applying a capping layer comprising SiOx at least the complexity of the fabrication process can be reduced as the diffusion source material can also 10 comprise at least a layer of SiOx. In that case, the capping layer and the diffusion source material can be removed in the same etching process after the substantially simultaneous diffusion of at least a part of the first and second dopant atoms into the front side and back side of the semiconductor substrate, respectively. This provides a potential reduction of process complexity and as a result a reduction of manufacturing 15 costs of the photovoltaic cell.
In another embodiment of the present invention, the silicon oxide (SiOx) layer is applied using an atmospheric pressure chemical vapor deposition (APCVD) process at an ambient temperature in the range of approximately 400°C to 650°C, in particular in the range of approximately 450°C to 525°C, for instance approximately 470°C. At 20 these ambient temperatures at least part of the first dopant atoms of the diffusion source material will substantially not diffuse out of at least part of the diffusion source material into the process ambient or into at least part of the semiconductor substrate underneath the diffusion source material. The skilled person will realize that the abovementioned ambient temperatures substantially enable a significant reduction of 25 process complexity and hence manufacturing costs of the photovoltaic cell.
In an embodiment of the present invention, the conditions of the process at which the diffusion source material is applied at the front side of the semiconductor substrate comprise an atmospheric or low ambient pressure and an ambient temperature that is substantially lower than the temperature at which at least part of the first dopant atoms 30 of the diffusion source material substantially starts diffusing into at least part of the semiconductor substrate underneath the diffusion source material. By applying the diffusion source material at these process conditions substantially less tuning of the diffusion processes is required. The diffusion of the first dopant atoms can substantially 6 be achieved by only tuning of the process wherein the second dopant atoms are applied at and diffused into the back side of the semiconductor substrate. The simpler tuning of the substantially simultaneous diffusion processes results in substantially reduced process complexity and hence substantially reduced manufacturing costs of the 5 photovoltaic cell.
In another embodiment of the present invention, the conditions of the process at which the second dopant atoms are applied to the back side of the semiconductor substrate comprise an atmospheric or low ambient pressure and an ambient temperature at which at least part of the first dopant atoms and at least part of the second dopant 10 atoms substantially start diffusing into the semiconductor substrate at substantially the same time.
In an embodiment of the present invention, the semiconductor substrate comprises silicon-based material. Silicon-based substrates are the most commonly used substrates in semiconductor industry. By using relatively low-cost silicon-based 15 substrate material the manufacturing costs of the photovoltaic cells can substantially be reduced compared to the use of for example gallium arsenide (GaAs). In addition, the use of silicon-based substrates substantially enables the advantages of economy of scale and the use of well known fabrication processes. As a result of the latter, process complexity can substantially be reduced.
20 In a further embodiment of the present invention, the silicon-based substrate has a monocrystalline crystal structure. To achieve a high-performance of photovoltaic cells, the semiconductor substrate preferably has a monocrystalline crystal structure because of the generally superior material properties compared to semiconductor material having polycrystalline or amorphous crystal structures. The material properties of 25 monocrystalline silicon-based substrates are generally superior to those having a polycrystalline or amorphous crystal structure as the latter two types of crystal structures comprise a high density of grain boundaries and other crystal imperfections, such as dislocations, defects or undesired impurities.
In another embodiment of the present invention, the monocrystalline silicon-30 based substrate comprises dopant atoms of a type that substantially dope at least part of the monocrystalline silicon-based substrate n-type or p-type.
In yet another embodiment of the present invention, the diffusion source material comprises a doped silicate glass layer comprising the first dopant atoms of a type that 7 dopes at least part of the monocrystalline silicon-based substrate n-type or p-type when at least part of the first dopant atoms is driven into the front side of the monocrystalline silicon-based substrate to form the emitter.
In an embodiment of the present invention, the doped silicate glass layer is 5 applied using an atmospheric pressure chemical vapor deposition (APCVD) process or a low pressure chemical vapor deposition (LPCYD) process. However, any suitable process may be used to apply the doped silicate glass layer as long as at least part of the first dopant atoms do not substantially diffuse into at least part of the front side of the mono crystalline silicon-based substrate during the application of the doped silicate 10 glass layer.
In a further embodiment of the present invention, the doped silicate glass layer, which is applied to form a p-type emitter at the front side of an n-type monocrystalline silicon-based substrate, comprises atoms from the third group of the periodic table.
In an embodiment of the present invention, the doped silicate glass layer 15 comprises boron atoms. Other dopant atoms from the third group of the periodic table such as aluminum (Al) may also be used. However, aluminum generally diffuses faster than boron. Hence, controlling the diffusion depth of the aluminum dopant atoms might be more tedious.
In another embodiment of the present invention a boron doped silicate glass layer 20 is applied at the front side of the n-type monocrystalline silicon-based substrate to form the p-type emitter using the APCVD process at an ambient temperature in a range of approximately 400°C to 650°C, in particular in the range of approximately 450°C to 525°C, for instance approximately 470°C.
In yet another embodiment of the present invention, the doped silicate glass layer, 25 which is applied to form an n-type emitter at the front side of a p-type monocrystalline silicon-based substrate, comprises atoms from the fifth group of the periodic table.
In a further embodiment of the present invention, the doped silicate glass layer comprises phosphorus atoms. Other dopant atoms from the fifth group of the periodic table such as arsenic (As) may also be used.
30 In an embodiment of the present invention, a phosphorus doped silicate glass layer is applied at the front side of the p-type monocrystalline silicon-based substrate to form the n-type emitter using the APCVD process at an ambient temperature in a range 8 of approximately 400°C to 650°C, in particular in the range of approximately 450°C to 525°C, for instance approximately 500°C.
In another embodiment of the present invention, the doped silicate glass layer is applied using an aqueous solution.
5 In a further embodiment of the present invention, the aqueous solution is applied using a spraying or misting or rolling process at an ambient temperature close to or at room temperature.
In an embodiment of the present invention, the aqueous solution comprises boric acid to form the boron doped silicate glass layer at the front side of an n-type 10 monocrystalline silicon-based substrate for the formation of a p-type emitter when at least part of the boron atoms is driven into at least part of the n-type monocrystalline silicon-based substrate.
In another embodiment of the present invention, the boron doped silicate glass layer using the aqueous solution comprising boric acid is formed at an ambient 15 temperature in the range of approximately 25 °C to 800°C, in particular in the range of approximately 250°C to 600°C, for instance approximately 450°C.
In yet another embodiment of the present invention, the aqueous solution comprises phosphoric acid to form the phosphorus doped silicate glass layer at the front side of a p-type monocrystalline silicon-based substrate for the formation of an n-type 20 emitter when at least part of the phosphorus atoms is driven into at least part of the p-type mono crystalline silicon-based substrate.
In a further embodiment of the present invention, the phosphorus doped silicate glass layer using the aqueous solution comprising phosphoric acid is formed at an ambient temperature in the range of approximately 25°C to 800°C, in particular in the 25 range of approximately 250°C to 600°C, for instance approximately 470°C.
In an embodiment of the present invention, a liquid dopant source material is used to apply the second dopant atoms at the back side of the monocrystalline silicon-based substrate for the formation of the back surface field portion.
In a further embodiment of the present invention, the second dopant atoms of the 30 liquid dopant source material are applied using a furnace process.
In yet a further embodiment of the present invention, the liquid dopant source material comprises phosphoryl chloride (POCI3) for the application of phosphorus 9 atoms as the second dopant atoms at the back side of an n-type monocrystalline silicon-based substrate for the formation of an n+-type back surface field portion.
In another embodiment of the present invention, the phosphorus atoms of the liquid dopant source material are applied using the furnace process at an ambient 5 temperature in the range of approximately 850°C to 1000°C, in particular in the range of approximately 900°C to 980°C, for instance approximately 930°C.
In an embodiment of the present invention, the liquid dopant source material comprises boron bromide (BBr3) for the application of boron atoms as the second dopant atoms to the back side of a p-type mono crystalline silicon-based substrate for 10 the formation of a p+-type back surface field portion.
In another embodiment of the present invention, the boron atoms of the liquid dopant source material are applied using the furnace process at an ambient temperature in the range of approximately 850°C to 1000°C, in particular in the range of approximately 900°C to 980°C, for instance approximately 940°C.
15 In an embodiment of the present invention, a time that the furnace process lasts is longer than the time that the phosphoryl chloride (POCI3) or boron bromide (BBr3) is applied to the back side of the n-type or p-type monocrystalline silicon-based substrate, respectively. This may provide an additional degree of freedom for tuning the desired boron and phosphor doping profiles of the emitter and back surface field portion in the 20 case of an n-type monocrystalline silicon-based substrate and the desired phosphorus and boron profiles of the emitter and back surface field portion in the case of a p-type monocrystalline silicon-based substrate during the substantially simultaneous diffusion of the boron and phosphorus atoms during the furnace process. In addition, this may reduce the manufacturing costs of the photovoltaic cell.
25 In a further embodiment of the present invention, the time that the phosphoryl chloride (POCl3) or boron bromide (BBr3) is applied to the back side of the n-type or p-type monocrystalline silicon-based substrate respectively, lies typically in the range of 50% to 95% of the time that the furnace process lasts. The tuning of the desired boron and phosphor doping profiles may be better controlled by choosing a preferable ratio 30 for the time that the phosphoryl chloride (POCl3) or boron bromide (BBr3) is applied to the back side of the semiconductor substrate and the time that the furnace process lasts.
In a further embodiment of the present invention, electrical contacts are applied to the front side and back side of the monocrystalline silicon-based substrate.
10
Photovoltaic cells with electrical contacts that may supply the photocurrent to an external electrical load that are arranged both on the front side and back side of the semiconductor substrate are generally known as front contact cells. Photovoltaic cells with electrical contacts substantially at the back side of the semiconductor substrate are 5 generally indicated as back contact cells. The method according to the present application may be applied to both front contact and back contact cells. However, the fabrication method according to the present invention may be most advantageous for front contact photovoltaic cells.
In an even further embodiment of the present invention, the electrical contacts 10 applied to the front side of the monocrystalline silicon-based substrate have an H-pattem. The H-pattem generally comprises two bus bars that interconnect the individual electrical contacts which are arranged in a direction substantially perpendicular to the bus bars.
According to another aspect of the present invention a photovoltaic cell, for 15 example a solar cell, is provided. The photovoltaic cell comprises a semiconductor substrate having a front side and a back side, wherein the semiconductor substrate comprises n-type mono crystalline silicon-based material, wherein a p-type emitter is formed using first dopant atoms, for example boron atoms, at the front side and an n+-type back surface field portion is formed using second dopant atoms, for example 20 phosphorus atoms, at the back side, respectively, wherein at least part of the first dopant atoms and at least part of the second doping atoms are substantially simultaneously being driven into the front side and back side of the n-type monocrystalline silicon-based substrate, respectively. Although photovoltaic cells having an oppositely doped substrate, emitter and back surface field portion may also 25 be used, photovoltaic cells having an n-type monocrystalline substrate may have the advantages of reduced electrical power degradation over time and longer life time of excess majority carriers.
According to a further aspect of the present invention a photovoltaic cell, for example a solar cell, is provided. The photovoltaic cell comprises a semiconductor 30 substrate having a front side and a back side, wherein the semiconductor substrate comprises n-type or p-type monocrystalline silicon-based material, wherein a diffusion source material comprising first dopant atoms is applied to the front side to form an emitter that has a doping type opposite to that of the mono crystalline silicon-based 11 substrate, wherein second dopant atoms are applied to the back side to form a back surface field portion that has an increased doping level with respect to the doping level of the monocrystalline silicon-based substrate, wherein at least part of the first dopant atoms and at least part of the second doping atoms are substantially simultaneously 5 being driven into the front side and back side of the n-type or p-type monocrystalline silicon-based substrate, respectively.
In an embodiment of the present invention, the photovoltaic cell has a semi square or substantially square shape.
In another embodiment of the present invention, electrical contacts are applied to 10 the front side and back side of the monocrystalline silicon-based substrate.
According to a final embodiment of the present invention, the electrical contacts on the front side of the monocrystalline silicon-based substrate have an H-pattem.
The invention will be explained in more detail below with reference to a few drawings in which illustrative embodiments of the invention are shown. The person 15 skilled in the art will realize that other alternatives and equivalent embodiments of the invention can be conceived and reduced to practice without departing from the scope of the present invention.
Figure 1 shows a perspective view of a front contact photovoltaic cell according to an embodiment of the present invention.
20 Figure 2 schematically shows a cross sectional view of a semiconductor substrate of a photovoltaic cell.
Figure 3 schematically shows a layer of diffusion source material that has been applied to the front side of the semiconductor substrate of the photovoltaic cell.
Figure 4 schematically shows a capping layer that has been applied to the layer of 25 diffusion source material at the front side and the side surfaces of the back side of the semiconductor substrate of the photovoltaic cell.
Figure 5 schematically shows a layer of at least partially doped silicate glass that encapsulates the semiconductor substrate at the end of the process wherein at least part of the first dopant atoms and at least part of the second dopant atoms have been 30 diffused into at least part of the front side and back side of the semiconductor substrate of the photovoltaic cell.
Figure 6 schematically shows the semiconductor substrate after removal of the doped silicate glass layers and the capping layer.
12
Figure 7 shows a schematic flow diagram of the process steps that are sequentially carried out to obtain the semiconductor substrate as shown in Figure 6.
The figures are not necessarily drawn to scale. In the figures identical components are denoted by the same reference numerals.
5 Figure 1 shows a perspective view of a front contact photovoltaic cell 1 according to an embodiment of the present invention. The photovoltaic cell comprises a semiconductor substrate 2 having a front side 3 and a back side that in the context of the present invention comprises both the lying surface 4 and the side surfaces 20, 30 as is schematically shown in the cross sectional view of Figure 2.
10 The semiconductor substrate 2 may comprise silicon-based material, such as silicon (Si), silicon germanium (SiGe) or any other semiconductor material that is suitable for fabricating photovoltaic cells, such as solar cells, for example gallium arsenide (GaAs) or germanium (Ge).
For relatively low-cost high-performance photovoltaic cells silicon-based 15 monocrystalline substrates are preferably used due to their generally superior material properties compared to silicon-based substrates having polycrystalline or amorphous crystal structures. The material properties of monocrystalline silicon-based substrates generally are superior to those having a polycrystalline or amorphous crystal structure as the latter two types of crystal structures comprise a high density of grain boundaries 20 and other crystal imperfections, such as dislocations, defects or undesired impurities.
The life time of charge carriers in the bulk of the semiconductor substrate 2 is a very important parameter for the photocurrent and consequently the electrical power performance of the photovoltaic cell 1. In the case of a monocrystalline crystal structure, the life time of charge carriers in the bulk of the semiconductor substrate is 25 longer than in the case of a substrate having a polycrystalline crystal structure or amorphous substrate material because a monocrystalline semiconductor substrate comprises substantially no grain boundaries and has substantially fewer other crystal imperfections, such as dislocations, defects or undesired impurities that give rise to a high recombination rate of for example photo-generated charge carriers. As a result of 30 the longer charge carrier life time in monocrystalline semiconductor substrates the photocurrent and electrical power that can be extracted from a photovoltaic cell 1 having such a semiconductor substrate have higher values.
13 A long charge carrier life time is preferred as the probability increases that charge carriers, which are generated by photons of radiation incident on the front side 3 of the semiconductor substrate 2, can reach the electrical contacts 40 that are arranged either at both the front side 3 and lying surface 4 of the back side or only at lying surface 4.
5 Photovoltaic cells with electrical contacts 40 that may supply the photocurrent to an external electrical load that are arranged both on the front side 3 and the lying surface 4 of the back side are commonly known as front contact cells, an example of which is shown in Figure 1. Photovoltaic cells with electrical contacts substantially at the lying surface 4 of the back side of the semiconductor substrate 2 are commonly indicated as 10 back contact cells.
The electrical contacts 40 on the front side 3 of front contact cells may have an H-pattem. Although the H-pattem of the electrical contacts 40 is well known from traditional designs using two bus bars 50, as is shown in Figure 1, it is also used to indicate designs using three bus bars 50.
15 The monocrystalline silicon-based substrate 2 is usually provided with dopant atoms of a type that substantially dope at least part of the silicon-based substrate 2 n-type or p-type. For n-type doping of silicon-based substrates dopant atoms from the fifth group of the periodic table are substantially used. Among others because of the values of their diffusivity and solid solubility in silicon, phosphor (P) atoms and arsenic 20 (As) atoms are preferably being used as n-type dopant atoms in silicon-based substrates. For p-type doping of silicon-based substrates dopant atoms from the third group of the periodic table are substantially used. In this case, boron (B) atoms or aluminum (Al) atoms are being used as p-type dopant atoms in silicon-based substrates.
Photovoltaic cells according to a preferred embodiment of the present invention 25 typically use n-type silicon-based substrates because the life time of the majority charge carriers, i.e. electrons, is substantially longer because of the higher mobility of electrons than of holes. In addition, the degradation of the electrical power performance over time of photovoltaic cells 1 having n-type silicon-based substrates 2 tends to be less than that of photovoltaic cells 1 having p-type silicon-based substrates 2. The 30 electrical power degradation over time of photovoltaic cells 1 having p-type substrates 2 is substantially caused by the formation of boron-oxygen (BO) complexes, which act as very effective recombination centers and consequently substantially reduce the photocurrent and electrical power that can be extracted from the photovoltaic cell 1.
14
The photocurrent that is extracted from the photovoltaic cell 1 comprises charge carriers generated by incident photons substantially in a depletion region of a p-n junction 9 in the silicon-based substrate 2. In the case of a p-type doped silicon-based substrate 2 an n-type doped emitter 8 is applied to form the p-n junction 9. In the case 5 of an n-type doped silicon-based substrate 2 the emitter 8 is p-type doped. Depending on the design of the photovoltaic cell 1, the emitter 8 can be fabricated at the front side 3 or at the lying surface 4 of the back side of the semiconductor substrate 2.
The electron-hole pairs that are generated in the depletion region of the p-n junction 9 are separated by an internal electric field across the p-n junction 9 and are provided 10 by the electrical contacts to the external load. Depending on the design of the photovoltaic cell 1, the electrical contacts are arranged at both the front side 3 and the lying surface 4 of the back side or only at the lying surface 4 of the back side of the silicon-based substrate 2. In the latter case, both n-type and p-type doped regions have to be fabricated at the back side of the silicon-based substrate 2.
15 The charge carrier life time of generated excess minority carriers, i.e. electrons in the case of a p-type doped silicon-based substrate 2 and holes in the case of an n-type doped silicon-based substrate 2, is substantially increased by a surface field portion. Depending on the design of the photovoltaic cell 1, the surface field portion is provided by significantly increasing the doping level of the silicon-based substrate 2 at its front 20 side 3 or at the lying surface 4 of its back side. The surface field portion increases the probability that the generated excess minority carriers reach the electrical contacts before recombining with excess majority carriers. As a result, the photocurrent and electrical power that can be extracted from the photovoltaic cell 1 are improved.
In the case of a p-type doped silicon-based substrate 2, wherein the emitter 8 is 25 fabricated at the front side 3 and the electrical contacts are arranged at both the front side 3 and the lying surface 4 of the back side of the silicon-based substrate 2, a so-called back surface field portion 10 is provided by significantly increasing the doping level of the p-type doped silicon-based substrate 2 at the surface of the lying surface 4 of the back side adjacent to the electrical contacts. A resulting p+-doping level of the 30 back surface field portion 10 provides a potential energy barrier for the generated excess minority carriers, i.e. electrons. This potential barrier substantially confines the generated excess minority carriers to the p-doped silicon-based substrate 2 and drives them towards the electrical contacts at the front side of the silicon-based substrate 2.
15
In a step 100 of the fabrication method according to the present invention, a layer of diffusion source material 5 is applied to the front side 3 of the semiconductor substrate 2 of the photovoltaic cell 1. Figure 3 schematically shows a layer of diffusion source material 5 at the front side 3 of the semiconductor substrate 2. The layer of diffusion 5 source material 5 is applied to form an emitter 8 near the front side 3 of the semiconductor substrate 2. The diffusion source material 5 comprises first dopant atoms of a type that dopes at least part of the semiconductor substrate 2 n-type or p-type.
The diffusion source material 5 may comprise a silicate glass (SiOx) layer that is at 10 least partially doped with boron atoms or phosphorus atoms to form a p-type or n-type doped emitter 8 respectively, upon diffusion of at least part of the boron or phosphorus atoms into at least part of the n-type or p-type doped silicon-based substrate 2, respectively. The boron or phosphorus doped silicate glass layers are also known as borosilicate glass (BSG) or phosphosilicate glass (PSG) respectively.
15 The diffusion source material 5 comprising BSG or PSG can be applied by using any suitable process, for instance an atmospheric pressure chemical vapor deposition (APCVD) process or a low pressure chemical vapor deposition (LPCVD) process. The process conditions are selected such that at least a substantial part of the first dopant atoms substantially does not diffuse into at least part of the semiconductor substrate 2. 20 These conditions comprise an atmospheric or low ambient pressure and an ambient temperature that is substantially lower than the temperature at which at least part of the first dopant atoms of the diffusion source material 5 substantially starts diffusing into at least part of the semiconductor substrate 2 underneath the diffusion source material 5.
A drawback of the application of the BSG and PSG layers using an APCVD or 25 LPCVD may be the use of the toxic diborane (62¾) and phosphine (PH3), respectively.
The use of these substances can be avoided by using an aqueous solution containing boric acid (H3BO3) or phosphoric acid (H3PO4). The aqueous solution can be applied using a spraying or misting or rolling process, preferably at or close to room temperature.
30 For the application of the aqueous solution to the front side 3 of the silicon-based substrate 2 it is preferred that the front side 3 is hydrophilic. This can be achieved by subjecting the front side 3 of the silicon-based substrate 2 for example to an ozone (O3) treatment.
16
After the application of the aqueous solution, a BSG or PSG layer for the formation of the p-type or n-type emitter 8 respectively has to be formed. This can be done by drying the aqueous solution at an ambient temperatures in the range of approximately 25°C to 800°C, in particular in the range of approximately 250°C to 600°C, for 5 instance approximately 450°C or 470°C for the BSG or PSG layer, respectively.
In another step 200 of the fabrication method according to the present invention, an optional capping layer 6 is applied to the layer of diffusion source material 5 at the front side 3 and the side surfaces 20, 30 of the back side of the semiconductor substrate 2. Figure 4 schematically shows a preferred embodiment of the present invention 10 wherein the capping layer 6 covers the front side 3 and the complete side surfaces 20, 30 of the back side of the semiconductor substrate.
The capping layer 6 substantially prevents the diffusion of at least part of the first dopant atoms out of at least part of the diffusion source material 5 into a process ambient. In addition, the capping layer 6 substantially prevents the diffusion of at least 15 part of the second dopant atoms into at least part of the diffusion source material 5 or into at least part of the semiconductor substrate 2 underneath the diffusion source material 5 when the emitter 8 and the back surface field portion 10 are substantially simultaneously being formed.
In an embodiment the capping layer 6 comprises undoped dielectric material such 20 as silicon oxide (SiOx) that can be applied using a chemical vapor deposition (CVD) process. The conditions of the chemical vapor deposition process for applying the capping layer 6 comprise an atmospheric or low ambient pressure and an ambient temperature at which at least part of the first dopant atoms substantially do not diffuse out of at least part of the diffusion source material 5 into the process ambient and 25 substantially do not diffuse into at least part of the semiconductor substrate 2 underneath the diffusion source material 5. The ambient temperature typically lies in the range of approximately 400°C to 650°C, in particular in the range of approximately 450°C to 525°C, for instance approximately 470°C.
The use of a capping layer 6 comprising SiOx has the advantage that the capping 30 layer 6 can substantially be removed during the same process step wherein the BSG
(SiOx:B) and PSG (SiOx:P) layers at the end of the substantially simultaneous diffusion process are removed. The aforementioned layers can be removed using for example a hydrofluoric acid (HF) solution.
17
In a further step 300 of the fabrication method according to the present invention, second dopant atoms are substantially applied to the lying surface 4 of the back side of the semiconductor substrate 2. During this process at least part of the first dopant atoms and at least part of the second dopant atoms are substantially simultaneously diffused 5 into at least part of the front side 3 and lying surface 4 of the back side of the semiconductor substrate 2.
For the formation of a n+-doped back surface field portion 10, phosphorus atoms are applied as second dopant atoms to the lying surface 4 of the back side of the n-type silicon-based substrate 2. The phosphorus atoms can be applied using a liquid dopant 10 source material comprising phosphoryl chloride (POCI3) in a furnace process. The phosphorus atoms are applied at such process conditions that at least part of the boron atoms of the BSG at the front side 3 of the n-type silicon-based substrate 2 and at least part of the phosphorus atoms are substantially simultaneously being driven into the front side 3 and the lying surface 4 of the back side of the semiconductor substrate 2 to 15 form the p-type doped emitter 8 and the n+-doped back side surface field portion 10, respectively. The substantially simultaneous diffusion of the boron and phosphorus atoms is indicated in Figure 5 by the downwardly and upwardly directed arrows, respectively. The resulting p-n junction is indicated by the dashed line 9. In addition, a boundary of the n+-doped back surface field portion is indicated by the dashed line 11. 20 In addition, Figure 5 schematically shows a layer of at least partially phosphorus doped silicate glass 7 that encapsulates the semiconductor substrate 2 at the end of the substantially simultaneous diffusion process.
In a final step 400 according to the fabrication method according to the present invention, the layer of at least partially phosphorus doped silicate glass 7, the layer of 25 diffusion source material 5 and the optional capping layer 6 are removed. Figure 6 shows the resulting semiconductor substrate 2 after removal of these layers. The resulting p-n junction is indicated by dashed line 9 and the boundary of the n+-doped back surface field portion is indicated by dashed line 11.
Figure 7 shows a schematic flow diagram comprising the aforementioned steps 100, 30 200, 300, 400 of the fabrication method according to the present invention, which are sequentially carried out to obtain the semiconductor substrate as shown in Figure 6.
Claims (43)
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| NL2003511A NL2003511C2 (en) | 2009-09-18 | 2009-09-18 | Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method. |
| PCT/NL2010/050606 WO2011034430A1 (en) | 2009-09-18 | 2010-09-17 | Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method |
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| NL2003511A NL2003511C2 (en) | 2009-09-18 | 2009-09-18 | Method for fabricating a photovoltaic cell and a photovoltaic cell obtained using such a method. |
| NL2003511 | 2009-09-18 |
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| CN111837217A (en) * | 2018-01-08 | 2020-10-27 | 索拉昂德有限公司 | Double-sided photovoltaic cell and method of making same |
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| KR20170019597A (en) * | 2015-08-12 | 2017-02-22 | 엘지전자 주식회사 | Solar cell and manufacturing method thereof |
| JP6559326B2 (en) * | 2016-03-14 | 2019-08-14 | 三菱電機株式会社 | Manufacturing method of solar cell |
| CN114335237B (en) * | 2020-09-29 | 2024-09-17 | 一道新能源科技股份有限公司 | Preparation method of crystalline silicon solar cell and crystalline silicon solar cell |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4206026A (en) * | 1977-12-09 | 1980-06-03 | International Business Machines Corporation | Phosphorus diffusion process for semiconductors |
| GB2077996A (en) * | 1980-06-16 | 1981-12-23 | Philips Nv | Method of manufacturing solar cells |
| ES2005779A6 (en) * | 1988-02-17 | 1989-03-16 | Fundacion General De La Univer | Crystalline silicon solar cell mfr. |
| US6552414B1 (en) * | 1996-12-24 | 2003-04-22 | Imec Vzw | Semiconductor device with selectively diffused regions |
| EP1876651A1 (en) * | 2005-04-26 | 2008-01-09 | Shin-Etsu Handotai Co., Ltd | Solar cell manufacturing method, solar cell, and semiconductor device manufacturing method |
| US20090205712A1 (en) * | 2008-02-20 | 2009-08-20 | Peter John Cousins | Front contact solar cell with formed emitter |
-
2009
- 2009-09-18 NL NL2003511A patent/NL2003511C2/en not_active IP Right Cessation
-
2010
- 2010-09-17 WO PCT/NL2010/050606 patent/WO2011034430A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4206026A (en) * | 1977-12-09 | 1980-06-03 | International Business Machines Corporation | Phosphorus diffusion process for semiconductors |
| GB2077996A (en) * | 1980-06-16 | 1981-12-23 | Philips Nv | Method of manufacturing solar cells |
| ES2005779A6 (en) * | 1988-02-17 | 1989-03-16 | Fundacion General De La Univer | Crystalline silicon solar cell mfr. |
| US6552414B1 (en) * | 1996-12-24 | 2003-04-22 | Imec Vzw | Semiconductor device with selectively diffused regions |
| EP1876651A1 (en) * | 2005-04-26 | 2008-01-09 | Shin-Etsu Handotai Co., Ltd | Solar cell manufacturing method, solar cell, and semiconductor device manufacturing method |
| US20090205712A1 (en) * | 2008-02-20 | 2009-08-20 | Peter John Cousins | Front contact solar cell with formed emitter |
Non-Patent Citations (1)
| Title |
|---|
| HARTITI B ET AL: "LOW TEMPERATURE FORMATION OF EMITTER AND BSF BY RAPID THERMAL CO-DIFFUSION OF P, AL OR B", WORLD CONFERENCE ON PHOTOVOLTAIC ENERGY. WAIKOLOA, DEC. 5 - 9, 1994; [WORLD CONFERENCE ON PHOTOVOLTAIC ENERGY], NEW YORK, IEEE, US LNKD- DOI:10.1109/WCPEC.1994.520502, vol. CONF. 1, 5 December 1994 (1994-12-05), pages 1519 - 1522, XP000680114, ISBN: 978-0-7803-1460-3 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111837217A (en) * | 2018-01-08 | 2020-10-27 | 索拉昂德有限公司 | Double-sided photovoltaic cell and method of making same |
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