NL181471B - METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR. - Google Patents

METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR.

Info

Publication number
NL181471B
NL181471B NLAANVRAGE7317292,A NL7317292A NL181471B NL 181471 B NL181471 B NL 181471B NL 7317292 A NL7317292 A NL 7317292A NL 181471 B NL181471 B NL 181471B
Authority
NL
Netherlands
Prior art keywords
capacitor
semi
matrix
manufacturing
effect transistor
Prior art date
Application number
NLAANVRAGE7317292,A
Other languages
Dutch (nl)
Other versions
NL7317292A (en
NL181471C (en
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US00320394A external-priority patent/US3841926A/en
Priority claimed from US00320395A external-priority patent/US3811076A/en
Application filed by Ibm filed Critical Ibm
Publication of NL7317292A publication Critical patent/NL7317292A/xx
Publication of NL181471B publication Critical patent/NL181471B/en
Application granted granted Critical
Publication of NL181471C publication Critical patent/NL181471C/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H01L27/0733Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with capacitors only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
NLAANVRAGE7317292,A 1973-01-02 1973-12-18 METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR. NL181471C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US00320394A US3841926A (en) 1973-01-02 1973-01-02 Integrated circuit fabrication process
US00320395A US3811076A (en) 1973-01-02 1973-01-02 Field effect transistor integrated circuit and memory

Publications (3)

Publication Number Publication Date
NL7317292A NL7317292A (en) 1974-07-04
NL181471B true NL181471B (en) 1987-03-16
NL181471C NL181471C (en) 1987-08-17

Family

ID=26982472

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7317292,A NL181471C (en) 1973-01-02 1973-12-18 METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR.

Country Status (3)

Country Link
CH (1) CH573661A5 (en)
DE (1) DE2363466C3 (en)
NL (1) NL181471C (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL176415C (en) * 1976-07-05 1985-04-01 Hitachi Ltd SEMI-CONDUCTOR MEMORY DEVICE CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A FIELD-EFFECT TRANSISTOR AND A STORAGE CAPACITY.
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
US4222816A (en) * 1978-12-26 1980-09-16 International Business Machines Corporation Method for reducing parasitic capacitance in integrated circuit structures
EP0096096B1 (en) * 1982-06-14 1987-09-16 Ibm Deutschland Gmbh Method of adjusting the edge angle in polysilicon

Also Published As

Publication number Publication date
DE2363466B2 (en) 1980-01-24
NL7317292A (en) 1974-07-04
DE2363466A1 (en) 1974-07-04
NL181471C (en) 1987-08-17
AU6351973A (en) 1975-06-12
CH573661A5 (en) 1976-03-15
DE2363466C3 (en) 1980-10-02

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BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee