NL181471B - METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR. - Google Patents
METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR.Info
- Publication number
- NL181471B NL181471B NLAANVRAGE7317292,A NL7317292A NL181471B NL 181471 B NL181471 B NL 181471B NL 7317292 A NL7317292 A NL 7317292A NL 181471 B NL181471 B NL 181471B
- Authority
- NL
- Netherlands
- Prior art keywords
- capacitor
- semi
- matrix
- manufacturing
- effect transistor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 2
- 239000003990 capacitor Substances 0.000 title 1
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000011159 matrix material Substances 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
- H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
- H01L27/0733—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with capacitors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US00320394A US3841926A (en) | 1973-01-02 | 1973-01-02 | Integrated circuit fabrication process |
US00320395A US3811076A (en) | 1973-01-02 | 1973-01-02 | Field effect transistor integrated circuit and memory |
Publications (3)
Publication Number | Publication Date |
---|---|
NL7317292A NL7317292A (en) | 1974-07-04 |
NL181471B true NL181471B (en) | 1987-03-16 |
NL181471C NL181471C (en) | 1987-08-17 |
Family
ID=26982472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NLAANVRAGE7317292,A NL181471C (en) | 1973-01-02 | 1973-12-18 | METHOD FOR MANUFACTURING AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A SERIES CIRCUIT OF A FIELD-EFFECT TRANSISTOR AND A CAPACITOR. |
Country Status (3)
Country | Link |
---|---|
CH (1) | CH573661A5 (en) |
DE (1) | DE2363466C3 (en) |
NL (1) | NL181471C (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL176415C (en) * | 1976-07-05 | 1985-04-01 | Hitachi Ltd | SEMI-CONDUCTOR MEMORY DEVICE CONTAINING A MATRIX OF SEMI-CONDUCTOR MEMORY CELLS CONSISTING OF A FIELD-EFFECT TRANSISTOR AND A STORAGE CAPACITY. |
US4190466A (en) * | 1977-12-22 | 1980-02-26 | International Business Machines Corporation | Method for making a bipolar transistor structure utilizing self-passivating diffusion sources |
US4222816A (en) * | 1978-12-26 | 1980-09-16 | International Business Machines Corporation | Method for reducing parasitic capacitance in integrated circuit structures |
EP0096096B1 (en) * | 1982-06-14 | 1987-09-16 | Ibm Deutschland Gmbh | Method of adjusting the edge angle in polysilicon |
-
1973
- 1973-12-14 CH CH1750373A patent/CH573661A5/xx not_active IP Right Cessation
- 1973-12-18 NL NLAANVRAGE7317292,A patent/NL181471C/en not_active IP Right Cessation
- 1973-12-20 DE DE2363466A patent/DE2363466C3/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2363466B2 (en) | 1980-01-24 |
NL7317292A (en) | 1974-07-04 |
DE2363466A1 (en) | 1974-07-04 |
NL181471C (en) | 1987-08-17 |
AU6351973A (en) | 1975-06-12 |
CH573661A5 (en) | 1976-03-15 |
DE2363466C3 (en) | 1980-10-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BB | A search report has been drawn up | ||
BC | A request for examination has been filed | ||
A85 | Still pending on 85-01-01 | ||
V1 | Lapsed because of non-payment of the annual fee |