NL150243B - Schakeling, opgebouwd uit nand-poorten. - Google Patents

Schakeling, opgebouwd uit nand-poorten.

Info

Publication number
NL150243B
NL150243B NL676707613A NL6707613A NL150243B NL 150243 B NL150243 B NL 150243B NL 676707613 A NL676707613 A NL 676707613A NL 6707613 A NL6707613 A NL 6707613A NL 150243 B NL150243 B NL 150243B
Authority
NL
Netherlands
Prior art keywords
nand gates
circuit built
built
circuit
nand
Prior art date
Application number
NL676707613A
Other languages
English (en)
Other versions
NL6707613A (nl
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL676707613A priority Critical patent/NL150243B/nl
Priority to DE19681774301 priority patent/DE1774301C3/de
Priority to GB25716/68A priority patent/GB1203730A/en
Priority to BE715997D priority patent/BE715997A/xx
Priority to US733627A priority patent/US3596075A/en
Priority to FR1582518D priority patent/FR1582518A/fr
Publication of NL6707613A publication Critical patent/NL6707613A/xx
Publication of NL150243B publication Critical patent/NL150243B/nl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3876—Alternation of true and inverted stages

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Complex Calculations (AREA)
NL676707613A 1967-06-01 1967-06-01 Schakeling, opgebouwd uit nand-poorten. NL150243B (nl)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL676707613A NL150243B (nl) 1967-06-01 1967-06-01 Schakeling, opgebouwd uit nand-poorten.
DE19681774301 DE1774301C3 (de) 1967-06-01 1968-05-18 Binäres Rechenelement
GB25716/68A GB1203730A (en) 1967-06-01 1968-05-29 Binary arithmetic unit
BE715997D BE715997A (nl) 1967-06-01 1968-05-31
US733627A US3596075A (en) 1967-06-01 1968-05-31 Binary arithmetic unit
FR1582518D FR1582518A (nl) 1967-06-01 1968-06-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL676707613A NL150243B (nl) 1967-06-01 1967-06-01 Schakeling, opgebouwd uit nand-poorten.

Publications (2)

Publication Number Publication Date
NL6707613A NL6707613A (nl) 1968-12-02
NL150243B true NL150243B (nl) 1976-07-15

Family

ID=19800283

Family Applications (1)

Application Number Title Priority Date Filing Date
NL676707613A NL150243B (nl) 1967-06-01 1967-06-01 Schakeling, opgebouwd uit nand-poorten.

Country Status (5)

Country Link
US (1) US3596075A (nl)
BE (1) BE715997A (nl)
FR (1) FR1582518A (nl)
GB (1) GB1203730A (nl)
NL (1) NL150243B (nl)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3700868A (en) * 1970-12-16 1972-10-24 Nasa Logical function generator
USH1970H1 (en) 1971-07-19 2001-06-05 Texas Instruments Incorporated Variable function programmed system
US3806714A (en) * 1971-07-22 1974-04-23 Tokyo Shibaura Electric Co Sequence controller
US4503511A (en) * 1971-08-31 1985-03-05 Texas Instruments Incorporated Computing system with multifunctional arithmetic logic unit in single integrated circuit
US4037094A (en) * 1971-08-31 1977-07-19 Texas Instruments Incorporated Multi-functional arithmetic and logical unit
US4241413A (en) * 1978-04-25 1980-12-23 International Computers Limited Binary adder with shifting function
US4254471A (en) * 1978-04-25 1981-03-03 International Computers Limited Binary adder circuit

Also Published As

Publication number Publication date
US3596075A (en) 1971-07-27
FR1582518A (nl) 1969-10-03
DE1774301B2 (de) 1977-02-24
NL6707613A (nl) 1968-12-02
DE1774301A1 (de) 1971-07-22
BE715997A (nl) 1968-12-02
GB1203730A (en) 1970-09-03

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