NL1027799C2 - Source line driving method for display apparatus, involves driving another source line alternatively using buffer connected to source line, based on comparison of hue data - Google Patents

Abstract

The method involves comparing hue data for driving buffer (BUF1) connected to one source line and hue data for driving buffer (BUF2) connected to another source line. A source line driver circuit (200) drives another source line alternatively using the buffer (BUF1), based on the comparison result. Independent claims are also included for the following: (1) buffer circuit; (2) driving system; (3) display apparatus; and (4) source line driver circuit.

Description

Short indication: Methods and systems for controlling a display panel with a shared buffer.

The invention relates to displays and more particularly to controlling source lines of displays.

Active matrix representations with liquid crystals contain a matrix of pixels, each of which contains red, green and blue cells.

Each cell has a transistor that controls the operation of the cell.

Of cells in the same line of display, the gate electrodes of their transistors are typically connected by a gate line. Of cells in the same column, the source electrodes are typically connected in common by means of a source line.

Each cell of each pixel can thus be individually addressable via selection of a gate line and a source line.

The information to be displayed by the liquid crystal display is typically provided as a digital value, which is converted to an analog signal to drive a source line. Conventionally, a separate buffer is provided to drive each cell source line for liquid crystal display. An example of a conventional source control circuit 100 for three source lines of a column of pixels is shown in FIG. 1. As can be seen in FIG. 1, digital data, such as 18-bit digital data, provides a red value (e.g., 6-bit). ) DATA_R, a green value (e.g., 6 bits) DATA_G and a blue value (e.g., 6 bits) DATA__B. The digital data is converted by respective digital-to-analog converters DR, DG and DB into a corresponding analog value R_VOL, G_VOL and B_VOL. The analog values are driven by buffers R_BUF, G_BUF and B_BUF on lines of a display panel, such as source lines in a liquid crystal display panel (LCD panel), to provide red, green and blue driving voltages ROUT, GOUT and BOLT . Each source line of a display will typically have its own driver circuit, as shown in FIG. 1, and these drivers are all typically in an on state during operation of the LCD panel, thereby consuming energy.

FIG. 2 is a further illustration of a conventional source line driving circuit for an LCD display, which includes conventional 1027799-2 source line driving circuit selective switching of the connectivity of buffers to test the number of wire lines required to test the circuit. Reduce. By providing the switches and CH_MUX, a single wire line can be selectively connected to the buffer amplifier 10 and the buffer amplifier 20 for testing purposes. Furthermore, the buffer amplifiers 10 and 20 can also be deactivated for testing purposes by means of the signal AMP_ON / OFF.

Embodiments of the invention provide for controlling source lines of a display device by comparing first data for driving a first buffer connected to a first source line of the display device and second data for driving a second buffer connected to a second source line of the display device, selectively deactivating the second buffer and selectively driving the second source line of the display device to the first buffer on the basis of the comparison of the first and second data .

In further embodiments of the invention, the first data and the second data are associated with the first source line and the second source line corresponding red data, green data and / or blue data. The first data can be one of red data, green data and blue data and the second data can be a corresponding of red data, green data or blue data. The first source line and the second source line can be corresponding source lines of source lines connected to two different pixels.

In additional embodiments of the invention, the first data is one of red data, green data, and blue data, and the second data is different from red data, green data, and blue data.

In still further embodiments of the invention, the comparison of the first data and the second data is provided by determining whether the first data and the second data have the same value.

In certain embodiments of the invention, wherein the first data and the second data comprise RGB data for two different pixels, the first buffer includes a first red-source line buffer, a first green-source line buffer and a first blue-40 source-line buffer and the second buffer, a second red source line buffer, a second green source line buffer and a second blue source line buffer. The selective deactivation of the second buffer can further be provided by selectively decoupling the second buffer line from the second buffer line when the first buffer controls the first source line and the second source line. Selectively disabling the second buffer may also include selectively disabling a differential amplifier input circuit and / or an output driver circuit of the second buffer.

In some embodiments of the invention, the first source line and the second source line are source lines of the same pixel.

The first source line and the second source line can also be source lines for different pixels. The first data and the second data may contain corresponding red data, green data, blue data and / or white data associated with the first source line and the second source line. The display device can be a liquid crystal display.

In additional embodiments of the invention, comparing first data for controlling a first buffer connected to a first source line of the display device and second data for controlling a second buffer connected to a second source line of the display device comparing first data for driving a number of first buffers connected to a first number of source lines and second data for driving a number of second buffers connected to a second number of source lines. Selectively deactivating the second buffer and driving the second source line of the display device with the first buffer based on the comparison of the first and second data comprises selectively deactivating the second number of buffers and driving the second number of source lines of the display device with the first number of buffers based on the comparison of the first and second data.

In other embodiments of the invention, source lines of a display device are driven by comparing data for driving a first source line of the display device with data for driving at least one other source line of the display device and selectively driving the at least one other source line and the first source line with a common source line buffer based on the data comparison. A source cell of the at least one other source line is deactivated if the at least one other source line is driven by the common source line buffer.

In further embodiments of the invention, comparing data includes comparing data for driving a first source line of the display device with data for driving each of a number of other source lines of the display device. Selectively driving the at least one other source line and the first source line with a common source line buffer based on the data comparison includes controlling the first source line and selected source lines of the number of other source lines with the common source line buffer and deactivating a source line buffer includes deactivating source line buffers for each source line of the number of source lines driven by the common source line buffer.

In additional embodiments of the invention, driving the first sourcing line and selected sourcing lines of the number of other sourcing lines with the common sourcing line buffer includes driving the first sourcing line and each sourcing line of the number of other sourcing lines with the common sourcing line buffer. Deactivating a source line buffer may selectively deactivate a differential amplifier input circuit and / or an output driver circuit of the source line buffer. The first source line and the at least one other source line may be source lines of the same pixel or of different pixels. The first source line and the at least one other source line can be source lines connected to the same color component for at least two different pixels. The first source line and the at least one other source line may also be source lines associated with different color components and may be for the same pixel or different pixels.

In still further embodiments of the invention, the first source line contains a first number of source lines and the at least one other source line contains a second number of source lines. Comparing data for driving a first source line of the display device with data for driving at least one other source line of the display device includes comparing data for driving the first number of source lines of the display device. display device with data for controlling the second 40 number of source lines of the display device. Selectively driving the at least one other source line and the first source line with a common source line buffer on the basis of the data comparison includes selectively driving the second number of source line lines and the first number of source line lines with a number of community -5 formal source line buffers based on data comparison. Deactivating a source line buffer of the at least one other source line, if the at least one other source line is driven by the common source line buffer, includes deactivating source line buffers of the second number of source lines, if the second number of source lines is the number of common source lines Sourcing line buffers are controlled. The data for controlling the first number of source lines of the display device and the data for controlling the second number of source lines of the display device may contain RGB data.

In some embodiments of the invention, comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device may also compare components of the data for controlling the first number of source lines of the display device with corresponding components of the data for controlling the second number of source lines of the display device. Comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device can also compare all data for driving the first number of source lines of the display device. display device containing all data for controlling the second number of source lines of the display device.

In certain embodiments of the invention, the data for controlling a first source line of the display device contains red, green, blue and / or white data and the data for controlling at least one other source line of the display device red, green, blue and / or white data. The display device may be a liquid crystal display panel.

In still other embodiments of the invention, a buffer circuit for driving source lines of a display device comprises a data comparator circuit, which comprises a first data value connected to a first source line of the display device and a data source connection to a second source line of the display device. device-related second data value compares, a first buffer, which controls the first source line on the basis of a first data value, a second buffer, which controls the second source line on the basis of the second data value. The second buffer responds to the data comparator circuit to selectively disable the second buffer and a first switching circuit, which is adapted to electrically couple the first buffer to the second source line in response to the data comparator circuit.

The first data and the second data may contain corresponding red data, green data and / or blue data associated with the first source line and the second source line. The first data may also contain one of red data, green data, and blue data, and the second data may contain corresponding data of red data, green data, and blue data, the first source line and the second source line corresponding are source lines of source lines connected to two different pixels of the display device. The first data can be one of red data, green data, and blue data, and the second data can be different data of red data, green data, and blue data. The data comparator circuit may be arranged to determine whether the first data and the second data have the same value.

In further embodiments of the invention, wherein the first data and the second data are RGB data for two different pixels of the display device, the first buffer includes a first red buffer adapted to a first red to control a source blue line, a first green buffer, which is arranged to control a first green source line, and a first blue buffer, which is arranged to control a first blue source line. The second buffer contains a second red buffer adapted to drive a second red source line and to be selectively disabled in response to the data comparator circuit, a second green buffer adapted to a second green to drive the source line and to be selectively disabled in response to the data comparator circuit, and a second blue buffer adapted to drive a second blue source cell and to be selectively disabled in response on the data comparator circuit. The first switching circuit is adapted to electrically couple the first red buffer to the second red source line in response to the data comparator circuit, to electrically couple the first blue buffer to the second blue source line in responsive to the data comparator circuit, and selectively electrically couple the first green buffer to the second green source line in response to the data comparator circuit.

In additional embodiments of the invention, a second switching circuit is arranged to selectively electrically disconnect the second buffer from the second source line in response to the data comparator circuit, so that the second buffer is disconnected from the second source line if the first buffer is connected to the second source line is connected. The data comparator circuit can compare a plurality of logic gates, comparing corresponding data bits of the first and second data values, a merging logic gate, which adds outputs from the plurality of logic gates and outputs a first signal, if the outputs from the plurality of logic gates all have the same logic value, and include a number of multiplexers, which selectively provide control signals to the first and second switching circuits based on the output of the merging logic gate. The plurality of logic gates can include a plurality of XOR gates and the merging logic gate can be a NOR gate. The merging logical gate may contain a number of logical ports.

The plurality of multiplexers may be a first multiplexer, which is arranged to generate a control signal to control the operation of the second buffer, a second multiplexer, which is arranged to generate a control signal, to control the operation of the first switching circuit to control the first buffer to the second source line, and a third multiplexer, which is arranged to generate a control signal to control the operation of the second switching circuit to disconnect the second buffer from the second source line , contain.

In further embodiments of the invention, the second buffer comprises an input circuit which is adapted to selectively disconnect transistors from a voltage source if the second buffer 35 is deactivated. The second buffer may also include an output circuit adapted to control output driver transistors of the output circuit to decouple an output line of the second buffer from output voltage sources of the second buffer.

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Additional embodiments of the invention provide for controlling first and second source lines of a display panel using first and second buffer amplifiers, by selecting one of the first buffer amplifier and the second buffer amplifier to drive the second source line based on of values of display data driven on the first and second source lines. The second buffer amplifier can be deactivated if the first buffer amplifier is selected to control the second source line. The first and second source lines may be for the same pixel or different pixels of the display panel.

In further embodiments of the invention, selecting one of the first buffer amplifier and the second buffer amplifier to drive the second source line based on values of display data driven on the first and second source lines selects the first buffer amplifier around the second source line to be controlled if the values of the display data driven on the first and second source lines are the same and selecting the second buffer amplifier to drive the second source line if the values of the display data driven on the first and second source lines are different. In addition, the second source line can be controlled with the first buffer amplifier if the first buffer amplifier is selected to drive the second source line and the second source line can be driven with the second buffer amplifier if the second buffer amplifier is selected to power the second source line. send.

In still other embodiments of the invention, a display device comprises a display panel, a data comparator circuit, which is arranged to compare display data values, and a number of source line drivers, which are arranged to receive display data and to source lines of the display device. based on the received display data. A source switching network that responds to the data comparator circuit and the number of source line drivers selectively couples different source lines of the display device to respective source lines of the number of source line controls based on the comparison of the display data values.

In some embodiments of the invention, the plurality of source line drivers respond to the data comparator circuit to selectively deactivate 40 respective source line drivers from the number of source line drivers based on the comparison of the display data values. The source line switching network may also be arranged to decouple deactivated source line controls from the number of source line controls from source lines of the display device. The source line switching network may be arranged to couple one source line driver to two source lines of the display panel if the data comparator circuit determines that the display data values corresponding to the two source lines are equal. The display panel may be a liquid crystal display panel or an organic light-emitting device.

FIG. 1 is a diagram of a conventional source line driver circuit of a liquid crystal display; Fig. 2 is a diagram of a conventional source line driving circuit of a liquid crystal display; FIG. 3 is a block diagram of a display device which includes embodiments of the invention; Fig. 4 is a diagram of a portion of a circuit for driving source lines of a display device according to embodiments of the invention; Fig. 5 is a diagram of a portion of a circuit for driving source lines of a display device according to additional embodiments of the invention; Fig. 6 is a diagram of a portion of a circuit for driving source lines of a display device according to additional embodiments of the invention; Figs. 7A and 7B are diagrams of portions of amplifier circuits, which diagrams show techniques for disabling the amplifier circuits to reduce energy consumption; and Fig. 8 is a diagram of a control circuit according to some embodiments of the invention; Fig. 9 is a circuit diagram of a source line driving circuit according to another embodiment of the invention; Fig. 10A is a circuit diagram showing a method for testing the internal buffer amplifiers of the source line driving circuit of Fig. 4 according to an embodiment of the invention; Fig. 10B is a diagram showing the arrangement of connection faces, such as those of Fig. 10A, according to an embodiment of the invention; FIG. 11 is a circuit diagram showing the connection of probe ends, which probe ends are used to test the internal buffer amplifiers of the source line driving circuit of FIG. 9; FIG. 12A is a circuit diagram showing a method for testing the internal buffer amplifiers of the source line driver circuit of FIG. 9; Fig. 12B is a diagram showing the arrangement of connection faces, such as that of Fig. 12A, according to an embodiment of the invention.

The invention will now be fully described with reference to the accompanying drawings, in which embodiments of the invention are shown. However, the invention can be embodied in various forms and is not to be limited to the embodiments set forth herein. Instead, these embodiments are provided so that this description will be thorough and complete and will fully convey the scope of the invention to those skilled in the art. Identical reference numbers refer to the same elements. As used herein, the term "and / or" includes all combinations of one or more of the associated enumerated items.

It will be understood that while the terms first and second can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections are not limited by these terms. must be understood. These terms are only used to distinguish one element, component, area, layer or section from another element, component, area, layer or section. For example, a first element, component, area, layer or section explained below can be called a second element, component, area, layer or section without departing from the teachings of the invention.

Embodiments of the invention provide methods and / or systems for controlling drivers (buffers) that control display values on source lines of a display device based on display data values. As used herein, the term "source line" refers to a line of a display device on which a signal corresponding to a value to be displayed by the display device is sent. A source line is in contrast to a "gate line," which is a control line of the display device, which control line selects a display element of the display device 40. Embodiments of the invention are described herein with reference to a liquid crystal display panel, however, embodiments of the invention with other types of displays can be used. For example, the display panel may be a liquid crystal display (LCD) panel, a plasma display panel, an organic light-emitting device (OLED) or other such display panels.

Embodiments of the invention provide for selectively driving at least two source lines of a display with a common source line buffer gain if the data to be controlled on the source cell lines is the same. A source line buffer amplifier connected to one of the source lines can be disabled if the source lines are driven by the common source line buffer amplifier. The energy consumption of driving circuits according to embodiments of the invention can thus be reduced with respect to conventional driving circuits. The data for the two source lines can be data for a common color (e.g. red, green, blue and / or white) for two different pixels, data of different colors for the same pixel and / or different pixels and / or for multiple colors 20 for the same and / or different pixel.

FIG. 3 is a block diagram showing some embodiments of the invention. As can be seen in Fig. 3, a display device 50 includes a display panel 60, a data comparator circuit 90, which is arranged to compare display data values, a number of source line drivers 70, which are arranged to receive display data and source lines of the display panel 60 based on the received display data, and a source line switching network 80 that responds to the data comparator circuit 90 and the number of source line drivers 70 to selectively different source lines from the display panel 60 to respective source line drivers of the number of source line drivers 70 link based on the comparison of the display data values. The source line drivers 70 also respond to the data comparator circuit 90 to selectively deactivate respective source line drivers from the number of source line drivers 70 based on the comparison of the display data values. The source line switching network 80 is arranged to decouple deactivated source line controllers 70 from the number of source line controls 70 from source lines of the display panel 60. The source line switching network 80 may also be arranged to link one 40 source line control to two or more source line lines of the display panel 60 if the data comparator circuit 90 determines that the display data values corresponding to the two or more source lines are the same.

The comparison of display data can compare data values for two or more source lines and, if the values are the same, drive the two or more source lines with a common buffer amplifier of the source line drivers 70. The resolution of the comparison can be at the pixel level or at a sub-pixel level. For example, the comparison can be performed between data for two source lines and the two source lines can be driven by a single buffer amplifier. The two values can be compared regardless of the significance of the two compared data values with respect to a final representation, as long as the control of the source lines based on the data results in the same representation regardless of whether the source lines are passed through a single buffer amplifier or two separate buffer amplifiers are driven. For example, the two data values may correspond to values for the same color component to be displayed for two different pixels, values for different color components for the same or different pixels or for combinations of color components. Whatever the resolution of the comparison of the data values, the control resolution of controlling the source lines should be the same resolution. If, for example, the control of controlling the source lines takes place at the pixel level, then the comparison of data must take place at the pixel level. If the control of the control of the source lines is at the component or channel level, then the comparison of data must also take place at the component or channel level.

The particular configuration of the source line drivers 70, the source line switching network 80 and the data comparator circuit 90 may depend on the desired control resolution and the level of complexity acceptable for a particular application. Furthermore, the source line switching network 80 may be provided by any circuit that provides for the selective coupling of buffer amplifiers to source lines, as described herein. Accordingly, embodiments of the invention should not be construed as being limited to a particular circuit or configuration, but these embodiments may include any circuit capable of selectively coupling source line controls to source lines and / or deactivating source line controls. based on a comparison of data associated with the source lines.

Certain non-limiting exemplary embodiments of the invention will now be described with reference to the schematic illustrations of FIGS. 4 to 8.

FIG. 4 is a block diagram of a portion of a source line driving circuit 200 according to some embodiments of the invention. As can be seen in FIG. 1, the source line driver circuit 200 includes a first series of source line drivers 210 for a first pixel and a second series of source line drivers 220 for a second pixel. A data comparator circuit 230 receives RGB data for two pixels in two columns of pixels from a display panel driven by the source line drivers 210, 220 and, optionally, common control signals 15 for controlling the operation of the source line drivers, such as the source line drivers 210, 220 The data comparator circuit uses the received RGB data and, optionally, control signals, to generate individual control signals to provide coordinated control of the source line driver circuits 210, 220.

As can be seen in Fig. 4, the RGB data entered in the data comparator circuit are 18 bit RGB data (DATA_RGB1 and DATA_RGB2), which are red, green and blue data (DATA_R1, DATA_G1, DATA_B1, DATA_R2, DATA_G2 and DATA_B2) can be provided to respective digital-to-analog converters (DR1, DG1, DB1, DR2, DG2 and DB2) of the source line driver circuits 210, 220. The digital-to-analog converters (DR1, OG1, DB1, DR2, DG2 and DB2) convert the digital RGB data into analog values (R_VOL1, G_VOL1, B_VOL1, R_VOL2, G_VOL2 and B_VOL1), which analog values corresponded to -30 buffer amplifiers (R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2) are provided.

The buffer amplifiers are controlled by corresponding control signals OPCON1 and OPCON2 to selectively deactivate or place the buffer amplifiers in an off state. The outputs (RBON1, 35 GBON1, BBON1, RBON2, GBON2 and BBON2) of the buffer amplifiers (R_BUF1, G_BUF1, B_BUF1, RJBUF2, G_BUF2 and B_BUF2) are selectively linked to corresponding output lines ROUT1, GOUT1, GOUT1, ROUT1, ROUT1, BOUT1, the source line driver circuits 210, 220 by means of two separately controlled sets of switches (R_SW1, G_SW1, B_SW1, R_SW2, G_SW2 and B_SW2). The first series of switches (R_SW1, G__SW1 and B_SW1) is controlled by the control signal COCON1 and the second series of switches (R_SW2, G__SW2 and B_SW2) is controlled by the control signal COCON2.

Furthermore, the outputs (RBON1, GBON1 and BBON1) of the buffer amplifiers (R_BUF1, G__BUP1 and B_BUF1) are selectively coupled to the output lines (ROUT2, GOUT2 and BOUT2) by means of a third series of switches (SSW1, SSW2 and SSW3 ). The third set of switches (SSW1, SSW2 and SSW3) is controlled by the control signal SEL_CON.

The OPS, COS and / or SELS signals may be general selection and control signals, which signals are used in generating the pixel level control signals OPCON1, OPCON2, COCON1, COCON2 and / or SELjCON. The signals OPS, COS and / or SELS can also be provided as test mode signals, which signals are passed through the data comparator circuit 230 to the source line driving circuits 210, 220, for example by means of corresponding ones of the signals OPS, COS and / or SELS with the pixel level control signals OPCON1, OPCON2, COCON1, COCON2 and / or SEL_CON generated by the data comparator circuit 230 to be subjected to a logical OR operation. In such a manner, the reduced pin count test equipment can be used in embodiments of the invention.

In operation, the data comparator circuit 230 compares the 18-bit RGB data for two pixels (DATA__RGB1 and DATA_RGB2) and, if the data has the same value, it controls the source line control circuits 210, 220 around the buffers (R_BUP2, G_BUF2 and B__BUF2) of the to deactivate the second source line driver circuit 220 and to control the outputs ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and BOUT2 with the first source line driver circuit 210. The buffer amplifiers R_BUF1, G_BUF1 and B_BUF1 provide common buf-30 amplifier amplifiers for driving series of source lines based on the data comparison. In particular, the following truth table describes the state of the control signals based on the results of the data comparison.

Equation I OPCON1 OPCON2 COCON1 COCON2 SEL_CON

DATA_RGB1 = DATA_RGB2 Active Inactive Active Inactive Active DATA_RGB1 Φ DATA_RGB2 Active Active Active Active Inactive 35 - 15 -

In the above table, an active signal results in closure of the corresponding switches or activation of the buffer amplifier. Thus, for example, when OPCON2 is active, the buffer amplifiers R_BUF2, G_BUF2 and B_BUF2 are activated and when OPCON2 is inactive, the buffer amplifiers R_BUF2, G_BUF2 and B_BUF2 are deactivated. When the signal SEL_CON is active, the switches SSW1, SSW2 and SSW3 are closed correspondingly and when the signal SEL_CON is inactive, the switches SSW1, SSW2 and SSW3 are open.

FIG. 4 shows embodiments of the invention in which the comparison of data at a pixel level is carried out such that, if two pixels have the same value, the buffer amplifiers connected to one of the pixels are subsequently disabled and the source lines of both pixels by buffer amplifiers 15 for one of the pixels is controlled. FIG. 5 shows a source line driver circuit 400 according to further embodiments of the invention, wherein the comparison of data between pixels is performed at the data component level. Thus, as can be seen in FIG. 5, three data comparator circuits 430, 432, and 434 are provided, which circuits compare values for components of two-pixel data to control source line drivers 410, 420.

The buffer amplifiers of the source line driving circuits 410, 420 are controlled by corresponding control signals RjOPCON1, R_OPCON2, GjOPCON1, G_OPCON2, B_OPCON1 and B__OPCON2 to selectively deactivate or place the buffer amplifiers in an off state. The outputs (FBON1, GBON1, BBON1, RBON2, GBON2 and BBON2) of the buffer amplifiers (R_BUFi, G__BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2) are selectively linked to corresponding output lines ROUT1, GOUT2, GOUT2, GOUT2, GOUT2, GOUT2, GOUT2, GOUT2, BOUT2 of the source line driver circuits 410, 420 by means of individually controlled switches (R__SW1, G_SW1, B_SW1, R_SW2, G_SW2 and B_SW2).

Furthermore, the outputs (RBON1, GBON1 and BBON1) of the buf-amplifier amplifiers (R_BUF1, G_BUF1 and B_BUF1) are selectively coupled to the output lines (ROUT2, GOUT2 and BOUT2) by means of individually controlled switches (SSW1, SSW2 and SSW3).

The first comparator circuit 430 compares red component values DATA_R1 and DATA_R2 for two pixels and controls the buffer amplifiers R_BUF1 and R_BUF2 and the switches SSW1, R_SW1 and R_SW2 on the basis of this comparison by generating R_OPCON1, R_OPCON2 , R_COCON1, R_C0C0N2 and SEL_C0N1. The second comparator circuit 432 compares green component values DATA__G1 and DATA_G2 for two pixels and controls the buffer amplifiers G BUF1 and G_BUF2 and the switches SSW2, G_SW1 and G_SW2 on the basis of this comparison by generating G_OPCON1, G_OPCON2, G_COCON2, G_COCON2, G_COCON2 SEL_C0N2. The third comparator circuit 434 compares blue component values DATA_B1 and DATA_B2 for two pixels and controls the buffer amplifiers R_BUF1 and R_BUF2 and the switches SSW3, B_SW1 and B__SW2 on the basis of this comparison by generating BmOPCONI, B_OPCON2, B_OPCON2 , B_COCON2 and SEL_CON3.

In a manner similar to the above explained with reference to Fig. 4, the OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, COS3 and / or SELS3 signals may be general selection_ and control signals used. when generating the pixel component level control signals RjOPCON1, R_OPCON2, R_COCON1, R_COCON2, SELCON1, GJOPCON1, G_OPCON2, G_COCON1, G_COCON2, SEL_CON2, BjOPCON1, B_OPCOC2, B_OPCOC2, B_OPCON2 The signals OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, COS3 and / or SELS3 can also be provided as test mode signals, which signals are sent by the data comparator circuits 430, 432 and 434 to the source line control circuits 410, 420 are routed, for example, by corresponding signals from the signals OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, COS3 and / or SELS3 with the pixel component level control signals R_OPCON1 generated by the corresponding data comparator circuits 430, 432 or 434, R_OPCON2, R__COCON1, R_COCON2, SELCON1, G_OPCON1, G_OPCON2, G_COCON1, G_COCON2, SEL_CON2, B_OPCON1, B_OPCON2, B_COCON1, B_COCON2 and / or SEL_CON3 operation. In such a manner, the reduced pin count testing equipment 30 can be used with embodiments of the invention.

In operation, the data comparator circuits 430, 432 and 434 compare the 6-bit RGB component data for two pixels and, if the data have the same value, control the source line driver circuits 410, 420 for the component to match the corresponding buffer of the buffers R_BUF2, G_BUF2 and disable B_BUF2 of the second source line driver circuit 420 and drive the corresponding outputs of the outputs ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and BOUT2 with the first source line driver circuit 410.

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The buffer amplifiers R_BUF1, G_BUF1 and BJBUF1 thus provide common buffer amplifiers for driving corresponding source lines of the two sets of source lines based on the data comparison. In particular, the following truth tables describe the state of the control signals based on the results of the data comparison.

Comparison RJDPC0N1 R_0PC0N2 R_C0C0N1 R_C0C0N2 SEL_C0N1 DATA_R1 = DATA_R2 Active Inactive Active Inactive Active DATA_Rl Φ DATA_R2 Active Active Active Active Inactive

Comparison G_0PC0N1 G_0PC0N2 G_C0C0N1 G_C0C0N2 SEL_CON2 DATA_G1 = DATA_G2 Active Inactive Active Inactive Active DATA_G1 Φ DATA_G2 Active Active Active Active Inactive

Comparison BJDPCON1 B_0PC0N2 B_C0C0N1 B_C0C0N2 SEL_C0N3 DATA_B1 = DATA_B2 Active Inactive Active Inactive Active DATA_B1 Φ DATA_B2 Active Active Active Active Inactive 10

In the above tables, an active signal results in closure of the corresponding switches or activation of the buffer amplifier.

FIG. 6 shows a source line driver circuit 500 according to further embodiments of the invention, wherein the comparison of values to be controlled on a source line is for a single pixel. As used herein, the term "a channel" refers to a component of a pixel. For example, in an RGB system, a pixel would have a red channel, a green channel, and a blue channel. Although the embodiments of two channels of a pixel shown in Fig. 6 compare data, additional channels of the pixel can also be compared and the corresponding drivers controlled on the basis of such a comparison.

As can be seen in Fig. 6, a first source line driver circuit 510 for a first channel of a pixel and a second source line driver circuit 520 for a second channel of the pixel are controlled by a data comparator circuit 530. The data comparator circuit 530 receives as input data for channels of the pixel 30 controlled by the source control circuits 510, 520 and, optionally, common control signals for controlling the operation of the source line control circuits, such as the source line control circuits 510, 520 The data comparator circuit 530 uses the received channel data and, optionally, control signals to generate individual control signals to provide coordinated control of the source line driver circuits 510, 520.

As can be seen in Figure 6, in some embodiments of the invention, the channel data CHN_DATA1 and CHN_DATA2 are provided to the data comparator circuit 530 and to respective channel coding circuits (CHN_DEC1 and CHN_DEC2) of the source line driver circuits 510, 520. The channel encoding circuits (CHN_DEC1 and CHN_DEC2) convert the digital channel data into analog values (CHN_VOL1 and CHN_VOL2), which values are provided to corresponding buffer amplifiers (CHN_BUF1 and CHN_BUF2).

The buffer amplifiers are controlled by corresponding control signals OPCON1 and OPCON2 to selectively deactivate or place the buffer amplifiers in an off state. The outputs (EBON and GBON) of the buffer amplifiers (CHN_BUF1 and CHN_BUF2) are selectively coupled to corresponding output lines ROUT and GOUT of the source line driver circuits 510, 520 by two separately controlled switches (C_SW1 and C_SW2). The first switch C_SW1 is controlled by the control signal COCON1 and the second switch C_SW2 is controlled by the control signal COCON2.

Furthermore, the output RBON of the buffer amplifier CHN_BUF1 is selectively coupled to the output line GOUT by a third switch SSW. The third switch SSW is controlled by the control signal SEL_CON.

The OPS, COS and / or SELS signals may be general selection and control signals, which signals are used in generating the channel level control signals OPCON1, OPCON2, COCONI, COCON2 and / or SEL_CON. The signals OPS, COS and / or SELS can also be provided as test mode signals, which signals are passed through the data comparator circuit 530 to the source line driver circuits 510/520, for example, by corresponding signals from the switching circuit OPS, COS and / or SELS with the subjecting channel level control signals OPCON1, OPCON2, COCON1, COCON2 and / or SELjCON generated by data comparator circuit 530 to a logical OR operation. In such a manner, the reduced pin count test equipment can be used with embodiments of the invention.

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In operation, the data comparator circuit 530 compares the channel data for two channels of a pixel (CHN_DATA1 and CHN_DATA2) and if the data have the same value, they control the source line driver circuits 510, 520 to disable the buffer CHN_BUF2 of the second source line driver circuit 520 and disable the ROUT and GOUT outputs with the first source line driver circuit 510. The buffer amplifier CHN_BUF1 thus provides a common buffer amplifier for the two channels of pixel data based on the comparison of the data for the two channels. In particular, the following truth table describes the state of the control signals based on the results of the data comparison.

Comparison OPCON1 OPCON2 COCON1 COCON2 SEL_CON

CHN_DATA1 = CHN_DATA2 Active Inactive Active Inactive Active CHN__DATA1 Φ CHN_DATA2 Active Active Active Active Inactive 15 In the above table, an active signal results in closure of the corresponding switches or activation of the buffer amplifier. For example, when OPCON2 is active, the buffer amplifier CHN_BUF2 is activated and when OPCON2 is inactive, the buffer amplifier CHN_BUF2 is disabled. When the signal SEL_CON is active, the switch SS2 is closed correspondingly and when the signal SEL CON is inactive, the switch SSW is open.

FIG. 7A and 7B are schematic illustrations of portions of buffer amplifiers suitable for use in some embodiments of the invention. FIG. 7A shows a portion of an input circuit of a buffer amplifier that includes input transistors T2 and T3 and a control transistor T1. The control transistor T1 can selectively disconnect the input transistors T2 and T3 from a voltage source, such as VDD, to thereby reduce or eliminate the flow of current in the input circuit of the buffer amplifier.

Similarly, FIG. 7B shows a portion of an output circuit of a buffer amplifier that includes output transistors T11 and T13 and control transistors T10 and T12. The control transistors T10 and T12 can selectively couple the gates of the output transistors T11 and T13 to a voltage source such as VDD or VSS to switch off the transistors T11 and T13 and thereby the flow of current in the output circuit of reduce or eliminate the buffer amplifier.

FIG. 8 is a schematic illustration of a data comparator circuit that generates control signals for controlling source line drives, such as the source line drives shown in FIGS. 3, 4, 5, and / or 6. As can be seen in Fig. 8, a first 1 to N bits of input data DATA_A <1> .... DATA_A <N> are compared to corresponding bits of a second 1 to N bits of input data DATA__B <1> ... DATA_B <N> by performing an EXCLUSIVE OR operation on respective bit pairs using, for example, XOR gates such as the XOR gates 700, 702, 704 and 706. The XOR gates 700, 702 output , 704 and 706 are together subjected to a logical NOR operation using a NOR-gate 710 with N inputs and the output of the NOR-gate 710 is used to control the multiplexers 720, 722 and 724 in order to control the control signals on to awaken. In certain embodiments, the outputs of the multiplexers 720, 722 and 724 with the signals OPS, COS and / or SELS can be subjected to a logical OR operation (not shown), as explained above.

The output from the NOR gate 710 is provided to a first 2 to 1 MUX 720, which has OPCON1 and Ground as inputs. When the output from the NOR gate 710 is a logic "low" value, indicating that at least one of the bit pairs does not match, OPCON1 is provided as the OPCON2 signal and the buffer amplifiers are active. When the output from the NOR gate 710 is a logic "high" value, indicating that all bit pairs match, Ground is provided as the OPCON2 signal and the second buffer amplifier (s) is (are) inactive.

The output from the NOR gate 710 is also provided to a second 2 to 1 MUX 722, which has COCON1 and Ground as inputs. When the output of the NOR gate 710 is a logic "low" value, which indicates that at least one of the bit pairs does not match, COCON1 is provided as the COCON2 signal and the buf-35 amplifier amplifiers are coupled to their respective output lines . When the output of the NOR gate 710 is a logic "high" value, which indicates that all bit pairs match, Ground is provided as the COCON2 signal and the second buffer amplifier (s) is (are) isolated from its / their output line (and).

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The output from the NOR gate 710 is also provided to a third 2 to 1 MUX 724, which has VDD and Ground as inputs. When the output from the NOR gate 710 is a logic "low" value, which indicates that at least one of the bit pairs does not match, Ground is provided as the SELCON signal and the first buffer amplifier (s) are isolated of the output line (s) connected to the second buffer amplifier (s). When the output of the NOR gate 710 is a logic "high" value, which indicates that all bit pairs match, VDD is provided as the SELCON signal and the first buffer amplifier (s) on the output line (s) becomes ) of the second buffer amplifier (s).

The data comparison circuit of Fig. 8 is shown with reference to XOR ports and a NOR port to provide the comparison of data bits. However, as may be apparent to those skilled in the art, other logic circuit configurations may be provided to perform the data comparison function. For example, XNOR ports can be used to compare bits and an AND port can be used to aggregate the comparison. By inverting the MUX inputs, the NOR or AND-20 port that joins the XOR output can be an OR or NAND port.

Although the merging logic gate is represented as an N input port, similarly, multiple logic gates can be used to provide the function of the merging logic gate. Therefore, the embodiments of the invention should not be construed as being limited to the particular logic gate configuration shown in FIG. 8.

FIG. 9 is a circuit diagram of a source control circuit 100 according to another embodiment of the invention. The source driver circuit 800 turns on portions of buffer amplifiers installed in the source line driver circuit 800 and turns off the remaining buffer amplifiers when color data for controlling adjacent cells of a panel (not shown) is equivalent to each other, and simultaneously controls the colors of the neighboring cells using the switched on buffer server amplifiers.

Since first color data DATA_RGB1 and second color data DATA_RGB2 have been described above, a detailed description thereof will be omitted.

That the first color data DATA_RGB1 is identical to the second color data DATA_RGB2 should be understood as the first R-channel data DATA_R1 being identical to second R-channel data DATA_R2, first G-channel data DATA_G1 being identical to second G-channel data DATA_G2 and first B channel data DATA_B1 are identical to second B channel data DATA_B2.

A data comparator circuit 830 of the source line driver circuit 800 compares the first and second color data DATA_RGB1 and DATA_RGB2 and generates a first operation control signal OPCON1, a second operation control signal OPCON2, a first connection control signal COCON1, and a second connection control signal COCONON control signal, SEL, and selection signal SEL. on the result of the comparison, an operation signal OPS, a connection signal COS and a selection signal SELS.

The operation signal OPS, the connection signal COS and the selection signal SELS and the first and second operation control signal OPCON1 and OPCON2, the first and second connection control signal COCON1 and C0C0N2, and the selection control signal SEL__CON, which are output by the data comparator circuit 830, will later in detailed.

A first source line driver circuit 710 receives the first color data DATA_RGB1 and controls the color of a cell corresponding to the first color data DATA_RGB1. A second source line driver circuit 720 receives the second color data DATA_RGB2 and controls the color of a cell corresponding to the second color data DATA_RGB2.

Although not shown in the drawings, the source line driver circuit 800 further includes a number of source line drivers, the construction of which is identical to that of the first or second source line driver circuit 710 or 720, in addition to the first and second source line driver circuits 710 and 720. however, for convenience, the source line driver circuit 800 will be described with respect to the first and second source line drivers 710 and 720, which are randomly selected.

The cells of the panel, which are controlled by the first and second sourcing driver circuits 710 and 720, are adjacent to each other. This embodiment has also been described for a case in which only two parts of color data are equivalent to each other, but the invention is not limited to the above description. That is, the invention can be applied to a case where two or more parts of color data are equivalent to each other.

The first source line driver circuit 710 contains first to nth buffer amplifiers, and the second source line driver circuit 720 contains n + 1 th to 2 nth buffer amplifiers (n can be 3). When the first and second color data DATA_RGB1 and DATA__RGB2 are equivalent to each other, parts of the first to 2 nth buffer amplifiers are turned on and the other buffer amplifiers are turned off. For example, the odd-numbered buffer amplifiers from the first to 2 nth buffer amplifiers can be turned on and the even-numbered buffer amplifiers can be turned off.

The operation of the first to 2n buffer amplifiers is controlled by the first and second operation control signals OPCON1 and 0PC0N2, the first and second connection control signals COCNN1 and COCON2, and the selection control signal SEL_CON, which are output from the data comparator circuit 830.

The first source line driver circuit 710 includes a first R decoder DR1, a first G decoder DG1, a first B decoder DB1, a first R buffer amplifier R_BUF1, a first G-20 buffer amplifier G_BUF1, a first B buffer amplifier B_BUF1, a first R switch R_SW1, a first G switch G_SW1 and a first B switch B__SW1.

The first R decoder DR1 decodes the first R channel data DATA_R1 from the first color data DATA_RGB1 and outputs a first R-voltage signal R_VOL1. The first G-decoder DG1 decodes the first G-channel data DATA_G1 and outputs a first G-voltage signal G_V0L1. The first B decoder DB1 decodes the first B channel data DATA_B1 and outputs a first B voltage signal B_V0L1.

The first R-channel data DATA_R1 is 6-bit data. The first R-decoder DR1 outputs the 6-bit data as the first R-voltage signal R_V0L1 with a voltage level corresponding to the value of the 6-bit data. If the first and second R-channel data DATA_R1 and DATA_R2 are equivalent to each other, the voltage of the first R-voltage signal R ^ VOL1 is equivalent to that of the second R-voltage signal R_VOL2.

Thus, it is possible to control the color of a cell corresponding to the second R-channel data DATAR2 using - the first R-channel data DATA_R1 instead of the second R-channel data DATA_R2.

The first R-buffer amplifier R_BUF1 buffers and outputs the first R-voltage signal R_V0L1, and is switched on or off in response to the first operation control signal 0PC0N1. The first G buffer amplifier G_BUF1 buffers and outputs the first G voltage signal G_VOL1, and is turned on or off in response to the second operation control signal 0PC0N2.

The first B buffer amplifier B_BUF1 buffers the first B voltage signal B_V0L1 and outputs this signal, and is switched on or off in response to the first operation control signal OPCON1.

The first B buffer amplifier B_BUF1 and the first R switch R_SN1 connect or disconnect the output terminal RBON1 of the first R buffer amplifier R_BUF1 and the output terminal BBON1 of the first B buffer amplifier B_BUF1 with or from their corresponding first R output line ROUT1 and first respectively B output line BOUT1 in response to the first connection control signal COCON1.

The first G switch G_SW1 connects or disconnects the output terminal GBON1 of the first G buffer amplifier G_BUF1 to or 20 of its corresponding first G output line GOUT1 in response to the second connection control signal C0C0N2.

The second source line driver circuit 820 includes a second R-decoder DR2, a second G-decoder DG2, a second B-decoder DB2, a second R-buffer amplifier R_BUF2, a second G-25 buffer amplifier G_BUF2, a second B-buffer amplifier B- BUF2, a second R switch R_SW2, a second G switch G_SW2 and a second B switch B_SW2.

The second R decoder DR2, the second G decoder DG2 and the second B decoder DB2 receive and decode the second R channel data DATA_R2, the second G channel data DATAJG2 and the second B channel data DATA_B2 of the second color data DATA_RGB2 and output the second R-voltage signal R_VOL2, a second G-voltage signal G_VOL2 and a second B-voltage signal B_VOL2, respectively.

The second R-buffer amplifier R_BUF2 and the second B-buffer amplifier B_BUF2 buffer and output the second R-voltage signal R_VOL2 and the second B-voltage signal B_VOL2, respectively. The second R-buffer amplifier R_BUF2 and the second B-buffer amplifier B_BUF2 are switched on or off in response to the second operation control signal 0PC0N2.

The second G-buffer amplifier G_BUF2 buffers the second G-voltage signal G_V0L2 and outputs this signal and is switched on or off in response to the first operation control signal 0PC0N1.

In response to the second connection control signal C0C0N2, the second R switch R_SW2 and the second B switch B_SW2 connect or disconnect an output terminal RB0N2 from the second R buffer server R_BUF2 and an output terminal BB0N2 from the second B-buf-10 amplifier amplifier B_BUF2 with or from their corresponding second R-output line ROUT2 and second B-output line BOUT2 respectively.

In response to the first link control signal COCON1, the second G switch G_SW2 connects or disconnects an output terminal GBON2 from the second G buffer amplifier G_BUF2 to or from its corresponding second G output line G0UT2.

An output terminal RBON1 and a second R output line ROUT2 of the first R buffer amplifier R_BÜF1 are connected to each other or disconnected from each other in response to a first selection switch SSW1. An output terminal GBON2 and a first G-output line GOUT1 of the second G buffer amplifier G_BUF2 are connected to each other or disconnected in response to a second selection switch SSW2. An output terminal BBON1 and a second B output line BOUT2 of the first B buffer amplifier B_BUF1 are connected to each other or disconnected in response to a third selection switch SSN3.

The first selection switch SSJVI, the second selection switch 5SW2 and the third selection switch SSW3 are controlled by the selection control signal SEL_CON.

When the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2, the first operation control signal OPCON1 is activated to switch on the first R-buffer amplifier R_BUF1, the second G-buffer amplifier G_BLJF2 and the first B-buffer buffer amplifier B_BUF1. However, the second operation control signal OPCON2 is deactivated to switch off the second R buffer amplifier R_BUF2, the first G buffer amplifier G_BUF1 and the second B buffer amplifier B_BUF2.

When the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2, the first connection control signal COCON1 is also activated to connect the first R switch R_SW1, the second G switch G_SW2 and the first B switch B_SW1. However, the second connection control signal COCON2 is deactivated to disconnect the second R switch R_SW2, the first G switch G_SW1 and the second B switch B_SW2I from each other.

When the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2, the selection control signal SEL_CON is also activated to connect the first selection switch SSW1, the second selection switch SSW2 and the third selection switch SSW3.

When the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2, the odd-numbered buffer amplifiers, i.e. the buffer amplifiers R_BUF1, G_BUF2 and BUF_1, of the six buffer amplifiers of the first and second source line driver circuits 710 and 720 are turned on, the first R-15 switch R_SW1, the second G switch G_SW2 and the first B switch B_SW1 are connected, and the first selection switch SSW1, the second selection switch SSW2 and the third selection switch SSW3 are connected.

In this case, two neighboring cells can be controlled using only the three buffer amplifiers R_BUF1, G_BUF2 and B_BUF 'of the six buffer amplifiers. That is, the first R voltage signal R_V0L1 is output on the first R output line ROUT1 and the second R output line ROUT2, the first B voltage signal B_V0L1 on the first B output line BOUT1 and the second B output line becomes B0UT2 and the second G-voltage signal G_VOL1 on the second G-output line GOÜT2 and the first G-output line GOUT1 is output.

When the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2, the voltage of the first R-30 voltage signal R_VOL1 is equivalent to the voltage of the second R-voltage signal RVOL2, the voltage of the first G-voltage signal G_VOL1 is equivalent to the voltage of the second G-voltage signal G_V0L2, and the voltage of the first B-voltage signal B_V0L1 is equivalent to the voltage of the second B-voltage signal B_VOL2.

Even when the voltage signals R_VOL1, G_VOL2 and B_VOL1 are input to the two cells, as described above, the colors of the two cells are accordingly the same. Thus, since the second R buffer amplifier R_BUF2, the first G buffer amplifier, G_BUF1, and the second B buffer amplifier B_BUF2, it is possible to minimize the power consumption of the source driver 700.

If the first and second color data DATA_RGB1 and DATA_RGB2 differ, the source line driver circuit 800 acts as a conventional source driver.

In the source line driver circuit 800, the odd-numbered buffer amplifiers are turned on and the even-numbered buffer amplifiers are turned off when the first and second color data DATA_RGB1 and DATA_RBG2 are equivalent to each other. However, the invention is not limited to the above description. That is, the source line driver circuit 800 can be manufactured such that the even-numbered buffer amplifiers are turned on and the odd-numbered buffer amplifiers are turned off when the first color data DATA_RGB1 is equivalent to the second color data DATARGB2. A method for manufacturing such a source control is deemed to be clear to the skilled person and a detailed description thereof will therefore be omitted.

When the first and second color data DATA_RGB1 and DATA_RGB2 are equivalent to each other, the data comparator circuit 830 activates the second operation control signal OPCON1 and this data comparator circuit 830 deactivates the second operation control signal 0PC0N2 in response to the operation signal OPS. When the first and second color data DATA_RGB1 and DATA_RGB2 differ from each other, the data comparator circuit 830 activates the first operation control signal 0PC0N1 and the second operation control signal 0PC0N2 in response to the operation signal OPS.

When the first and second color data DATA_RGB1 and DATA_RGB2 are equivalent to each other, the data comparator circuit 830 also activates the first connection control signal COCON1 and this data comparator circuit 830 deactivates the second connection control signal COCON2 in response to the connection signal COS. When the first color data DATA_RGB1 and the second color data DATA_RGB2 differ from each other, the data comparator circuit 830 activates the first link control signal COCON1 and the second link control signal COCON2 in response to the link signal COS.

When the first color data DATA_RGB1 and the second color data DATA_RGB2 are equivalent to each other, the data comparator circuit 830 also activates the selection control signal SEL_C0N in response to the selection signal SELS. When the first color data DATA_RGB1 and the second color data DATA_RGB2 differ from each other, the data comparator circuit 830 deactivates the selection control signal SEL_CON in response to the selection signal SELS.

As described above, the data comparator circuit 830 determines whether the first color data DATA_RGB1 is equivalent to the second color data DATA_RGB2 and this data comparator circuit 830 changes the levels of output signals according to the result of this determination. The circuit construction of the data comparator circuit 830 is considered to be clear to those skilled in the art and therefore a detailed description thereof will be omitted.

FIG. 10A is a circuit diagram showing a method for testing the internal buffer amplifiers R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 of the source line driver circuit 200 of FIG. 4 according to an embodiment of the invention. Output terminals of the source driver 200 are connected to corresponding terminals DQR1, DQG1, DQB1, DQR2, DQG2 and DQB2, respectively. When the first and second color data DATA_RGB1 and DATA_RGB2 are equivalent to each other, with reference to FIG. 8A, the buffer amplifiers R_BUF1, G_BUF1 and B_BUF1 of the first source line driver circuit 210 are turned on and these buffer amplifiers are active, but the buffer amplifiers R_BUF2, and B_BUF2 of the second source line driver circuit 220 is turned off and are inoperative.

Subsequently, the probe ends T1, T2 and T3 are only connected to the connection pads DQR2, DQG2 and DQB2 respectively to test the buffer amplifiers R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2. The switched-on buffer amplifiers R_BUF1, G_BÜF1 and B_BUF1 are then tested by the probe ends T1, T2 and T3.

Subsequently, the switched-off buffer amplifiers R_BUF2, G_BUF2 and B_BUF2 are tested by connecting these buffer amplifiers to the terminals DQR2, DQG2 and DQB2, as indicated by the dashed lines.

As shown in Fig. 10A, according to the invention, 35 probe ends are connected to three connection pads of six connection lines of a source line driver circuit, so as to thereby simultaneously test two chips using fewer probe tips.

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FIG. 10B is a diagram showing the arrangement of interfaces, such as those of FIG. 10A, according to an embodiment of the invention. The arrangement of the connecting surfaces of Fig. 10B is called a stepped type arrangement. With reference to Fig. 10B, three probe ends T1, T2 and T3 are connected to three terminals of six terminal terminals of a source driver.

FIG. 11 is a circuit diagram illustrating the connection of probe ends T1, T2 and T3, which are used to connect the internal buffer amplifiers R1 BUF1, GJBUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 of the sour cell line driver circuit 800 of FIG. 9, shows. Referring to FIG. 11, the connection pads are DQR1, DQG1, DQB1, DQR2, DQG2 and DQB2 with the first R output line ROUT1, the first G output line GOUT1, the first B output line BOUT1, the second R output line ROUT2, the second G-output line GOUT2 and the second B-output line B0UT2 respectively of the source line driver circuit 900 are connected. In addition, the probe ends T1, T2 and T3 are connected to parts of the terminals DQR1, DQG1, DQB1, DQR2, DQG2 and DQB2 to test the connected terminals.

All internal buffer amplifiers R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 are then tested by alternately activating the selection control signal SEL ^ CON and the second connection control signal COCON2.

FIG. 12A is a circuit diagram showing a method for testing the internal buffer amplifiers R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B__BUF2 of the source cell driver circuit 800 of FIG. 9. Referring to Fig. 12A, the probe ends Τ ', T2 and T3 are connected to the terminals DQG1, DQR2 and DQB2, respectively. The terminals DQG1, DQR2 and DQB2 correspond to the buffer amplifiers G_BUF1, R_BUF2 and B_BUF2, which are controlled in response to the second operation control signal 0PC0N2.

When the selection control signal SEL_CON is activated and the second connection control signal COCON2 is deactivated, the buffer amplifiers R_BUF1, G_BUF2 and B_BUF1, which are controlled by the first operation control signal OPCON1, are tested first.

Although test data for testing buffer amplifiers is entered in all buffer amplifiers R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BÜF2 and B_BUF2, only the buffer amplifiers R__BUF1, G_BUF2 and B_BÜF1 are tested first.

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When the selection control signal SEL_CON is deactivated and the second connection control signal C0C0N2 is activated, the buffer amplifiers R_BÜF2, G_BUF1 and B_BUF2, which are controlled by the second operation control signal OPCON2, are tested, as indicated by the dashed lines.

Although not shown in the drawings, the source line driver circuit 800 further includes control logic, which receives a control signal (not shown) from an external testing device (not shown) and controls the selection control signal SEL_CON and the second connection control signal C0C0N2 in a test mode. The control logic that controls the above test operation of the source line driver circuit 800 is well known to those skilled in the art and a detailed description thereof will be omitted.

FIG. 12B is a diagram showing the arrangement of connection faces, such as that of FIG. 12A, according to an embodiment of the invention. The arrangement of the connecting surfaces of Fig. 12B is also referred to as a stepped type arrangement. With reference to Fig. 12B, the three probe ends T1, T2 and T3 are each connected to one of each pair of terminals of a source line driving circuit.

With the method of Fig. 12A, it is possible to simultaneously test two chips with half the number of probe ends required in a conventional method. In addition, the pitch distances between the probe ends T1 and T2 and between the probe ends T2 and T3 are greater in the method of Fig. 12A than in the method of Fig. 10A, causing malfunction of a probe card (not shown) during the test is prevented.

Although embodiments of the invention have been described and illustrated herein with reference to "switches", the reference to switches refers to a switching device and it may be a fixed-state switching device, a mechanical switching device or other switching device. For example, in certain embodiments of the invention, switches C_SW1, C_SW2, R_SW1, G_SW1, B_SW1, R_SW2, G_SW2, BJSW2, SSW, SSW1, SSW2 and SSW3 may be provided as trans-sistors. The embodiments of the invention should therefore not be construed as being limited to a particular switching device, but can use any device capable of selectively connecting the amplifiers to the outputs. Furthermore, signals in the active state may be high or low depending on the particular configuration of the circuit. The embodiments of the invention should therefore not be construed as being limited to a certain operating polarity.

The embodiments of the invention are further described with reference to RGB data, however, other types of data such as YPrB data can also be used to compare pixel values at the pixel and / or channel level. Furthermore, additional comparisons can also be provided if, for example, more than three components are provided. For example, if a white (W) component is provided, a comparison of pixel / channel values may also include the W value and / or be performed based on the W value. The embodiments of the invention should therefore not be construed as being limited to the RGB examples explained herein, but can be used with any system that allows comparison of values for a pixel and / or channel of a pixel.

Embodiments of the invention have been described with reference to a comparison of values associated with two pixels or two channels for a pixel. In other embodiments of the invention, however, values from more than two pixels / channels can be compared. In such embodiments, the output of a buffer amplifier can be selectively coupled to more than two source lines. Also, the determined outputs to which a buffer amplifier is coupled can be selected based on the comparison or these determined outputs can be fixed. In cases where, for example, values for more than two pixels are compared, the control can thus be based on all values that are equal or any two or more values that are equal. Combinations of pixel and / or channel level comparisons can also be provided. For example, when two channels are compared, the two channels may come from the same and / or different pixels.

What values are compared can also be static or dynamic. Thus, for example, a sliding comparison of a value can be performed when a value for a first pixel is compared with a value for a second pixel and then the value for the second pixel is compared with a value for a third pixel and this pattern is repeated is becoming. Alternatively or additionally, in a static system, a value for a first pixel is compared with a value for a second pixel and a value for a 40 third pixel is compared with a value for a fourth pixel.

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Although the invention has been particularly shown and described with reference to particular embodiments thereof, it will be apparent to those skilled in the art that various changes in form and detail may be made therein without the spirit and scope of the invention as defined by the following conclusions.

027799

Claims (99)

A method for controlling source lines of a display device, comprising: comparing first data for driving a first buffer connected to a first source line of the display device and second data for controlling a first buffer connected to a second source line of the display device connected second buffer; selectively decommissioning the second buffer based on the comparison of the first and second data and selectively driving the second source line of the display device with the first buffer based on the comparison of the first and second data. 2. Method as claimed in claim 1, wherein the first data and the second data comprise corresponding red data, green data and / or blue data connected to the first source line and the second source line. The method of claim 1, wherein the first data comprises one of red data, green data or blue data and the second data comprises a corresponding of red data, green data or blue data and wherein the first source line and the second source line associated with two different pixels are corresponding source lines. 4. Method as claimed in claim 1, wherein the first data comprises one of red data, green data and blue data and the second data comprises different data of red data, green data and blue data. The method according to any of the preceding claims, wherein the comparison step comprises: determining whether the first data and the second data have the same value. 6. Method according to any of the preceding claims, wherein the first data and the second data comprise RGB data for two different pixels, the first buffer a first red source line buffer, a first green source line buffer and a first blue source line buffer and the second buffer comprises a second red source line buffer, a second green source line buffer and a second blue source line buffer. The method according to any of the preceding claims, wherein selectively disabling the second buffer comprises selectively decoupling the second source line from the second buffer, 12779 9 - 34 - when the first buffer controls the first source line and the second source line . 8. Method according to any of the preceding claims, wherein selectively deactivating the second buffer comprises selectively deactivating a differential amplifier input circuit and / or an output driver circuit of the second buffer. 9. Method according to any of the preceding claims, wherein the first source line and the second source line are source lines of the same pixel. The method of any one of claims 1-9, wherein the first source line and the second source line are source lines for different pixels. 11. Method according to any of the preceding claims, wherein the first data and the second data comprise corresponding red data, green data, blue data and / or white data connected to the first source line and the second source line. A method according to any of the preceding claims, wherein the display device comprises a display with liquid crystals. A method according to any of the preceding claims, wherein comparing first data for driving a first buffer connected to a first source line of the display device and second data for driving a first buffer line of the display device connected second buffer comprises comparing first data for driving a number of first buffers connected to a first number of source lines and second data for driving a number of second buffers connected to a second number of source lines; and wherein selectively disabling the second buffer and driving the second source line of the display device with the first buffer based on the comparison of the first and second data selectively disabling the second number buffers and driving the second number of source lines of the display device with the first number of buffers based on the comparison of the first and second data. A method for controlling source lines of a display device, comprising: comparing data for driving a first source line of the display device with data for driving at least one other source line of the display device; Selectively driving the at least one other source line and the first source line with a common source line buffer based on the data comparison; and deactivating a source line buffer from the at least one other source line if the at least one other source line is driven by the common source line buffer. B output line is connected to probe ends, which probe ends are used to test the buffer amplifiers, and all buffer amplifiers are tested when the selection control signal and the second connection control signal are alternately activated. 15. Method according to claim 14, wherein comparing data comprises comparing data for driving a first source line of the display device with data for driving each of a number of other source lines of the display device; wherein selectively driving the at least one other source line and the first source line with a common source line based on the data comparison comprises controlling the first source line and selected other source lines of the plurality of other source line with the common source line buffer; and wherein deactivating a source line buffer comprises deactivating source line buffers for each of the plurality of source lines driven by the common source line buffer. 16. A method according to any of claims 14-15, wherein driving the first source line and selected other source lines from the number of other source line with the common source line buffer driving the first source line and each source line from the number of other source lines with the common source line buffer. 17. Method according to any of claims 14-16, wherein deactivating a source line buffer comprises selectively deactivating a differential amplifier input circuit and / or an output driver of the source line buffer. A method according to any of claims 14-17, wherein the first source line and the at least one other source line are source lines of the same pixel. 19. A method according to any of claims 14-19, wherein the first source line and the at least one other source line are source lines for different pixels. A method according to any of claims 14-19, wherein the first source line and the at least one other source line are source lines connected to the same color component for at least two different pixels. - 36 - A method according to any of claims 14-19, wherein the first source line and the at least one other source line are source lines connected to different color components. The method of claim 21, wherein the first source line 5 and the at least one other source line are source lines of different pixels. The method of claim 21, wherein the first source line and the at least one other source line are source lines of a single pixel. The method of any one of claims 14-23, wherein the first source line comprises a first number of source lines and the at least one other source line comprises a second number of source lines; wherein comparing data for driving a first source line of the display device with data for driving at least one other source line of the display device comparing data for driving the first number of source lines of the display device device with data for controlling the second number of source lines of the display device; 20 wherein selectively driving the at least one other source line and the first source line with a common source line buffer based on the data comparison selectively driving the second number of source lines and the first number of source lines with a number of common source line buffers based on the includes data comparison; and wherein deactivating a source line buffer of the at least one other source line, if the at least one other source line is controlled by the common source line buffer, comprises deactivating source line buffers of the second number of source lines 30, if the second number of source lines is connected by the number of common source lines Sourcing line buffers are controlled. 25. Method as claimed in claim 24, wherein the data for controlling the first number of source lines of the display device and the data for controlling the second number of source lines of the display device comprise RGB data. The method of claim 24, wherein comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device comparing 40 components of the data for controlling the first number of source lines of the display device with corresponding components of the data for controlling the second number of source lines of the display device. 27. Method as claimed in claim 24, wherein comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device comparing all data for driving the first number of source lines of the display device including all data for controlling the second number of source lines of the display device. A method according to any of claims 14-27, wherein the data for driving a first source line of the display device is red, green, blue and / or white data and the data for driving at least one other source line of the display device comprises red, green, blue and / or white data. A method according to any of claims 14-28, wherein the display device comprises a liquid crystal display panel. 30. A buffer circuit for driving source lines of a display device, comprising: a data comparator circuit which compares a first data value connected to a first source line of the display device and a second data value connected to a second source line of the display device; a first buffer that drives the first source line based on a first data value; a second buffer that drives the second source line based on the second data value, the second buffer responding to the data comparator circuit to selectively deactivate the second buffer; and a first switching circuit adapted to selectively electrically couple the first buffer to the second source line in response to the data comparator circuit. The buffer circuit of claim 30, wherein the first data and the second data comprise corresponding red data, green data and / or blue data connected to the first source line and the second source line. The buffer circuit of claim 31, wherein the first data includes one of red data, green data, and blue data, and the second data comprises a corresponding of red data, green data, and blue data, and wherein the first source line and the second source line are connected to two different pixels of the display device corresponding source lines. The buffer circuit of claim 30, wherein the first data includes one of red data, green data, and blue data, and the second data comprises different data of red data, green data, and blue data. A buffer circuit as claimed in any one of claims 30 to 33, wherein the data comparator circuit is adapted to determine whether the first data and the second data have the same value. 35. A buffer circuit as claimed in any of claims 30-34, wherein the first data and the second data comprise RGB data for two different pixels of the display device, the first buffer a first red buffer arranged to receive a first to drive a red-source line, a first green-buffer arranged to drive a first green-source line, and a first blue-buffer arranged to drive a first blue-source line, and the second buffer a second red buffer adapted to drive a second red source cell and to be selectively disabled in response to the data comparator circuit, a second green buffer adapted to a second green source line and to be selectively deactivated in response to the data comparator circuit, and a second blue buffer adapted to drive a second blue source cell and to be selectively deactivated in response to the data comparator circuit; wherein the first switching circuit is adapted to selectively electrically couple the first red buffer to the second red source line in response to the data comparator circuit, to connect the first blue buffer selectively to the second blue source line in response to the data comparator circuit and selectively electrically coupling the first green buffer to the second green source line in response to the data comparator circuit. A buffer circuit according to any of claims 30-35, further comprising a second switching circuit adapted to selectively electrically disconnect the second buffer from the second source line in response to the data comparator circuit such that the second buffer of the second source line is disconnected if the first buffer is linked to the second source line. The buffer circuit of claim 36, wherein the data comparator circuit comprises: a plurality of logic gates, comparing corresponding data bits of the first and second data values; a merging logic gate which aggregates outputs of the plurality of logic gates and outputs a first signal if the outputs of the plurality of logic gates all have the same logic value; and a plurality of multiplexers, which selectively provide control signals to the first and second switching circuits based on the output of the merging logic gate. 38. A buffer circuit according to claim 37, wherein the plurality of logic gates comprises a plurality of XOR gates, and wherein the merging logic gate comprises a NOR gate. The buffer circuit of claim 37 or 38, wherein the merging logic gate comprises a plurality of logic gates. A buffer circuit as claimed in any one of claims 37 to 39, wherein the plurality of multiplexers comprises: a first multiplexer adapted to generate a control signal to control the operation of the second buffer; and a second multiplexer adapted to generate a control signal to control the operation of the first switching circuit to couple the first buffer to the second source line; and a third multiplexer that is arranged to generate a control signal to control the operation of the second switching circuit to disconnect the second buffer from the second source line. A buffer circuit as claimed in any of claims 30-40, wherein the second buffer comprises an input circuit, which input circuit is adapted to selectively disconnect transistors from a voltage source if the second buffer has been deactivated. 42. A buffer circuit as claimed in claim 41, wherein the second buffer further comprises an output circuit, which output circuit is adapted to control output driver transistors of the output circuit in order to decouple an output line of the second buffer from output voltage sources of the second buffer. - 40 - A buffer circuit according to any of claims 30-42, wherein the display device comprises a liquid crystal display device. 44. System for controlling source lines of a display device, comprising: means for comparing first data for driving a first buffer connected to a first source line of the display device and second data for controlling a second buffer connected to a second source line of the display device; means for selectively disabling the second buffer in response to the means for comparing and means for selectively driving the second source line of the display device with the first buffer based on the comparison of the first and second data. The system of claim 44, wherein the first data and the second data comprise corresponding red data, green data and / or blue data connected to the first source line and the second source line. The system of claim 44, wherein the first data comprises one of red data, green data, and blue data, and the second data comprises a corresponding of red data, green data, and blue data, and wherein the first source line and the second source line associated with two different pixels are corresponding source lines. The system of claim 44, wherein the first data comprises one of red data, green data and blue data and the second data comprises different data of red data, green data and blue data. A system according to any of claims 44 to 47, wherein the means for comparing comprises means for determining whether the first data and the second data have the same value. A system according to any of claims 44-48, wherein the first data and the second data comprise RGB data for two different pixels, the first buffer a first red source line buffer, a first green source line buffer and a first blue source line buffer and the second buffer comprises a second red source line buffer, a second green source line buffer and a second blue source line buffer. - 41 - 50. A system according to any of claims 44-49, wherein the means for selectively deactivating the second buffer further comprises means for selectively decoupling the second buffer line from the second source line, when the first buffer links the first source line and controls the second source line. 51. A system according to any of claims 44-50, wherein the means for selectively disabling the second buffer comprises means for selectively disabling a differential amplifier input circuit and / or an output driver circuit of the second buffer. A method according to any of claims 44-51, wherein the first source line and the second source line are source lines of the same pixel. The system of any of claims 44 to 51, wherein the first source line and the second source line are source lines for different pixels. 54. System according to any of claims 44-53, wherein the first data and the second data correspond to the first source line and the second source line corresponding red data, green data, blue data and / or white data. include. The system of any of claims 44 to 54, wherein the display device comprises a display with liquid crystals. 56. A system according to any of claims 44-55, wherein the means for comparing first data for driving a first buffer connected to a first source line of the display device and second data for driving a first buffer connected to a second source line of the display device comprises second buffer means for comparing first data for driving a number of first buffers connected to a first number of source lines and second data for driving a number of second buffers connected to a second number of source lines; and wherein the means for selectively disabling the second buffer and the means for selectively controlling the second source line of the display device with the first buffer means for selectively disabling the second number of buffers and controlling of the second number of source lines of the display device with the first number of buffers in response to the comparing means. 57. System for controlling source lines of a display device, comprising: - 42 - means for comparing data for controlling a first source line of the display device with data for controlling at least one other source line of the display device; Means for selectively driving the at least one other source line and the first source line with a common source line buffer based on the data comparison; and means for deactivating a source line buffer from the at least one other source line if the at least one other source line is driven by the common source line buffer. 58. System as claimed in claim 57, wherein the means for comparing data means for comparing data for controlling a first source line of the display device with data for controlling each source line of a number of other source lines of include the display device; wherein the means for selectively driving the at least one other source line and the first source line with a common source line buffer comprises means for driving the first source line and selected other source lines from the plurality of other source line with the common source line buffer; and wherein the means for deactivating a source line buffer comprises means for deactivating source line buffers for each source line of the number of source lines driven by the common source line buffer. The system of claim 57 or 58, wherein the means for driving the first source line and selected other source lines of the plurality of other source line with the common source line buffer means for controlling the first source line 30 and each source line of the number of other source lines with include the common source line buffer. A system according to any of claims 57-59, wherein the means for deactivating a source line buffer comprises means for selectively deactivating a differential amplifier input circuit and / or an output driver circuit of the source line buffer. The system of any of claims 57-60, wherein the first source line and the at least one other source line are source lines of the same pixel. - 43 - The system of any of claims 57-60, wherein the first source line and the at least one other source line are source lines for different pixels. 63. A system according to any of claims 57-60 or 62, wherein the first source line and the at least one other source line are source lines connected to the same color component for at least two different pixels. A system according to any of claims 57-62, wherein the first source line and the at least one other source line are source lines 10 connected to different color components. The system of claim 64, wherein the first source line and the at least one other source line are source lines of different pixels. The system of claim 64, wherein the first source line 15 and the at least one other source line are single-line source lines. A system according to any of claims 57-66, wherein the first source line comprises a first number of source lines and the at least one other source line comprises a second number of source lines; 20 wherein the means for comparing data for driving a first source line of the display device with data for driving at least one other source line of the display device means for comparing data for driving the first number source line of the display device with data for driving the second number of source lines of the display device; wherein the means for selectively driving the at least one other source line and the first source line with a common source line buffer comprises means for selectively driving the second number of source line and the first number of source line with a number of common source line buffers; and wherein the means for deactivating a source line buffer of the at least one other source line, if the at least one other source line is driven by the common source line buffer, comprises means for deactivating source line buffers of the second number of source line if second number of source line is driven by the number of common source line buffers. The system of claim 67, wherein the data for driving the first number of source lines of the display device and the data for driving the second number of source lines of the display device RGB data include. 69. System as claimed in claim 67 or 68, wherein the means for comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device means for comparing of components of the data for driving the first number of source lines of the display device with corresponding components of the data for driving the second number of source lines of the display device. 70. A system according to claim 67 or 69, wherein the means for comparing data for driving the first number of source lines of the display device with data for driving the second number of source lines of the display device means for comparing all data for driving the first number of source lines of the display device with all data for driving the second number of source lines of the display device. A system according to any of claims 57-70, wherein the data for controlling a first source line of the display device is red, green, blue and / or white data and the data for controlling at least one other source line of the display device comprises red, green, blue and / or white data. The system of any of claims 57-71, wherein the display device comprises a liquid crystal display panel. 73. A method for driving first and second source lines of a display panel using first and second buffer amplifiers, comprising: selecting one of the first buffer amplifier and the second buffer amplifier to control the second source line based on values of display data driven on the first and second source lines. The method of claim 73, further comprising disabling the second buffer amplifier if the first buffer amplifier is selected to drive the second source line. - 45 - The method of claim 74, wherein the first and second source lines are for the same pixel of the display panel. 76. The method of claim 74, wherein the first and second source lines are for different pixels of the display panel. A method according to any of claims 73-76, wherein selecting one of the first buffer amplifier and the second buffer amplifier to drive the second source line based on values of display data driven on the first and second source lines comprises: selecting the first buffer amplifier to drive the second source line if the values of the display data driven on the first and second source lines are the same; and selecting the second buffer amplifier to drive the second source line if the values of the display data driven on the first and second source lines are different. 78. The method of claim 77, further comprising: driving the second source line with the first buffer amplifier if the first buffer amplifier is selected to drive the second source line; and driving the second source line with the second buffer amplifier if the second buffer amplifier is selected to drive the second source line. 79. A system for driving the first and second source lines of a display panel, comprising: first and second buffer amplifiers; and means for selecting one of the first buffer amplifier and the second buffer amplifier to drive the second source line based on values of display data driven on the first and second source lines 30. The system of claim 79, further comprising means for disabling the second buffer amplifier if the first buffer amplifier is selected to drive the second source line. The system of claim 79 or 80, wherein the first and second source lines are for the same pixel of the display panel. The system of claim 79 or 81, wherein the first and second source lines are for different pixels of the display panel. - 46 - 83. A system according to any of claims 79-82, wherein the means for selecting one of the first buffer amplifier and the second buffer amplifier to drive the second source line on the basis of values of displays driven on the first and second source lines. data data comprises: means for selecting the first buffer amplifier to drive the second source line if the values of the display data driven on the first and second source lines are the same; and means for selecting the second buffer amplifier to drive the second source line if the values of the display data driven on the first and second source lines are different. The system of claim 83, further comprising: means for driving the second source line with the first buffer amplifier if the first buffer amplifier is selected to drive the second source line; and means for driving the second source line with the second buffer amplifier if the second buffer amplifier is selected to drive the second source line. 85. A display device comprising: a display panel; a data comparator circuit adapted to compare display data values; 25 a plurality of source line drivers, which are arranged to receive display data and to control source lines of the display device based on the received display data; and a source line switching network responsive to the data comparator circuit and the number of source line drivers to selectively couple different source lines of the display device to respective source line controls of the number of source line controls based on the comparison of the display data values and wherein the number of source line controls responds on the data comparator circuit to selectively deactivate respective source line drivers of the number of source line drivers based on the comparison of the display data values. The display device of claim 85, wherein the source line switching network is arranged to disconnect deactivated source line drivers from the number of source line drivers of source lines 40 of the display device. - 47 - 87. A display device according to any of claims 85-86, wherein the source line switching network is arranged to link one source line driver to two source lines of the display panel if the data comparator circuit determines that the display data values corresponding to the two source lines are equal. A display device according to any of claims 85-88, wherein the display panel is a liquid crystal display panel. A display device according to any of claims 85-88, wherein the display panel is an organic light-emitting device. 90. Source driver, comprising: at least one first source line driver circuit, which receives first color data and controls the color of a cell corresponding to the at least one first source line driver circuit; and at least one second source line driver circuit, which receives second color data and controls the color of a cell corresponding to the at least one second source line driver circuit; wherein first to nth buffer amplifiers are installed in the at least one first source line driver and n + 1 th to 2n th buffer amplifiers are installed in the at least one second source line driver when the first color data is equivalent to the second color data, portions of the first through 2n buffer amplifiers 25 are turned on and the remaining buffer amplifiers are turned off, and the turned on buffer amplifiers simultaneously display the colors of the at least one first source line driving circuit and the at least one second source line driving circuit control cells. 91. The source control of claim 90, wherein n is 3, wherein the odd-numbered buffer amplifiers from the first through 2n th buffer amplifiers are turned on and the even-numbered buffer amplifiers are turned off when the first color data is equivalent to the second color data, each of the first color data and the second color data comprises R-channel data, G-channel data and B-channel data, and the cells into which the first color data and the second color data are input are adjacent to each other. - 48 - The source driver of claim 91, wherein the at least one first source line driver circuit comprises: a first R decoder, a first G decoder, and a first B decoder, said first R channel data, first G-5 channel data and first B channel data, respectively receive and decode from the first color data and output a first R-voltage signal, a first G-voltage signal and a first B-voltage signal corresponding to the first R-channel data, the first G-channel data and the first B-channel data, respectively ; 10 a first R-buffer amplifier, a first G-buffer amplifier and a first B-buffer amplifier, which buffer and output the first R-voltage signal, the first G-voltage signal and the first B-buffer amplifier, wherein the first R-buffer amplifier, the first G buffer amplifier and the first B buffer amplifier are turned on or off in response to a first operation control signal and a second operation control signal; and a first R switch, a first G switch and a first B switch connecting or disconnecting output terminals of the first R buffer amplifier, the first G buffer amplifier and the first B buffer amplifier from a first R output line, a first G output line and a first B output line corresponding to the output terminals, in response to a first connection control signal and a second connection control signal, the at least one second source line control circuit comprising: a second R decoder, a second G-decoder and a second B-decoder, which receive and decode second R-channel data, second G-channel data and second B-channel data of the second color data, respectively, and a second R-voltage signal, a second G-voltage signal and a second B voltage signal corresponding to the second R channel data, the second G channel data and the second B channel data, respectively give; a second R-buffer amplifier, a second G-buffer amplifier and a second B-buffer amplifier, which buffer and output the second R-voltage signal, the second G-voltage signal and the second B-voltage signal, the second R-buffer amplifier, the second G buffer amplifier and the second B buffer amplifier are turned on or off in response to the first operation control signal and the second operation control signal; and a second R switch, a second G switch, and a second 40 B switch, connecting or disconnecting output terminals of the second R buffer, the second G buffer, and the second B buffer from a second R output line, a second G output line and a second B output line, corresponding to the output terminals, in response to the second connection control signal and the second connection control signal, the output connections of the first and second R-buf amplifier amplifiers having are connected to each other or disconnected from each other by means of a first selection switch, the first G-output line and the output connection of the second G-buffer are connected to each other or are disconnected from each other by a second selection switch, the output connection of the first B buffer and the second B output line are connected to each other or disconnected from each other by a third selection switch, and the first selection screen switch, the second selection switch and the third selection switch are controlled by a selection control signal. 93. A source driver according to claim 90, wherein, when the first color data is equivalent to the second color data, the first operation control signal is activated to apply the first R-buffer amplifier, the first B-buffer amplifier and the second G-buffer amplifier. and the second operation control signal is deactivated to switch off the first G buffer amplifier, the second R buffer amplifier and the second B buffer amplifier, and when the first color data differs from the second color data, the first operation control signal and the second operation control signal both are activated to switch on all buffer amplifiers. 94. A source driver according to claim 93, wherein, when the first color data is equivalent to the second color data, the first connection control signal is activated to connect the first R switch, the first B switch and the second G switch, and the second connection control signal is deactivated to disconnect the first G switch, the second R switch and the second B switch, when the first color data differs from the second color data, the first connection control signal and the second connection control signal are both activated to connect the first R switch, the first G switch, the first B switch, the second R switch, the second G switch and the second B switch. 95. Source control according to claim 93, wherein, when the first color data is equivalent to the second color data, the selection control signal is activated to connect the first selection switch, the second selection switch and the third selection switch, and when the first color data differs from the second color data, the selection control signal is deactivated to disconnect the first selection switch, the second selection switch and the third selection switch. The source control of claim 92, wherein portions of the first R output line, the first G output line, the first B output line, the second R output line, the second G output line, and the second 97. Source driver according to claim 96, wherein output terminals corresponding to portions of the buffer amplifiers controlled by the second operation control signal are connected to the probe ends, portions of the buffer amplifiers that are connected by the first operation control signal controlled, are tested when the selection control signal is activated and the second connection control signal is deactivated, and parts of the buffer amplifiers that are controlled by the second operation control signal are tested when the selection control signal is deactivated and the second connection control signal is activated. 98. Source control according to claim 97, further comprising control logic, which receives a control signal from an external test device and controls the selection control signal and the second connection control signal in a test mode. The source driver of claim 90, further comprising a data comparator circuit that generates the first and second operation control signals, the first and second connection control signals, and the selection control signal according to whether the first color data is equivalent to the second color data and in response to 51 to an operating signal, a connection signal and a selection signal. 027799