CN1655219A - Shared buffer display panel drive methods and systems - Google Patents

Shared buffer display panel drive methods and systems Download PDF

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Publication number
CN1655219A
CN1655219A CN 200410075737 CN200410075737A CN1655219A CN 1655219 A CN1655219 A CN 1655219A CN 200410075737 CN200410075737 CN 200410075737 CN 200410075737 A CN200410075737 A CN 200410075737A CN 1655219 A CN1655219 A CN 1655219A
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China
Prior art keywords
source line
data
drive
buffer
display device
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Granted
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CN 200410075737
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Chinese (zh)
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CN100511382C (en
Inventor
禹宰赫
李再九
柳洪范
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Priority claimed from US10/860,419 external-priority patent/US8144100B2/en
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Publication of CN1655219A publication Critical patent/CN1655219A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of El Displays (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Liquid Crystal (AREA)

Abstract

Methods of driving source lines and/or circuits/systems for driving source lines are provided. Source lines of a display device are driven by comparing first data for driving a first buffer associated with a first source line of the display device and second data for driving a second buffer associated with a second source line of the display device and selectively disabling the second buffer and driving the second source line of the display device with the first buffer based on the comparison of the first and second data.

Description

Share the driving method and the system of the display board of impact damper
Technical field
The present invention relates to display, more particularly, relate to the source line of driving display.
Background technology
Active matrix liquid crystal display comprises picture element matrix, and each pixel all comprises redness, green and blue cell.Each unit all has the transistor of the operation of control module.Unit in the same delegation of display generally is connected to gate line with their transistorized gate electrode publicly.Unit in the same row generally is commonly connected to the source line with their source electrode.Like this, each unit of each pixel can come independent addressing by the selection of gate line and source line.
To generally be provided as digital value by the information of liquid crystal display displays, described digital value is converted into simulating signal with driving source lines.The source line of independent impact damper each unit to drive LCD is provided traditionally.The example of source driver circuit 100 of the source line of traditional three unit that are used for a row pixel has been shown among Fig. 1.As shown in Figure 1, numerical data as 18 bit digital data, provides red value (for example, 6) DATA_R, green value (for example, 6) DATA_G and blue valve (for example, 6) DATA_B.This numerical data is converted into corresponding analogue value R_VOL, G_VOL and B_VOL by digital-analog convertor DR, DG and DB separately.Impact damper R_BUF, G_BUF and B_BUF are driven into the analogue value on the line of display board, on the source line in LCD (LCD) panel, so that red, green and blue driving voltage ROUT, GOUT and BOUT to be provided.Typically, each source line of display can have its drive circuit, and as shown in Figure 1, these drivers all are in conducting state in the operating period of LCD panel usually, thus consumed power.
Fig. 2 further illustrates the conventional source line driver circuit that is used for LCD display, and this circuit comprises the selector switch that connects impact damper so that reduce the required number of conductors of this circuit of test.For the purpose of test, by switch GRAY_ON and CH_MUX are provided, a lead optionally is connected to buffer amplifier 10 and buffering amplifier 20.And for the purpose of test, buffer amplifier 10 and 20 also can be forbidden by signal AMP_ON/OFF.
Summary of the invention
First data and be used to of embodiments of the invention by relatively being used to drive first impact damper related with the first source line of display device drive second data with related second impact damper of the second source line of display device, and optionally forbid second impact damper and utilize first impact damper to drive the second source line of display device based on the comparative result of first and second data, drive the source line of display device.
In further embodiment of the present invention, first data and second data are corresponding red data, green data and/or the blue datas that are associated with the first source line and the second source line.First data can be a kind of in red data, green data or the blue data, and second data can be correspondence a kind of in red data, green data or the blue data.Corresponding source line in the first source line and the second source line can be with two different pixels are associated the source line.
In additional embodiments of the present invention, first data are a kind of in red data, green data or the blue data, and second data are different a kind of in red data, green data or the blue data.
In further again embodiment of the present invention, the comparative result of first data and second data is by judging whether first data and second data have identical value and provide.
In certain embodiment of the present invention, first data and second data comprise the RGB data that are used for two different pixels, first impact damper comprises the first red source line buffer, the first green source line buffer and the first blue sources line buffer, and second impact damper comprises the second red source line buffer, the second green source line buffer and the second blue sources line buffer.Optionally forbidding second impact damper can also optionally separate second impact damper when driving the first source line with the second source line when first impact damper and provide from the second source line.Optionally forbid second impact damper and can also comprise differential amplifier input circuit and/or the output driving circuit of optionally forbidding second impact damper.
In some embodiments of the invention, the first source line and the second source line are the source lines of same pixel.The first source line and the second source line also can be the source lines of different pixels.First data and second data can comprise corresponding red data, green data, blue data and/or the white data that is associated with the first source line and the second source line.Display device can be a LCD.
In additional embodiments of the present invention, second data that relatively are used to drive first data of first impact damper that is associated with the first source line of display device and are used to drive second impact damper that is associated with the second source line of display device comprise: second data that relatively are used to drive first data of a plurality of first impact dampers that are associated with the first multiple source line and are used to drive a plurality of second impact dampers that are associated with the second multiple source line.The second source line of optionally forbidding second impact damper and utilizing first impact damper to drive display device based on the comparative result of first and second data comprises: optionally forbid more than second impact damper and utilize more than first impact damper to drive the second multiple source line of display device based on the comparative result of first and second data.
In other embodiments of the invention, the source line of display device is by the data of the first source line that will be used to drive display device and the data that are used to drive at least one other source line of this display device compare, and uses a common source line buffer to drive optionally that at least one other source line of display device and the first source line drive based on the data comparative result.If at least one other source line is driven by the common source line buffer, then the source line buffer of this at least one other source line is disabled.
In further embodiment of the present invention, comparing data comprises that each the data that the data and being used to that will be used for driving the first source line of display device drive a plurality of other source lines of display device compare.Optionally drive this at least one other source line with a common source line buffer and the first source line comprises based on the data comparative result: use the common source line buffer to drive selected source line in the first source line and a plurality of other source line, and the inactive source line buffer comprises: invalid each the source line buffer that is used for the multiple source line that drives by the common source line buffer.
In additional embodiments of the present invention, the selected source line that drives in the first source line and a plurality of other source line with common buffer comprises: utilize the common source line buffer to drive in the first source line and a plurality of other source line each.The inactive source line buffer can comprise differential amplifier input circuit and/or the output driving circuit of optionally forbidding the source line buffer.The source line that the first source line and this at least one other source line can be same pixel or different pixels.The first source line and this at least one other source line can be the source lines that is associated with the same color component of at least two different pixels.The first source line and this at least one other source line also can be the source lines that is associated with the different colours component, and can be used for same pixel or different pixels.
In further again embodiment of the present invention, the first source line comprises the first multiple source line, and this at least one other source line comprises the second multiple source line.The data that the data and being used to that will be used to drive the first source line of display device drive at least one other source line of display device compare and comprise: the data that the data and being used to that will be used to drive the first multiple source line of display device drive the second multiple source line of display device compare.Utilize the common source line buffer to drive at least one other source line based on the data comparative result and the first source line comprises: result and utilize a plurality of common source line drives optionally to drive the second multiple source line and the first multiple source line based on the comparison.The source line buffer of invalid this at least one other source line comprises if this at least one other source line is by the driving of common source line buffer: if the second multiple source line is driven then the source line buffer of the invalid second multiple source line by a plurality of common source line buffers.The data that the data and being used to that are used to drive the first multiple source line of display device drive the second multiple source line of display device can comprise the RGB data.
In some embodiments of the invention, the data and being used to that will be used to drive the first multiple source line of the display device data that drive the second multiple source line of display device compare and can also comprise: the respective components of data that the component and being used to of data that will be used to drive the first multiple source line of display device drives the second multiple source line of display device compares.The data that the data and being used to that will be used to drive the first multiple source line of display device drive the second multiple source line of display device compare and can also comprise: all data that all data and being used to that will be used to drive the first multiple source line of display device drive the second multiple source line of display device compare.
In certain embodiment of the present invention, the data that are used to drive the first source line of display device comprise redness, green, blueness and/or white data, and the data that are used to drive at least one other source line of display device comprise redness, green, blueness and/or white data.This display device can be a LCD panel.
In other embodiments of the invention, the buffer circuit that is used to drive the source line of display device comprises: data comparison circuit, drive first impact damper of the first source line and drive second impact damper, first data value that this data comparison circuit comparison is associated with the first source line of display device and second data value that is associated with the second source line of display device of the second source line based on second data value based on first data value.So that optionally forbid second impact damper, and first commutation circuit is configured in response to data comparison circuit optionally first impact damper is electrically coupled on the second source line second impact damper in response to data comparison circuit.
First data and second data can comprise corresponding red data, green data and/or the blue data that is associated with the first source line and the second source line.First data can also comprise a kind of in red data, green data or the blue data, and second data can comprise correspondence a kind of of red data, green data or blue data, and wherein the first source line and the second source line are the corresponding source lines that is associated with two different pixels of display device.First data can be a kind of in red data, green data or the blue data, and second data can be different a kind of in red data, green data or the blue data.Data comparison circuit can be configured to judge whether first data have identical value with second data.
In further embodiment of the present invention, wherein first data and second data are the RGB data that are used for two different pixels of display device, and first impact damper comprises: be configured to drive the first red source line the first red impact damper, be configured to the first blue impact damper that drives the green buffers of the first green source line and be configured to drive the first blue sources line.Second impact damper comprises: be configured to drive the second red source line and the second red impact damper that is configured to optionally be forbidden in response to data comparison circuit, be configured to drive the second green source line and second green buffers that is configured to optionally be forbidden in response to data comparison circuit, be configured to the second blue impact damper that drives the second blue sources line and be configured to optionally be forbidden in response to data comparison circuit.First commutation circuit is configured to optionally in response to data comparison circuit the first red impact damper is electrically coupled on the second red source line, in response to data comparison circuit the first blue impact damper is electrically coupled on the second blue sources line, and first green buffers is electrically coupled on the second green source line in response to data comparison circuit.
In additional embodiments of the present invention, second commutation circuit is configured to optionally in response to data comparison circuit second impact damper from the separation that powers on of the second source line, if so that first impact damper is coupling on the second source line, then second impact damper separates from the second source line.Data comparison circuit can comprise: the logic gate of the corresponding data position of a plurality of comparison first and second data values; If gather the output of the output of a plurality of logic gates and all logic gates and be the logic of sets door that has identical logical values then export first signal; And a plurality of based on the logic of sets door output and optionally control signal is offered the multiplexer of first and second commutation circuits.A plurality of logic gates can comprise a plurality of XOR gate, and the logic of sets door can be the NOR door, and the logic of sets door can comprise a plurality of logic gates.
A plurality of multiplexers can comprise: control signal first multiplexer that is configured to generate the operation of controlling second impact damper; Be configured to generate the control signal of control first commutation circuit first impact damper is coupled to second multiplexer on the second source line; And three multiplexer of control signal that is configured to generate the operation of controlling second commutation circuit so that second impact damper is separated from the second source line.
In further embodiment of the present invention, second impact damper comprises: if be configured to the disabled then input circuit that optionally transistor is disconnected from voltage source of second impact damper.Second impact damper can also comprise: the output circuit of the output driving transistors that is configured to controlling output circuit so that the output line of second impact damper is separated from the output voltage source of second impact damper.
Additional embodiments of the present invention drives the first and second source lines of display board by driving the second source line based on coming to select one in first buffer amplifier and second buffer amplifier in the value of the video data that drives on the first and second source lines to utilize first and second buffer amplifiers.If first buffer amplifier is selected to drive the second source line then second buffer amplifier can be disabled.The first and second source lines can be used for the same pixel or the different pixels of display board.
In further embodiment of the present invention, based on come in first buffer amplifier and second buffer amplifier, to select one to drive the second source line and comprise in the value of the video data that drives on the first and second source lines: select first buffer amplifier to drive the second source line if the value of the video data that drives on the first and second source lines is identical, if the value difference of the video data that on the first and second source lines, drives then select second buffer amplifier to drive the second source line.In addition, if first buffer amplifier be selected to drive the second source line could drive the second source line with first buffer amplifier, can drive the second source line with second buffer amplifier if second buffer amplifier is selected to drive the second source line.
In other other embodiment of the present invention, display device comprises: display board, the data comparison circuit that is configured to comparison video data value and a plurality of source line drive that is configured to receive video data and drives the source line of display device based on the video data that receives.Source line handover network is in response to data comparison circuit and multiple source line drive and optionally based on the comparative result of video data value, with the not homology line and the coupling of the respective sources line drive in this multiple source line drive of display device.
In some embodiments of the invention, the multiple source line drive in response to data comparison circuit optionally to come respective sources line drive in invalid this multiple source line drive based on the comparative result of video data value.Source line handover network can also be configured to those invalid in multiple source line drive source lines from display device are separated.If it is identical that data comparison circuit is judged corresponding to the video data value of two source lines of display board, then line handover network in source can be configured to a source line drive is coupled on two source lines of display board.This display board can be LCD panel or organic light emitting apparatus.
Description of drawings
Fig. 1 is the synoptic diagram of the source line driving circuit of traditional LCD;
Fig. 2 is the synoptic diagram of the source line driving circuit of traditional LCD;
Fig. 3 is the block diagram that comprises the display device of the embodiment of the invention;
Fig. 4 according to the embodiment of the invention, be used to drive the synoptic diagram of a part of circuit of the source line of display device;
Fig. 5 according to the present invention additional embodiments, be used to drive the synoptic diagram of a part of circuit of the source line of display device;
Fig. 6 according to the present invention additional embodiments, be used to drive the synoptic diagram of a part of circuit of the source line of display device;
Fig. 7 A and 7B are the synoptic diagram of the part of amplifying circuit, and its explanation is used to forbid amplifying circuit to reduce the technology of power consumption; And
Fig. 8 is the synoptic diagram according to the control circuit of certain embodiments of the invention.
Fig. 9 is the circuit diagram of source line driving circuit according to another embodiment of the present invention.
Figure 10 A is the circuit diagram that illustrates according to the method for the internal damping amplifier of the source line driving circuit of the test pattern 4 of the embodiment of the invention.
Figure 10 B is the block diagram such as the structure of those liners of Figure 10 A that illustrates according to the embodiment of the invention.
Figure 11 is the circuit diagram that the connection of probe end is shown, and wherein these probe ends are used to the internal damping amplifier of the source line driving circuit of test pattern 9.
Figure 12 A is the circuit diagram of method of internal damping amplifier that the source line driving circuit of test pattern 9 is shown.
Figure 12 B is the figure such as the structure of those liners of Figure 12 A that illustrates according to the embodiment of the invention.
Embodiment
To the present invention be described more fully by with reference to the accompanying drawing that embodiments of the invention are shown now.Yet the present invention can express by different way, and should not be construed as the embodiment that is confined to here to be stated.On the contrary, provide these embodiment so that the disclosure is completely and complete, and explain scope of the present invention to those skilled in the art more fully.Identical mark is represented components identical.Employed here term " and/or " comprise one or more relevant any and all combinations of listing.
Although be appreciated that term first and second can be used for this and describes different elements, composition, zone, layer and/or part, these elements, composition, zone, layer and/or part should not be subjected to the restriction of these terms.These terms only are used for an element, composition, zone, layer or part and the difference mutually of another element, composition, zone, layer or part.Like this, for example, the first following element, composition, zone, layer or part can be called as second element, composition, zone, layer or part, and do not deviate from example of the present invention.
Embodiments of the invention are provided for the method and/or the system of Control Driver (impact damper), and wherein this driver (impact damper) is driven into displayed value on the source line of display device based on the video data value.As used herein, term " source line " refers to the line of display device, on this line, and will be driven by the corresponding signal of the value that display device shows.The source line can form contrast with " gate line ", and " gate line " is the control line of display device here, is used for selecting the display element of display device.Here describe embodiments of the invention with reference to LCD panel, still, embodiments of the invention also can be used for the display of other type.For example, display board can be liquid crystal display (LCD) panel, plasma display panel, Organic Light Emitting Diode (OLED) or other this display board.
Embodiments of the invention provide if the data that drive on the line of source are identical, just come optionally at least two source lines of driving display with a common source line buffer amplifier.If one bar the source line will be driven by common source line buffer amplifier, just forbid the source line buffer amplifier relevant with this source line.Like this, the power consumption according to the driving circuit of the embodiment of the invention just can reduce on the conventional ADS driving circuit.The data that are used for two source lines can be used for two different pixels public color (for example, red, green, blue and/or white) data, also can be data, and/or be used for the multiple color of same and/or different pixels from the different colours that is used for same pixel and/or different pixels.
Fig. 3 is the block diagram that a certain embodiment of the present invention is shown.As shown in Figure 3, display device 50 comprises: display board 60 is configured to the data comparison circuit 90 of comparison video data value; The multiple source line drive 70 that is configured to receive video data and drives the source line of display board 60 based on the video data that is received; And source line handover network 80, it is in response to data comparison circuit 90 and multiple source line drive 70 and come optionally not homology line with display board 60 to be coupled on the corresponding drivers in the multiple source line drive 70 based on the comparative result of video data value.Multiple source line drive 70 also in response to data comparison circuit 90 based on the comparative result of video data value come optionally to stop using corresponding drivers in the multiple source line drive 70.Source line handover network 80 is configured to the source line drive from the multiple source line drive 70 that the source line separation of display board 60 is deactivated.If source line handover network 80 also is configured to data comparison circuit 90 and judges with the corresponding video data value of two or more sources line of display board 60 and equate, then a source line drive is coupled on this two or more source line.
The comparison of video data can relatively be used for any data value of two or more sources line, if value equates that then the shared buffer amplifier with source line drive 70 drives this two or more sources line.Resolution relatively can be Pixel-level or sub-pixel-level.For example, relatively can carry out between the data of two source lines, these two source lines are driven by a buffer amplifier.As long as come driving source lines and do not consider that described source line is to be driven or driven by two independent buffer amplifiers by single buffer amplifier, just can compare these two data values and do not consider the validity of these two comparing datas relevant with final demonstration according to data result in identical demonstration.For example, these two data values can be corresponding to the value of the combination of the different colours component of the value of the same color component that will show of two different pixels, identical or different pixel or color component.No matter what the resolution of the comparison of data value is, the resolution of the drive controlling of source line all should be in identical resolution.Like this, for example, if the control of driving source lines is in Pixel-level, the comparison of data should be in Pixel-level so.Similarly, if driving source lines be controlled at component or channel level, the comparison of data should be in component or channel level so.
The customized configuration of source line drive 70, source line handover network 80 and data comparison circuit 90 depends on the resolution and the acceptable levels of complexity of application-specific of desired control.And source line handover network 80 can be provided by the arbitrary circuit that is used for buffer amplifier optionally is coupled to source described here line.Therefore, embodiments of the invention should not be construed as and are confined to particular electrical circuit or configuration, but should comprise the arbitrary circuit that can relatively realize optionally the source line drive being coupled to source line and/or forbidding source line drive based on the data relevant with the source line.
Below with reference to the synoptic diagram of Fig. 4 to Fig. 8 of the present invention, specific, unrestriced illustrated embodiment is described.
Fig. 4 is the block diagram according to the part of the source line driving circuit 200 of certain embodiments of the invention.As shown in Figure 4, source line driving circuit 200 comprises the first group of source line driving circuit 210 that is used for first pixel, and the second group of source line driving circuit 220 that is used for second pixel.Data comparison circuit 230 receives the RGB data by two pixels in the two row pixels of the display board of source line driving circuit 210,220 drivings, as input, and alternatively, be used to control common control signal such as the operation of the source line driving circuit of source line driving circuit 210,220 etc.RGB data that data comparison circuit use to receive and alternatively, control signal produces independent control signal so that the coordination control of source line driving circuit 210,220 to be provided.
As shown in Figure 4, in certain embodiments of the present invention, the RGB data that are input to data comparison circuit are 18 RGB data (DATA_RGB1 and DATA_RGB2), and they can be provided as 6 red, green and blue data (DATA_R1, DATA_G1, DATA_B1, DATA_R2, DATA_G2 and DATA_B2) of the respective digital/analog converter (DR1, DG1, DB1, DR2, DG2 and DB2) of source line driving circuit 210,220.Digital/analog converter (DR1, DG1, DB1, DR2, DG2 and DB2) is converted to the digital rgb data analogue value (R_VOL1, G_VOL1, B_VOL1, R_VOL2, G_VOL2 and B_VOL2) that offers corresponding buffer amplifier (R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2).
Buffer amplifier is by control signal corresponding OPCON1 and OPCON2 control, optionally forbidding buffer amplifier, or it is set to closed condition.Corresponding output line ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and the BOUT2 of source line driving circuit 210,220 optionally is coupled in the output (RBON1, GBON1, BBON1, RBON2, GBON2 and BBON2) of buffer amplifier (R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2) by two controlled switches set (R_SW1, G_SW1, B_SW1, R_SW2, G_SW2 and B_SW2) of difference.First group of switch (R_SW1, G_SW1 and B_SW1) controlled by control signal COCON1, and second group of switch (R_SW2, G_SW2 and B_SW2) controlled by control signal COCON2.
And the output (RBON1, GBON1 and BBON1) of buffer amplifier (R_BUF1, G_BUF1 and B_BUF1) optionally is coupled to output line (ROUT2, GOUT2 and BOUT2) by the 3rd group of switch (SSW1, SSW2 and SSW3).The 3rd group of switch (SSW1, SSW2 and SSW3) controlled by control signal SEL_CON.
OPS, COS and/or SELS signal can be overall situation selection and the control signals that is used to produce Pixel-level control signal OPCON1, OPCON2, COCON1, COCON2 and/or SEL_CON.Signal OPS, COS and/or SELS also can, for example by with among signal OPS, COS and/or the SELS corresponding those with the Pixel-level control signal OPCON1, OPCON2, COCON1, COCON2 and/or the SEL_CON logical "or" that are produced by data comparison circuit 230, be used as test mode signal, described test mode signal is sent to source line driving circuit 210,220 through data comparison circuit 230.By this way, for embodiments of the invention, can adopt the testing apparatus that has reduced number of pins.
In operation, data comparison circuit 230 is 18 RGB data of two pixels (DATA_RGB1 and DATA_RGB2) relatively, if these data have identical value, then Controlling Source line drive circuit 210,220 is forbidden impact damper R_BUF2, G_BUF2 and the B_BUF2 of second source line driving circuit 220, and drives output ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and BOUT2 with first source line driving circuit 210.Like this, buffer amplifier R_BUF1, G_BUF1 and B_BUF1 provide the shared buffer amplifier that drives whole two groups of source lines based on the data comparative result.Especially, following truth table has been described the state based on the control signal of data comparative result.
Comparative result OPCON1 OPCON2 COCON1 COCON2 SEL_CON
????DATA_RGB1＝D ATA_RGB2 Effectively Invalid Effectively Invalid Effectively
????DATA_RGB1≠D ATA_RGB2 Effectively Effectively Effectively Effectively Invalid
In the superincumbent form, useful signal causes the closure of corresponding switch or the activation of buffer amplifier.Like this, for example, when OPCON2 was effective, buffer amplifier R_BUF2, G_BUF2 and B_BUF2 started, and when it is invalid, buffer amplifier R_BUF2, G_BUF2 and B_BUF2 forbidding.Similarly, when signal SEL_CON is effective, switch S SW1, SSW2 and SSW3 closure, and when signal SEL_CON was invalid, switch S SW1, SSW2 and SSW3 opened.
Fig. 4 illustrates embodiments of the invention, if wherein forbid and a buffer amplifier that pixel is relevant so that two pixels have identical value, and drive the source line of whole two pixels by the buffer amplifier that is used for a pixel in the enterprising line data comparison of Pixel-level.Fig. 5 illustrates source line driving circuit 400 according to another embodiment of the present invention, wherein compares in the data of carrying out on the data component level between the pixel.Like this, as shown in Figure 5, provide the data comparison circuit 430,432 and 434 of the value of 3 data components that are used for two pixels of comparison with Controlling Source line drive circuit 410,420.
The buffer amplifier of source line driving circuit 410,420 is controlled optionally to forbid buffer amplifier or it is set to closed condition by control signal corresponding R_OPCON1, R_OPCON2, G_OPCON1, G_OPCON2, B_OPCON1 and B_OPCON2.The output (RBON1, GBON1, BBON1, RBON2, GBON2 and BBON2) of buffer amplifier (R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2) optionally is coupled to corresponding output line ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and BOUT2 by the controlled switch (R_SW1, G_SW1, B_SW1, R_SW2, G_SW2 and B_SW2) of difference.
And the output (RBON1, GBON1 and BBON1) of buffer amplifier (R_BUF1, G_BUF1 and B_BUF1) optionally is coupled to output line (ROUT2, GOUT2 and BOUT2) by the controlled switch (SSW1, SSW2 and SSW3) of difference.
First comparator circuit 430 is the red color component value DATA_R1 and the DATA_R2 of two pixels relatively, and comes based on this comparative result control buffer amplifier R_BUF1 and R_BUF2 and switch S SW1, R_SW1 and R_SW2 by producing R_OPCON1, R_OPCON2, R_COCON1, R_COCON2 and SEL_CON1.Second comparator circuit 432 is the green component values DATA_G1 and the DATA_G2 of two pixels relatively, and comes based on this comparative result control buffer amplifier G_BUF1 and G_BUF2 and switch S SW2, G_SW1 and G_SW2 by producing G_OPCON1, G_OPCON2, G_COCON1, G_COCON2 and SEL_CON2.The 3rd comparator circuit 434 is the blue component value DATA_B1 and the DATA_B2 of two pixels relatively, and comes based on this comparative result control buffer amplifier B_BUF1 and B_BUF2 and switch S SW3, B_SW1 and B_SW2 by producing B_OPCON1, B_OPCON2, B_COCON1, B_COCON2 and SEL_CON3.
According to with reference to figure 4 described similar methods, OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, COS3 and/or SELS3 signal can be that the overall situation is selected and control signal, are used to produce pixel component level control signal R_OPCON1, R_OPCON2, RCOCON1, R_COCON2, SEL_CON1, G_OPCON1, G_OPCON2, G_COCON1, G_COCON2, SEL_CON2, B_OPCON1, B_OPCON2, B_COCON1, B_COCON2 and/or SEL_CON3.Signal OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, COS3 and/or SELS3 for example pass through signal OPS1, COS1, SELS1, OPS2, COS2, SELS2, OPS3, corresponding signal among COS3 and/or the SELS3 with by corresponding data comparison circuit 430,432 or the 434 pixel component level control signal R_OPCON1 that produced, R_OPCON2, RCOCON1, R_COCON2, SEL_CON1, G_OPCON1, G_OPCON2, G_COCON1, G_COCON2, SEL_CON2, B_OPCON1, B_OPCON2, B_COCON1, B_COCON2 and/or SEL_CON3 logical "or", be provided as test mode signal, described test mode signal is by data comparison circuit 430,432 and 434 are sent to source line driving circuit 410,420.By this way, for embodiments of the invention, can adopt the testing apparatus that has reduced number of pins.
In operation, data comparison circuit 430,432 and 434 is 6 RGB component datas of two pixels relatively, if and data have identical value, just the control source line driving circuit 410,420 that is used for component is with impact damper R_BUF2, the G_BUF2 of forbidding second source line driving circuit 420 and the corresponding buffers of B_BUF2, and uses first source line driving circuit 410 to drive corresponding output among output ROUT1, GOUT1, BOUT1, ROUT2, GOUT2 and the BOUT2.Like this, buffer amplifier R_BUF1, G_BUF1 and B_BUF1 provide the shared buffer amplifier that drives the corresponding source line in two groups of source lines based on the data comparative result.Especially, following truth table has been described the state based on the control signal of data comparative result.
Comparative result R_OPCON1 R_OPCON2 R_COCON1 R_COCON2 SEL_CON1
DATA_R1＝ DATA_R2 Effectively Invalid Effectively Invalid Effectively
DATA_R1≠ DATA_R2 Effectively Effectively Effectively Effectively Invalid
Comparative result G_OPCON 1 G_OPCON 2 G_COCON1 G_COCON2 SEL_CON2
DATA_G1＝ DATA_G2 Effectively Invalid Effectively Invalid Effectively
DATA_G1≠ DATA_G2 Effectively Effectively Effectively Effectively Invalid
Comparative result B_OPCON1 B_OPCON2 B_COCON1 B_COCON2 SEL_CON3
DATA_B1＝ DATA_B2 Effectively Invalid Effectively Invalid Effectively
DATA_B1≠ DATA_B2 Effectively Effectively Effectively Effectively Invalid
In the superincumbent form, useful signal causes the closure of respective switch or the activation of buffer amplifier.
Fig. 6 shows the source line driving circuit 500 according to further embodiment of this invention, is the comparison that a pixel carries out being driven into the value on the line of source in this embodiment.As used herein, " channel " refers to the component of pixel.Like this, for example, in the RGB system, pixel will have red channel, green channel and blue channel.Though at embodiment shown in Figure 6 during relatively from the data of two channels of pixel, additional channel that also can compared pixels, and based on this corresponding driving device of relatively controlling.
As shown in Figure 6, be used for first source line driving circuit 510 of first channel of pixel and second source line driving circuit 520 of second channel that is used for pixel by data comparison circuit 530 controls.The shared control signals of operation of source line driving circuit that data comparison circuit 530 receives the pixel channels data that driven by source line driving circuit 510,520 and receives control such as source line driving circuit 510,520 etc. alternatively is as input.Data comparison circuit 530 uses the channel data that receives, and control signal alternatively, provides the coordination control of source line driving circuit 510,520 to produce independent control signal.
As shown in Figure 6, in certain embodiments of the present invention, channel data CHN_DATA1 and CHN_DATA2 are provided for the corresponding channel decoding circuit (CHN_DEC1 and CHN_DEC2) of data comparison circuit 530 and source line driving circuit 510,520.Channel decoding circuit (CHN_DEC1 and CHN_DEC2) is converted to the analogue value (CHN_VOL1 and CHN_VOL2) with the digital channel data, and the described analogue value is provided for corresponding buffer amplifier (CHN_BUF1 and CHN_BUF2).
Buffer amplifier is controlled by control signal corresponding OPCON1 and OPCON2, and optionally forbidding buffer amplifier, or it is set to closed condition.The output (RBON and GBON) of buffer amplifier (CHN_BUF1 and CHN_BUF2) optionally is coupled to the corresponding output line ROUT and the GOUT of source line driving circuit 510,520 by two switches (C_SW1 and C_SW2) that difference is controlled.The first switch C_SW1 is by control signal COCON1 control, and second switch C_SW2 is controlled by control signal COCON2.
And the output RBON of buffer amplifier CHN_BUF1 optionally is coupled to output line GOUT by the 3rd switch S SW.The 3rd switch S SW is controlled by control signal SEL_CON.
OPS, COS and/or SELS signal can be overall situation selection and the control signals that is used to produce channel level control signal OPCON1, OPCON2, COCON1, COCON2 and/or SEL_CON.Signal OPS, COS and/or SELS also can be for example by with the corresponding signal among signal OPS, COS and/or the SELS and the channel level control signal OPCON1, OPCON2, COCON1, COCON2 and/or the SEL_CON logical "or" that are produced by data comparison circuit 530, be provided as test mode signal, described test mode signal is sent to source line driving circuit 510,520 by data comparison circuit 530.By this way, for embodiments of the invention, can adopt the testing apparatus that has reduced number of pins.
In operation, data comparison circuit 530 relatively is used for the channel data (CHN_DATA1 and CHN_DATA2) of two channels of pixel, if and data have identical value, drive with the impact damper CHN_BUF2 of forbidding second source line driving circuit 520 and with first source line driving circuit 510 with regard to Controlling Source line drive circuit 510,520 and to export ROUT and GOUT.Like this, buffer amplifier CHN_BUF1 provides the shared buffer amplifier that drives two channels of pixel data based on the comparative result of the data of two channels.Especially, following truth table has been described the state based on the control signal of data comparative result.
Comparative result OPCON1 OPCON2 COCON1 COCON2 SEL_CON
CHN_DATA1＝ CHN_DATA2 Effectively Invalid Effectively Invalid Effectively
CHN_DATA1≠ CHN_DATA2 Effectively Effectively Effectively Effectively Invalid
In the superincumbent form, useful signal causes the closure of corresponding switch or the activation of buffer amplifier.Like this, for example, when OPCON2 was effective, buffer amplifier CHN_BUF2 started, and when it was invalid, buffer amplifier CHN_BUF2 was disabled.Similarly, when signal SEL_CON is effective, switch S SW closure, and when signal SEL_CON was invalid, switch S SW opened.
Fig. 7 A and 7B are the synoptic diagram of the part of the buffer amplifier that is suitable for using in certain embodiments of the present invention.Fig. 7 A illustrates the part of the input circuit of buffer amplifier, comprising input transistors T2 and T3 and oxide-semiconductor control transistors T1.Oxide-semiconductor control transistors T1 can optionally separate with T3 input transistors T2 from voltage source such as VDD, thereby reduces or eliminates the electric current in this input circuit of buffer amplifier.
Similarly, Fig. 7 B illustrates the part of the output circuit of buffer amplifier, comprising output transistor T11 and T13 and oxide-semiconductor control transistors T10 and T12.Oxide-semiconductor control transistors T10 and T12 can be optionally with the gate coupled of output transistor T11 and T13 on voltage source such as VDD or VSS, thereby so that "off" transistor T11 and T13 reduce or eliminate the electric current in this output circuit of buffer amplifier.
Fig. 8 is the synoptic diagram of data comparison circuit, and this circuit produces the control signal that is used to control the source line drive as shown in Fig. 3,4,5 and/or 6.As shown in Figure 8, by each position on carry out the distance function, will the input data the one 1 to N position DATA_A＜1 ... DATA_A＜N〉with the input data the 21 to N position DATA_B＜1 ... DATA_B＜N〉corresponding positions compare, this distance function is for example used such as XOR gate 700,702,704 and 706 such XOR gate and is finished.XOR gate 700,702,704 is used N input NOR door 710 logic nondisjunctions with 706 output and is in the same place, and the output of this NOR door 710 is used to control multiplexer 720,722 and 724 to produce control signal.In certain embodiments, multiplexer 720,722 and 724 can carry out the logical "or" (not shown) with aforesaid signal OPS, COS and/or SELS respectively.
The output of NOR door 710 is provided for the one 2 couple of 1MUX 720, and this MUX 720 has input OPCON1 and Ground.When the output of NOR door 710 is at least one position of expression during to unmatched logic " low " value, OPCON1 is provided as the OPCON2 signal, and this buffer amplifier is activated.When the output of NOR door 710 be expression all during to logic " height " value of all mating, Ground is provided as the OPCON2 signal, and second buffer amplifier is activated.
The output of NOR door 710 also is provided for the 22 couple of 1MUX 722, and this MUX 722 has input COCON1 and Ground.When the output of NOR door 710 is at least one position of expression during to unmatched logic " low " value, COCON1 is provided as the COCON2 signal, and this buffer amplifier is coupled to their output lines separately.When the output of NOR door 710 when being all positions of expression to logic " height " value of all mating, Ground is just as the COCON2 signal, and second buffer amplifier just break away from it/their output line.
The output of NOR door 710 also is provided for the 32 couple of 1MUX 724, and this MUX 724 has input VDD and Ground.When the output of NOR door 710 is at least one position of expression during to unmatched logic " low " value, Ground is provided as the SELCON signal, and the output line that is associated with second buffer amplifier of first buffer amplifier disengaging.When the output of NOR door 710 be expression all during to logic " height " value of all mating, VDD is provided as the SELCON signal, and first buffer amplifier is coupled to the output line of second buffer amplifier.
Data comparison circuit among Fig. 8 is with reference to providing the XOR gate and the NOR door of the comparison of data bit to be described.Yet, one skilled in the art will appreciate that other logic circuit structure also can be used for carrying out the data comparing function.For example, the XNOR door can be used for the comparison position and the AND door can be used for gathering comparative result.
And anti-phase by MUX input is carried out, the NOR or the AND door of set XOR output can be OR or NAND door.Similarly, though the logic of sets door is described to the N input gate, multiple logic gate can be used to provide the function of logic of sets door.Therefore, embodiments of the invention should not be interpreted as being confined to certain logic door shown in Figure 8.
Fig. 9 is the circuit diagram of source line driving circuit 800 according to another embodiment of the present invention.When the color data of the adjacent unit that is used for the control panel (not shown) equates with another, source line driving circuit 800 is opened and is installed in a part of buffer amplifier of source line driving circuit 800 and turn-offs remaining buffer amplifier, and uses the color of the buffer amplifier control adjacent unit of opening simultaneously.
Because the first color data DATA_RGB1 and the second color data DATA_RGB2 have described in the above, so below will omit the detailed description to them.
The first color data DATA_RGB1 equates should be understood to a R channel data DATA_R1 with the second color data DATA_RGB2 and equates with the 2nd R channel data DATA_R2, the one G channel data DATA_G1 equates with the 2nd G channel data DATA_G2, and a B channel data DATA_B1 equates with the 2nd B channel data DATA_B2.
The data comparison circuit 830 of source line driving circuit 800 is first and second color data DATA_RGB1 and the DATA_RGB2 relatively, and produce selection control signal SEL_CON, operation signal OPS, the connection signal COS of the first operating control signal OPCON1, the second operating control signal OPCON2, the first connection control signal COCON1, the second connection control signal COCON2 and response comparative result and select signal SELS.
Operation signal OPS, connection signal COS and selection signal SELS and the first and second operating control signal OPCON1 and OPCON2, first and second connection control signal COCON1 and the COCON2 from data comparison circuit 830 outputs, and select control signal SEL_CON, will describe in detail subsequently.First source line driving circuit 710 receives the color of the first color data DATA_RGB1 and the control and the first color data DATA_RGB1 units corresponding.Second source line driving circuit 720 receives the color of the second color data DATA_RGB2 and the control and the second color data DATA_RGB2 units corresponding.
Although it is not shown, but except first and second source line driving circuits 710 and 720, source line driving circuit 800 also comprises the multiple source line drive circuit, and the structure of each in the multiple source line drive circuit is identical with first or second source line driving circuit 710 or 720 all.Yet for convenience's sake, source line driving circuit 800 is described with reference to optional first and second source line driving circuits 710 and 720.
Unit by first and second source line driving circuits 710 and 720 panels of controlling is contiguous mutually.Also have, this embodiment is described the situation of having only two sections color data to equate mutually, but the present invention is not restricted to foregoing description.Just, the present invention can be used for three sections or the equal mutually situation of more color data.
First source line driving circuit 710 comprises the 1st to the n buffer amplifier, and second source line driving circuit 720 comprise n+1 to the 2n buffer amplifier ( N can be 3).When the first and second color data DATA_RGB1 are equal mutually with DATA_RGB2, the 1st part unlatching to the 2n buffer amplifier, and other buffer amplifier turn-offs.For example, the 1st can open with the buffer amplifier of odd-numbered to the 2n buffer amplifier, and the buffer amplifier of even-numbered can turn-off.
The 1st to the operation of 2n buffer amplifier can be by from the first and second operating control signal OPCON1 and OPCON2, the first and second connection control signal COCON1 and the COCON2 of data comparison circuit 830 outputs and select control signal SEL_CON to control.
First source line driving circuit 710 comprises a R demoder DR1, a G demoder DG1, a B demoder DB1, a R buffer amplifier R_BUF1, a G buffer amplifier G_BUF1, a B buffer amplifier B_BUF1, a R switch R_SW1, a G switch G_SW1 and a B switch B_SW1.
The one R demoder DR1 decodes to the R channel data DATA_R1 of the first color data DATA_RGB1, and exports a R voltage signal R_VOL1.The one G demoder DG1 decodes to a G channel data DATA_G1, and exports a G voltage signal G_VOL1.The one B demoder DB1 decodes to a B channel data DATA_B1, and exports a B voltage signal B_VOL1.
The one R channel data DATA_R1 is 6 bit data.The one R demoder DR1 exports 6 bit data as a R voltage signal R_VOL1, and wherein this voltage signal has the value correspondent voltage level with this 6 bit data.If the first and second R channel data DATA_R1 and DATA_R2 equate that mutually the voltage of a R signal R_VOL1 equals the voltage of the 2nd R voltage signal R_VOL2 so.
Like this, just can control color with the 2nd R channel data DATA_R2 units corresponding by using a R channel data DATA_R1 rather than the 2nd R channel data DATA_R2.
The one R buffer amplifier R_BUF1 buffering is also exported a R voltage signal R_VOL1, and open or turn-off this buffer amplifier in response to the first operating control signal OPCON1.The one G buffer amplifier G_BUF1 buffering is also exported a G voltage signal G_VOL1, and open or turn-off this buffer amplifier in response to the second operating control signal OPCON2.
The one B buffer amplifier B_BUF1 buffering is also exported a B voltage signal B_VOL1, and open or turn-off this buffer amplifier in response to the first operating control signal OPCON1.
The one a B switch B_SW1 and a R switch R_SW1 be in response to the first connection control signal COCON1, respectively the output terminal BBON1 of the output terminal RBON1 of a R buffer amplifier R_BUF1 and a B buffer amplifier B_BUF1 is connected to their corresponding R output line ROUT1 and a B output line BOUT1 or they are disconnected from a R incoming line ROUT1 and a B output line BOUT1.The one G switch G_SW1 is in response to the second connection control signal COCON2, and the output terminal GBON1 of a G buffer amplifier G_BUF1 is connected to its corresponding G output line GOUT1, or it is disconnected from a G output line GOUT1.
Second source line driving circuit 820 comprises the 2nd R demoder DR2, the 2nd G demoder DG2, the 2nd B demoder DB2, the 2nd R buffer amplifier R_BUF2, the 2nd G buffer amplifier G_BUF2, the 2nd B buffer amplifier B_BUF2, the 2nd R switch R_SW2, the 2nd G switch G_SW2 and the 2nd B switch B_SW2.
The 2nd R demoder DR2, the 2nd G demoder DG2 and the 2nd B demoder DB2 receive the 2nd R channel data DATA_R2, the 2nd G channel data DATA_G2 and the 2nd B channel data DATA_B2 of the second color data DATA_RGB2 respectively, and, export the 2nd R voltage signal R_VOL2, the 2nd G voltage signal G_VOL2 and the 2nd B voltage signal B_VOL2 respectively to its decoding.
The 2nd R buffer amplifier R_BUF2 and the 2nd B buffer amplifier B_BUF2 cushion and export the 2nd R voltage signal R_VOL2 and the 2nd B voltage signal B_VOL2 respectively.The 2nd R buffer amplifier R_BUF2 and the 2nd B buffer amplifier B_BUF2 are unlocked in response to the second operating control signal OPCON2 or turn-off.
The 2nd G buffer amplifier G_BUF2 buffering is also exported the 2nd G voltage signal G_VOL2, and is unlocked in response to the first operating control signal OPCON1 or turn-offs.
In response to the second connection control signal COCON2, the 2nd R switch R_SW2 and the 2nd B switch B_SW2 are connected to the output terminal BBON2 of the output terminal RBON2 of the 2nd R buffer amplifier R_BUF2 and the 2nd B buffer amplifier B_BUF2 their corresponding the 2nd R output line ROUT2 and the 2nd B output line BOUT2 respectively, or they are disconnected from the 2nd R output line ROUT2 and the 2nd B output line BOUT2.
In response to the first connection control signal COCON1, the 2nd G switch G_SW2 the output terminal GBON2 of the 2nd G buffer amplifier G_BUF2 is connected to its corresponding the 2nd G output line GOUT2, or it is disconnected from the 2nd G output line GOUT2.
The output terminal RBON1 of the one R buffer amplifier R_BUF1 and the 2nd R output line ROUT2 are connected to each other in response to the first selector switch SSW1 or are disconnected.The output terminal GBON2 of the 2nd G buffer amplifier G_BUF2 and a G output line GOUT1 are connected to each other in response to the second selector switch SSW2 or are disconnected.The output terminal BBON1 of the one B buffer amplifier B_BUF1 and the 2nd B output line BOUT2 are connected to each other in response to the 3rd selector switch SSW3 or are disconnected.
The first selector switch SSW1, the second selector switch SSW2 and the 3rd selector switch SSW3 are by selecting control signal SEL_CON to control.
When the first color data DATA_RGB1 equaled the second color data DATA_RGB2, the first operating control signal OPCON1 was activated to open a R buffer amplifier R_BUF1, the 2nd G buffer amplifier G_BUF2 and a B buffer amplifier B_BUF1.Yet the second operating control signal OPCON2 is disabled to turn-off the 2nd R buffer amplifier R_BUF2, a G buffer amplifier G_BUF1 and the 2nd B buffer amplifier B_BUF2.
When the first color data DATA_RGB1 equaled the second color data DATA_RGB2, the first connection control signal COCON1 also was activated to connect a R switch R_SW1, the 2nd G switch G_SW2 and a B switch B_SW1.Yet the second connection control signal COCON2 is disabled so that the 2nd R switch R_SW2, a G switch G_SW1 and the 2nd B switch B_SW2 are disconnected each other.
When the first color data DATA_RGB1 equals the second color data DATA_RGB2, select control signal SEL_CON also to be activated to connect the first selector switch SSW1, the second selector switch SSW2 and the 3rd selector switch SSW3.
As mentioned above, when the first color data DATA_RGB1 equals the second color data DATA_RGB2, the buffer amplifier of the odd-numbered in first and second source line driving circuits 710 and 720 six buffer amplifiers, promptly buffer amplifier R_BUF1, G_BUF2 and B_BUF1 are unlocked; The one R switch R_SW1, the 2nd G switch G_SW2 are connected with a B switch B_SW1; And the first selector switch SSW1, the second selector switch SSW2 are connected with the 3rd selector switch SSW3.
In this example, Lin Jin two unit can only use three buffer amplifier R_BUF1, G_BUF2 and B_BUF1 in six buffer amplifiers to control.That is to say, the one R voltage signal R_VOL1 is imported into a R output line ROUT1 and the 2nd R output line ROUT2, the one B voltage signal B_VOL1 is imported into a B output line BOUT1 and the 2nd B output line BOUT2, and the 2nd G voltage signal G_VOL1 is imported into the 2nd a G output line GOUT2 and a G output line GOUT1.
When the first color data DATA_RGB1 equates with the second color data DATA_RGB2, the voltage of the one R voltage signal R_VOL1 equates with the voltage of the 2nd R voltage signal R_VOL2, the voltage of the one G voltage signal G_VOL1 equates with the voltage of the 2nd G voltage signal G_VOL2, and the voltage of a B voltage signal B_VOL1 equates with the 2nd B voltage signal B_VOL2 voltage.
Therefore, even voltage signal R_VOL1, G_VOL2 and B_VOL1 are imported in two above-mentioned unit, the color of these two unit also is identical.And, because the 2nd R buffer amplifier R_BUF2, a G buffer amplifier G_BUF1 and the 2nd B buffer amplifier B_BUF2 be turned off, so can minimize the power consumption of Source drive 700.
If the first and second color data DATA_RGB1 are different mutually with DATA_RGB2, source line driving circuit 800 is worked as the conventional source line drive so.
In source line driving circuit 800, when the first and second color data DATA_RGB1 and DATA_RGB2 equated mutually, the buffer amplifier of odd-numbered was unlocked and the buffer amplifier of even-numbered is turned off.Yet the present invention is not restricted to top description.That is to say, source line driving circuit 800 can be created when the first color data DATA_RGB1 equals the second color data DATA_RGB2 that the buffer amplifier of even-numbered is unlocked and the buffer amplifier of odd-numbered is turned off.The method of making this provenance line drive can be considered to will become apparent to those skilled in the art that like this, will omit detailed description.
When the first and second color data DATA_RGB1 were equal mutually with DATA_RGB2, data comparison circuit 830 activated the first operating control signal OPCON1 and makes the second operating control signal OPCON2 invalid in response to operation signal OPS.When the first and second color data DATA_RGB1 and DATA_RGB2 mutually not simultaneously, data comparison circuit 830 activates the first operating control signal OPCON1 and the second operating control signal OPCON2 in response to operation signal OPS.
Also have, when the first and second color data DATA_RGB1 were equal mutually with DATA_RGB2, data comparison circuit 830 activated the first connection control signal COCON1 and makes the second connection control signal COCON2 invalid in response to connecting signal COS.When the first color data DATA_RGB1 and the second color data DATA_RGB2 mutually not simultaneously, data comparison circuit 830 activates the first connection control signal COCON1 and the second connection control signal COCON2 in response to connecting signal COS.
And when the first color data DATA_RGB1 was equal mutually with the second color data DATA_RGB2, data comparison circuit 830 was selected control signal SEL_CON in response to selecting signal SELS to activate.When the first color data DATA_RGB1 and the second color data DATA_RGB2 mutually not simultaneously, data comparison circuit 830 makes in response to selecting signal SELS selects control signal SEL_CON invalid.As mentioned above, data comparison circuit 830 judges whether the first color data DATA_RGB1 equates with the second color data DATA_RGB2, and changes output signal level according to judged result.Therefore the circuit structure of data comparison circuit 830 can be considered to will become apparent to those skilled in the art that and will omit detailed description.
Figure 10 A be illustrate according to an embodiment of the invention, the circuit diagram of the method for internal damping amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and the B_BUF2 of the source line driving circuit 200 of test pattern 4.The output terminal of Source drive 200 is connected to corresponding liner DQR1, DQG1, DQB1, DQR2, DQG2 and DQB2 respectively.With reference to figure 8A, when the first and second color data DATA_RGB1 are equal mutually with DATA_RGB2, buffer amplifier R_BUF1, G_BUF1 and the B_BUF1 of first source line driving circuit 210 are unlocked and work, but buffer amplifier R_BUF2, the G_BUF2 of second source line driving circuit 220 and B_BUF2 are turned off and do not work.
Then, probe end T1, T2 and T3 only are connected to liner DQR2, DQG2 and DQB2 respectively, so that test buffer amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2.Then, buffer amplifier R_BUF1, the G_BUF1 of unlatching and B_BUF1 are tested by probe end T1, T2 and T3.
After this, buffer amplifier R_BUF2, the G_BUF2 of shutoff and B_BUF2 detect by they being connected respectively to liner DQR2, DQG2 and DQB2, and be shown in dotted line.
Shown in Figure 10 A, according to embodiments of the invention, three probe ends are connected to three liners in per six liners of source line driving circuit, thereby use less probe end to detect two chips simultaneously.
Figure 10 B be illustrate according to an embodiment of the invention, such as the synoptic diagram of the structure of the such liner of the liner of Figure 10 A.The structure of the liner of Figure 10 B is called as staggered structure.With reference to figure 10B, three probe end T1, T2 and T3 are connected to three liners in per six liners of source line drive.
Figure 11 illustrates probe end T1, the T2 of internal damping amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 of the source line driving circuit 800 that is used for test pattern 9 and the circuit diagram that is connected of T3.With reference to Figure 11, liner DQR1, DQG1, DQB1, DQR2, DQG2 and DQB2 are connected respectively to a R output line ROUT1, a G output line GOUT1, a B output line BOUT1, the 2nd R output line ROUT2, the 2nd G output line GOUT2 and the 2nd B output line BOUT2 of source line driving circuit 900.And probe end T1, T2 are connected to the liner that the part among liner DQR1, DQG1, DQB1, DQR2, DQG2 and the DQB2 is connected with test with T3.
Then, select the control signal SEL_CON and the second connection control signal COCON2 to detect all internal damping amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 by alternately activating.
Figure 12 A is the circuit diagram of method of internal damping amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 that the source line driving circuit 800 of test pattern 9 is shown.With reference to Figure 12 A, probe end T1, T2 and T3 are connected respectively to liner DQG1, DQR2 and DQB2.Liner DQG1, DQR2 and DQB2 are corresponding with buffer amplifier G_BUF1, R_BUF2 and B_BUF2 respectively, wherein these buffer amplifiers in response to the second operating control signal OPCON2 Be Controlled.
When selecting control signal SEL_CON to be activated and the second connection control signal COCON2 when being disabled, at first tested by buffer amplifier R_BUF1, G_BUF2 and the B_BUF1 of first operating control signal OPCON1 control.
Be imported into all buffer amplifier R_BUF1, G_BUF1, B_BUF1, R_BUF2, G_BUF2 and B_BUF2 although be used for testing the test data of buffer amplifier, have only buffer amplifier R_BUF1, G_BUF2 and B_BUF1 at first detected.
When selecting control signal SEL_CON to be disabled and the second connection control signal COCON2 when being activated, tested, shown in dotted line by buffer amplifier R_BUF2, G_BUF1 and the B_BUF2 of second operating control signal OPCON2 control.
Although do not illustrate in the drawings, source line driving circuit 800 also comprises steering logic, and it receives the control signal (not shown) and the control selection control signal SEL_CON and the second connection control signal COCON2 in test pattern from the external test facility (not shown).The steering logic of controlling the test operation of above-mentioned source line driving circuit 800 is known to those skilled in the art, therefore omits detailed description.
Figure 12 B is the synoptic diagram that illustrates according to the such structure of the liner such as Figure 12 A of the embodiment of the invention.The structure of the liner of Figure 12 B is also referred to as staggered structure.With reference to Figure 12 B, each among three probe end T1, T2 and the T3 all is connected in per two liners of source line driving circuit.
With the method for Figure 12 A, can detect two chips simultaneously with half of probe end required in the classic method.And the ratio in the method shown in Figure 12 A of the spacing between the spacing between probe end T1 and the T2 and probe end T2 and the T3 is big in the method shown in Figure 10 A, thereby prevents to occur at test period the fault of probe (not shown).
Though embodiments of the invention are here described and illustrated according to " switch ", switch refers to switchgear and can be solid-state, mechanical or other.Like this, for example, in certain embodiments of the present invention, switch C_SW1, C_SW2, R_SW1, G_SW1, B_SW1, R_SW2, G_SW2, B_SW2, SSW, SSW1, SSW2 and SSW3 can be transistors.Therefore, embodiments of the invention should not be construed as and are limited to specific switchgear, but can adopt any equipment that can optionally amplifier be connected to output terminal.And the customized configuration that signal depends on circuit can be that high state is effective or low state is effective.Like this, embodiments of the invention should not be interpreted as being limited to specific operation polarity.
And embodiments of the invention are described with reference to the RGB data, still, also can use the data of other type, come pixel value on compared pixels and/or the channel level as the YPrB data.And situation about for example also can be more than three components provides other comparison.For example, if white (W) component is provided, pixel/channel value more also can comprise the W value and/or make based on the W value so.Therefore, current embodiment should not be interpreted as being limited to the RGB example of discussing here, but can carry out any system of comparison of value of the channel of pixel and/or pixel.
Embodiments of the invention are relatively being described with reference to the value of two channels of the comparison of the value relevant with two pixels or a pixel.Yet, in other embodiments of the invention, can be relatively more than the value of two pixel/channels.In these embodiments, the source line more than two optionally is coupled in the output of buffer amplifier.And the specific output terminal that buffer amplifier is coupled to result is based on the comparison selected or is fixing.Like this, for example, when the value more than two pixels is compared, can control based on all value or any two or more equal values that equates.Combination to the comparison of pixel and/or channel level also can be provided.For example, when comparing two pixels, two channels can come from identical and/or different pixels.
And the value that is compared can be static state or dynamic.Like this, for example, the value that can compare the value of second pixel then and the 3rd pixel in the value of the value of first pixel and second pixel compares and when repeating this pattern, finishes to the rolling of value relatively.Selectively or additionally, the value of the value of first pixel and second pixel compares in static system, the value of the value of the 3rd pixel and the 4th pixel compares.
Though the present invention is shown specifically and describes with reference to its certain embodiments, those of ordinary skill in the art should be appreciated that and can make under the situation that does not depart from the defined the spirit and scope of the present invention of following claim in form and the change on the details.

Claims (102)

1. method that drives the source line of display device comprises:
Second data that relatively are used to drive first data of first impact damper that is associated with the first source line of display device and are used to drive second impact damper that is associated with the second source line of display device; And
Based on the comparative result of first and second data, optionally utilize first impact damper to drive the second source line of described display device.
2. the method for claim 1 further comprises based on the comparative result of first and second data and optionally forbids described second impact damper.
3. method as claimed in claim 2, wherein first data and second data comprise corresponding red data, green data and/or the blue data that is associated with the first source line and the second source line.
4. method as claimed in claim 2, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise a kind of accordingly in red data, green data or the blue data, wherein the corresponding source line in the first source line and the second source line is with two different pixels are associated the source line.
5. method as claimed in claim 2, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise different a kind of in red data, green data or the blue data.
6. method as claimed in claim 2, wherein comparison step comprises and judges whether first data have identical value with second data.
7. method as claimed in claim 2, wherein first data and second data comprise the RGB data of two different pixels, first impact damper comprises the first red source line buffer, the first green source line buffer and the first blue sources line buffer, and second impact damper comprises the second red source line buffer, the second green source line buffer and the second blue sources line buffer.
8. method as claimed in claim 2, the step of wherein optionally forbidding second impact damper further comprise when first impact damper drives the first source line with the second source line and optionally second impact damper being separated from the second source line.
9. method as claimed in claim 2, the step of wherein optionally forbidding second impact damper comprises differential amplifier input circuit and/or the output driving circuit of optionally forbidding second impact damper.
10. the method for claim 1, wherein the first source line and the second source line are the source lines of same pixel.
11. the method for claim 1, wherein the first source line and the second source line are the source lines of different pixels.
12. the method for claim 1, wherein first data and second data comprise corresponding red data, green data, blue data and/or the white data that is associated with the first source line and the second source line.
13. the method for claim 1, wherein display device comprises LCD.
14. method as claimed in claim 2, the step that wherein relatively is used to drive first data of first impact damper that is associated with the first source line of display device and is used to drive second data of second impact damper that is associated with the second source line of display device comprises: second data that relatively are used to drive first data of a plurality of first impact dampers that are associated with the first multiple source line and are used to drive a plurality of second impact dampers that are associated with the second multiple source line; And
Wherein based on the comparative result of first and second data and utilize first impact damper optionally to forbid second impact damper and the step that drives the second source line of display device comprises: optionally utilize more than first impact damper to forbid more than second impact damper and drive the second multiple source line of display device based on the comparative result of first and second data.
15. a method that is used to drive the source line of display device comprises:
The data that the data and being used to that will be used to drive the first source line of display device drive at least one other source line of described display device compare;
Utilize a common source line buffer optionally to drive described at least one other source line and the first source line based on the data comparative result; And
If described at least one other source line is driven by described common source line buffer, the source line buffer of then described at least one other source line is disabled.
16. method as claimed in claim 15, wherein the step of comparing data comprises: each the data that the data and being used to that will be used for driving the first source line of display device drive a plurality of other source lines of display device compare;
Wherein the step of utilizing a common source line buffer optionally to drive described at least one other source line and the first source line based on the data comparative result comprises: utilize described common source line buffer to drive selected those source lines in the first source line and a plurality of other source line; And
Wherein the step of inactive source line buffer comprises: invalid each the source line buffer that is used for the multiple source line that driven by described common source line buffer.
17. method as claimed in claim 15, the step of wherein utilizing described common buffer to drive selected those source lines in the first source line and a plurality of other source line comprises: utilize described common source line buffer to drive in the first source line and a plurality of other source line each.
18. method as claimed in claim 15, wherein the step of inactive source line buffer comprises: optionally the differential amplifier input circuit and/or the output driving circuit of inactive source line buffer.
19. method as claimed in claim 15, the wherein first source line and described at least one other source line source line that is same pixel.
20. method as claimed in claim 15, the wherein first source line and this at least one other source line source line that is different pixels.
21. method as claimed in claim 15, wherein the first source line and this at least one other source line are the source lines that is associated with the same color component of at least two different pixels.
22. method as claimed in claim 15, wherein the first source line and this at least one other source line are the source lines that is associated with the different colours component.
23. method as claimed in claim 22, the wherein first source line and this at least one other source line source line that is different pixels.
24. method as claimed in claim 22, the wherein first source line and this at least one other source line source line that is single pixel.
25. method as claimed in claim 15, wherein the first source line comprises the first multiple source line, and this at least one other source line comprises the second multiple source line;
The data and being used to that wherein will be used to drive the first source line of this display device drive the step that the data of this at least one other source line of this display device compare and comprise: the data that the data and being used to that will be used to drive the first multiple source line of this display device drive the second multiple source line of this display device compare;
Wherein the step of utilizing the common source line buffer to drive this at least one other source line and the first source line based on the data comparative result comprises: the result utilizes a plurality of common source line drives optionally to drive the second multiple source line and the first multiple source line based on the comparison; And
If this at least one other source line is driven by the common source line buffer, the step of the source line buffer of then invalid this at least one other source line comprises: if the second multiple source line is driven by a plurality of common source line buffers, and the source line buffer of the then invalid second multiple source line.
26. method as claimed in claim 25, the data that the data and being used to that wherein are used to drive the first multiple source line of display device drive the second multiple source line of display device comprise the RGB data.
Comprise 27. method as claimed in claim 25, the data and being used to that wherein will be used to drive the first multiple source line of display device drive the step that the data of the second multiple source line of display device compare: the respective components of data that the component and being used to of data that will be used to drive the first multiple source line of display device drives the second multiple source line of display device compares.
Comprise 28. method as claimed in claim 25, the data and being used to that wherein will be used to drive the first multiple source line of display device drive the step that the data of the second multiple source line of display device compare: the data that the data and the institute of the be useful on first multiple source line that drives display device is useful on the second multiple source line of driving display device compare.
29. method as claimed in claim 15, the data that wherein are used to drive the first source line of display device comprise redness, green, blueness and/or white data, and the data that are used to drive at least one other source line of display device comprise redness, green, blueness and/or white data.
30. method as claimed in claim 15, wherein this display device comprises LCD panel.
31. a buffer circuit that is used to drive the source line of display device comprises:
Data comparison circuit is used for first data value that comparison is associated with the first source line of display device and second data value that is associated with the second source line of display device;
Drive first impact damper of the first source line based on first data value;
Drive second impact damper of the second source line based on second data value, this second impact damper in response to data comparison circuit so that optionally forbid second impact damper; And
First commutation circuit is configured in response to data comparison circuit optionally first impact damper is electrically coupled on the second source line.
32. buffer circuit as claimed in claim 31, wherein first data and second data comprise corresponding red data, green data and/or the blue data that is associated with the first source line and the second source line.
33. buffer circuit as claimed in claim 32, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise correspondence a kind of of red data, green data or blue data, wherein the respective sources line in the source line that the first source line and the second source line are with two different pixels of display device are associated.
34. buffer circuit as claimed in claim 31, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise different a kind of in red data, green data or the blue data.
35. buffer circuit as claimed in claim 31, wherein data comparison circuit is configured to judge whether first data have identical value with second data.
36. buffer circuit as claimed in claim 31, wherein first data and second data comprise the RGB data of two different pixels that are used for display device, first impact damper comprises: the first red impact damper that is configured to drive the first red source line, be configured to drive the green buffers of the first green source line and be configured to drive the first blue impact damper of the first blue sources line, and second impact damper comprises: be configured to the second red impact damper that drives the second red source line and be configured to optionally be forbidden in response to data comparison circuit, be configured to second green buffers that drives the second green source line and be configured to optionally be forbidden in response to data comparison circuit, be configured to the second blue impact damper that drives the second blue sources line and be configured to optionally be forbidden in response to data comparison circuit;
Wherein first commutation circuit is configured to optionally in response to data comparison circuit the first red impact damper is electrically coupled on the second red source line, in response to data comparison circuit the first blue impact damper is electrically coupled on the second blue sources line, and first green buffers is coupled on the second green source line in response to data comparison circuit.
37. buffer circuit as claimed in claim 31, further comprise: second commutation circuit, be configured to optionally in response to data comparison circuit second impact damper from the separation that powers on of the second source line, so that if first impact damper is coupling on the second source line, then separate second impact damper from the second source line.
38. buffer circuit as claimed in claim 37, wherein data comparison circuit comprises:
The logic gate of the corresponding data position of a plurality of comparison first and second data values;
If gather all outputs of the output of a plurality of logic gates and these a plurality of logic gates and be identical logical values then export the logic of sets door of first signal; And
A plurality of based on the logic of sets door output and optionally control signal is offered the multiplexer of first and second commutation circuits.
39. buffer circuit as claimed in claim 38, wherein these a plurality of logic gates comprise a plurality of XOR gate, and wherein this logic of sets door comprises the NOR door.
40. buffer circuit as claimed in claim 38, wherein this logic of sets door comprises a plurality of logic gates.
41. buffer circuit as claimed in claim 38, wherein these a plurality of multiplexers comprise:
Be configured to generate first multiplexer of control signal of the operation of control second impact damper;
Be configured to generate the operation of control first commutation circuit first impact damper is coupled to second multiplexer of the control signal on the second source line; And
The operation that is configured to generate control second commutation circuit is with the 3rd multiplexer of control signal that second impact damper is separated from the second source line.
42. buffer circuit as claimed in claim 31, wherein second impact damper comprises: if be configured to the disabled then input circuit that optionally transistor is disconnected from voltage source of second impact damper.
43. buffer circuit as claimed in claim 42, wherein second impact damper further comprises: the output circuit of the output driving transistors that is configured to controlling output circuit so that the output line of second impact damper is separated from the output voltage source of second impact damper.
44. buffer circuit as claimed in claim 31, wherein this display device comprises liquid crystal display.
45. a system that is used to drive the source line of display device comprises:
To be used to drive first data of first impact damper that is associated with the first source line of display device and be used to drive the device that second data of second impact damper that is associated with the second source line of display device compare; And
Based on the comparison of first and second data, optionally utilize first impact damper to drive the device of the second source line of this display device.
46. system as claimed in claim 45 further comprises: the device of optionally forbidding this second impact damper in response to the device that is used for comparison.
47. system as claimed in claim 45, wherein first data and second data comprise corresponding red data, green data and/or the blue data that is associated with the first source line and the second source line.
48. system as claimed in claim 46, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise a kind of accordingly in red data, green data or the blue data, and wherein the first source line and the second source line are the corresponding source lines that is associated with two different pixels.
49. system as claimed in claim 46, wherein first data comprise a kind of in red data, green data or the blue data, and second data comprise different a kind of in red data, green data or the blue data.
50. system as claimed in claim 46, the device that wherein is used for comparison comprises: be used to the device of judging whether first data and second data have identical value.
51. system as claimed in claim 46, wherein first data and second data comprise the RGB data that are used for two different pixels, first impact damper comprises: the first red source line buffer, the first green source line buffer and the first blue sources line buffer, and second impact damper comprises: the second red source line buffer, the second green source line buffer and the second blue sources line buffer.
52. system as claimed in claim 46, the device of wherein optionally forbidding second impact damper further comprises: the device that optionally second impact damper is separated from the second source line when first impact damper drives the first source line with the second source line.
53. system as claimed in claim 46, the device of wherein optionally forbidding second impact damper comprises: optionally forbid the differential amplifier input circuit of second impact damper and/or the device of output driving circuit.
54. system as claimed in claim 46, wherein the first source line and the second source line are the source lines of same pixel.
55. system as claimed in claim 46, wherein the first source line and the second source line are the source lines that is used for different pixels.
56. system as claimed in claim 46, wherein first data and second data comprise corresponding red data, green data, blue data and/or the white data that is associated with the first source line and the second source line.
57. system as claimed in claim 46, wherein display device comprises LCD.
58. system as claimed in claim 46, wherein relatively be used to drive first data of first impact damper that is associated with the first source line of display device and be used to drive the device of second data of second impact damper that is associated with the second source line of display device, comprising: relatively be used to the device that drives first data of a plurality of first impact dampers that are associated with the first multiple source line and be used to drive second data of a plurality of second impact dampers that are associated with the second multiple source line; And
The device of wherein optionally forbidding the device of second impact damper and utilizing first impact damper optionally to drive the second source line of display device comprises: in response to the device that is used for comparison, and optionally forbid more than second impact damper and utilize more than first impact damper to drive the device of the second multiple source line of display device.
59. a system that is used to drive the source line of display device comprises:
The data and being used to that will be used to drive the first source line of display device drive the device that the data of at least one other source line of this display device compare;
Utilize a common source line buffer optionally to drive this at least one other source line of display device and the device of the first source line in response to the device that is used for comparison; And
If this at least one other source line is driven by the common source line buffer, the device of the source line buffer of then invalid this at least one other source line.
60. system as claimed in claim 59, the device that wherein is used for comparing data comprises: the data and being used to that will be used to drive the first source line of display device drive the device that each data of a plurality of other source lines of display device compare;
The device that wherein utilizes a common source line buffer optionally to drive this at least one other source line and the first source line comprises: utilize this common source line buffer to drive the device of selected those source lines in the first source line and a plurality of other source line; And
The device that wherein is used for the inactive source line buffer comprises: invalid each the device of source line buffer that is used for the multiple source line that driven by this common source line buffer.
61. system as claimed in claim 59 wherein comprises with the device that this common buffer drives selected those source lines in the first source line and a plurality of other source line: drive each device in the first source line and a plurality of other source line with this common source line buffer.
62. system as claimed in claim 59, the device of wherein forbidding the source line buffer comprises: optionally forbid the differential amplifier input circuit of source line buffer and/or the device of output driving circuit.
63. system as claimed in claim 59, the wherein first source line and this at least one other source line source line that is same pixel.
64. system as claimed in claim 59, the wherein first source line and this at least one other source line source line that is different pixels.
65. system as claimed in claim 59, wherein the first source line and this at least one other source line are the source lines that is associated with the same color component of at least two different pixels.
66. system as claimed in claim 59, wherein the first source line and this at least one other source line are the source lines that is associated with the different colours component.
67. as the described system of claim 66, the first source line and this at least one other source line source line that is different pixels wherein.
68. as the described system of claim 66, the first source line and this at least one other source line source line that is single pixel wherein.
69. system as claimed in claim 59, wherein the first source line comprises the first multiple source line, and this at least one other source line comprises the second multiple source line;
The data and being used to that wherein will be used to drive the first source line of this display device drive the device that the data of this at least one other source line of this display device compare, and comprise that the data and being used to that will be used to drive the first multiple source line of this display device drive the device that the data of the second multiple source line of this display device compare;
The device that wherein utilizes the common source line buffer to drive this at least one other source line and the first source line comprises: utilize a plurality of common source line buffers optionally to drive the device of the second multiple source line and the first multiple source line; And
Wherein, if be used for this at least one other source line is to be driven by the common source line buffer, and the device of the source line buffer of then invalid this at least one other source line comprises: if be used for the second multiple source line is by a plurality of common source line buffers drivings then the device of the source line buffer of the invalid second multiple source line.
70. as the described system of claim 69, the data that the data and being used to that wherein are used to drive the first multiple source line of display device drive the second multiple source line of display device comprise the RGB data.
71. as the described system of claim 69, the data and being used to that wherein will be used to drive the first multiple source line of display device drive the device that the data of the second multiple source line of display device compare and comprise: the component and being used to of data that will be used to drive the first multiple source line of display device drives the device that the respective components of data of the second multiple source line of display device compares.
72. as the described system of claim 69, the data and being used to that wherein will be used to drive the first multiple source line of display device drive the device that the data of the second multiple source line of display device compare and comprise: all data and being used to that will be used to drive the first multiple source line of display device drive the device that all data of the second multiple source line of display device compare.
73. system as claimed in claim 59, the data that wherein are used to drive the first source line of display device comprise redness, green, blueness and/or white data, and the data that are used to drive at least one other source line of display device comprise redness, green, blueness and/or white data.
74. system as claimed in claim 59, wherein this display device comprises LCD panel.
75. a method of utilizing first and second buffer amplifiers to drive the first and second source lines of display board comprises:
Drive the second source line based on coming in first buffer amplifier and second buffer amplifier, to select one in the value of the video data that drives on the first and second source lines.
76., further comprise if first buffer amplifier is selected to drive the second source line then forbids second buffer amplifier as the described method of claim 75.
77. as the described method of claim 76, wherein the first and second source lines are used for the same pixel of this display board.
78. as the described method of claim 76, wherein the first and second source lines are used for the different pixels of this display board.
79. as the described method of claim 75, wherein based on come in first buffer amplifier and second buffer amplifier, to select a step that drives the second source line to comprise in the value of the video data that drives on the first and second source lines:
Select first buffer amplifier to drive the second source line if the value of the video data that drives on the first and second source lines is identical; And
If the value difference of the video data that on the first and second source lines, drives then select second buffer amplifier to drive the second source line.
80., further comprise as the described method of claim 79:
If being selected to drive the second source line, first buffer amplifier utilize first buffer amplifier to drive the second source line; And
If being selected to drive the second source line, second buffer amplifier utilize second buffer amplifier to drive the second source line.
81. a system that is used to drive the first and second source lines of display board comprises:
First and second buffer amplifiers; And
Based on come in first buffer amplifier and second buffer amplifier, to select a device that drives the second source line in the value of the video data that drives on the first and second source lines.
82., be used for that first buffer amplifier is selected to drive the second source line then the device of forbidding second buffer amplifier if further comprise as the described system of claim 81.
83. as the described system of claim 82, wherein the first and second source lines are used for the same pixel of this display board.
84. as the described system of claim 82, wherein the first and second source lines are used for the different pixels of this display board.
85. as the described system of claim 81, wherein based on come in first buffer amplifier and second buffer amplifier, to select a device that drives the second source line to comprise in the value of the video data that drives on the first and second source lines:
If it is identical then select first buffer amplifier to drive the device of the second source line to be used for the value of the video data that drives on the first and second source lines; And
If be used for the value difference of the video data that on the first and second source lines, drives then select second buffer amplifier to drive the device of the second source line.
86., further comprise as the described system of claim 85:
If be used for that first buffer amplifier is selected to drive the second source line then first buffer amplifier drives the device of the second source line; And
If be used for that second buffer amplifier is selected to drive the second source line then second buffer amplifier drives the device of the second source line.
87. a display device comprises:
Display board;
Be configured to the data comparison circuit of comparison video data value;
A plurality of source line drives that are configured to receive video data and drive the source line of display device based on the video data that receives; And
Source line handover network, in response to data comparison circuit and multiple source line drive with optionally based on not homology line and the coupling of the respective sources line drive in this multiple source line drive of the comparative result of video data value with display device.
88. as the described display device of claim 87, wherein this multiple source line drive in response to data comparison circuit optionally to come respective sources line drive in invalid this multiple source line drive based on the comparative result of video data value.
89. as the described display device of claim 88, wherein this source line handover network is configured to the source line of the inactive source line drive in the multiple source line drive from display device separated.
90. as the described display device of claim 87, if wherein this source line handover network is configured to data comparison circuit to judge video data value corresponding to these two source lines identical then a source line drive is coupled on two source lines of display board.
91. as the described display device of claim 87, wherein this display board is a LCD panel.
92. as the described display device of claim 87, wherein this display board is an organic light emitting apparatus.
93. a Source drive comprises:
At least one first source line driving circuit is used to receive first color data and the control color corresponding to the unit of this at least one first source line driver circuit; And
At least one second source line driving circuit is used to receive second color data and the control color corresponding to the unit of this at least one second source line driver circuit,
Wherein the 1st be installed in this at least one first source line driving circuit to the n buffer amplifier, and n+1 to the 2n buffer amplifier is installed in this at least one second source line driving circuit,
When this first color data equaled this second color data, the 1st part to the 2n buffer amplifier was unlocked, and other buffer amplifier is turned off, and
The buffer amplifier of opening is side by side controlled the color corresponding to the unit of this at least one first source line driving circuit and this at least one second source line driving circuit.
94. as the described Source drive of claim 93, wherein n is 3,
When this first color data equaled this second color data, the 1st the buffer amplifier of odd-numbered to the 2n buffer amplifier was unlocked, and the buffer amplifier of even-numbered is turned off;
In first color data and second color data each all comprises R channel data, G channel data and B channel data, and
The unit that is transfused to first color data and second color data is contiguous mutually.
95. as the described Source drive of claim 94, wherein this at least one first source line driving circuit comprises:
The one R demoder, a G demoder and a B demoder, be used for receiving respectively a R channel data, a G channel data and a B channel data of first color data, they are decoded, and export a R voltage signal, a G voltage signal and a B voltage signal respectively corresponding to a R channel data, a G channel data and a B channel data;
The one R buffer amplifier, a G buffer amplifier and a B buffer amplifier, be used for cushioning respectively and exporting a R voltage signal, a G voltage signal and a B voltage signal, a R buffer amplifier, a G buffer amplifier and a B buffer amplifier are in response to first operating control signal and second operating control signal and be unlocked or turn-off; And
The one R switch, the one a G switch and a B switch, be used to respond the first connection signal and be connected signal with second, respectively with a R buffer amplifier, the output terminal of the one a G buffer amplifier and a B buffer amplifier is connected to the R output line corresponding to this output terminal, the one a G output line and a B output line, or with a R buffer amplifier, the output terminal of the one a G buffer amplifier and a B buffer amplifier is from the R output line corresponding to this output terminal, the one a G output line and a B output line disconnect
This at least one second source line driving circuit comprises:
The 2nd R demoder, the 2nd G demoder and the 2nd B demoder, be used for receiving respectively the 2nd R channel data, the 2nd G channel data and the 2nd B channel data of second color data, they are decoded, and export the 2nd R voltage signal, the 2nd G voltage signal and the 2nd B voltage signal respectively corresponding to the 2nd R channel data, the 2nd G channel data and the 2nd B channel data;
The 2nd R buffer amplifier, the 2nd G buffer amplifier and the 2nd B buffer amplifier, be used for cushioning respectively and exporting the 2nd R voltage signal, the 2nd G voltage signal and the 2nd B voltage signal, the 2nd R buffer amplifier, the 2nd G buffer amplifier and the 2nd B buffer amplifier are in response to first operating control signal and second operating control signal and be unlocked or turn-off; And
The 2nd R switch, the 2nd G switch and the 2nd B switch, in response to first connection control signal and second connection control signal, respectively with the 2nd R buffer amplifier, the output terminal of the 2nd G buffer amplifier and the 2nd B buffer amplifier is connected to the 2nd R output line corresponding to this output terminal, the 2nd G output line and the 2nd B output line, or with the 2nd R buffer amplifier, the output terminal of the 2nd G buffer amplifier and the 2nd B buffer amplifier is from the 2nd R output line corresponding to this output terminal, the 2nd G output line and the 2nd B output line disconnect
The output terminal of the first and second R buffer amplifiers is connected to each other by first selector switch or disconnects,
The output terminal of the one G output line and the 2nd G buffer amplifier is connected to each other by second selector switch or disconnects,
The output terminal of the one B buffer amplifier and the 2nd B output line are connected to each other by the 3rd selector switch or disconnect, and
First selector switch, second selector switch and the 3rd selector switch are by selecting control signal control.
96. as the described Source drive of claim 93, wherein when first color data equals second color data, first operating control signal is activated to open a R buffer amplifier, a B buffer amplifier and the 2nd G buffer amplifier, and second operating control signal is disabled turn-offing a G buffer amplifier, the 2nd R buffer amplifier and the 2nd B buffer amplifier, and
When first color data was different from second color data, first operating control signal and second operating control signal all were activated to open all buffer amplifiers.
97. as the described Source drive of claim 96, wherein when first color data equals second color data, first connection control signal is activated to connect a R switch, a B switch and the 2nd G switch, and second connection control signal is disabled so that a G switch, the 2nd R switch and the 2nd B switch are disconnected mutually
When first color data was different from second color data, first connection control signal and second connection control signal all were activated, to connect a R switch, a G switch, a B switch, the 2nd R switch, the 2nd G switch and the 2nd B switch.
98. as the described Source drive of claim 96, wherein when first color data equals second color data, select control signal to be activated connecting first selector switch, second selector switch and the 3rd selector switch,
And when first color data is different from second color data, select control signal to be disabled to disconnect first selector switch, second selector switch and the 3rd selector switch.
99. as the described Source drive of claim 95, wherein the part in the 2nd R output line, the 2nd G output line, the 2nd B output line, the 2nd R output line, the 2nd G output line and the 2nd B output line is connected respectively to and is used for testing on the probe end of this buffer amplifier, and
When selecting the control signal and second connection control signal alternately to be activated, all buffer amplifiers are tested.
100. as the described Source drive of claim 99, wherein the output terminal corresponding to the part of this buffer amplifier by second operating control signal control is connected respectively on these probe ends,
When second connection control signal is disabled when selecting control signal to be activated, tested by the part of this buffer amplifier of first operating control signal control, and
When second connection control signal is activated when selecting control signal to be disabled, tested by the part of this buffer amplifier of second operating control signal control.
101. as the described Source drive of claim 100, further comprise: steering logic is used for receiving control signal from external test facility, and is controlled at the selection control signal and second connection control signal in the test pattern.
102. as the described Source drive of claim 93, further comprise: data comparison circuit is used for whether equaling second color data and operation response signal, connect signal and selecting signal to generate first and second operating control signals, first and second connection control signal and selection control signal according to first color data.
CNB2004100757376A 2003-12-17 2004-12-17 Method and system for shared buffer display panel drive Active CN100511382C (en)

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US10/860,419 US8144100B2 (en) 2003-12-17 2004-06-03 Shared buffer display panel drive methods and systems
US10/860,419 2004-06-03
KR70028/2004 2004-09-02
KR70028/04 2004-09-02
KR1020040070028A KR100630699B1 (en) 2003-12-17 2004-09-02 Source driver capable of reducing current consumption and method thereof

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