NL1005624A1 - Polysilicon CMP process for high density DRAM cell structures. - Google Patents

Polysilicon CMP process for high density DRAM cell structures.

Info

Publication number
NL1005624A1
NL1005624A1 NL1005624A NL1005624A NL1005624A1 NL 1005624 A1 NL1005624 A1 NL 1005624A1 NL 1005624 A NL1005624 A NL 1005624A NL 1005624 A NL1005624 A NL 1005624A NL 1005624 A1 NL1005624 A1 NL 1005624A1
Authority
NL
Netherlands
Prior art keywords
high density
cmp process
cell structures
dram cell
density dram
Prior art date
Application number
NL1005624A
Other languages
Dutch (nl)
Other versions
NL1005624C2 (en
Inventor
Shih-Wei Sun
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to NL1005624A priority Critical patent/NL1005624C2/en
Publication of NL1005624A1 publication Critical patent/NL1005624A1/en
Application granted granted Critical
Publication of NL1005624C2 publication Critical patent/NL1005624C2/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
NL1005624A 1997-03-25 1997-03-25 Poly:silicon CMP processing high density DRAM memory cell structure - includes depositing 1st and 2nd insulating, 1st and 2nd poly:silicon, 3rd insulating, removing redundant 2nd poly:silicon and 3rd insulating, forming dielectric & deposit 3rd poly:silicon NL1005624C2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
NL1005624A NL1005624C2 (en) 1997-03-25 1997-03-25 Poly:silicon CMP processing high density DRAM memory cell structure - includes depositing 1st and 2nd insulating, 1st and 2nd poly:silicon, 3rd insulating, removing redundant 2nd poly:silicon and 3rd insulating, forming dielectric & deposit 3rd poly:silicon

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL1005624A NL1005624C2 (en) 1997-03-25 1997-03-25 Poly:silicon CMP processing high density DRAM memory cell structure - includes depositing 1st and 2nd insulating, 1st and 2nd poly:silicon, 3rd insulating, removing redundant 2nd poly:silicon and 3rd insulating, forming dielectric & deposit 3rd poly:silicon
NL1005624 1997-03-25

Publications (2)

Publication Number Publication Date
NL1005624A1 true NL1005624A1 (en) 1998-09-28
NL1005624C2 NL1005624C2 (en) 2000-02-08

Family

ID=19764659

Family Applications (1)

Application Number Title Priority Date Filing Date
NL1005624A NL1005624C2 (en) 1997-03-25 1997-03-25 Poly:silicon CMP processing high density DRAM memory cell structure - includes depositing 1st and 2nd insulating, 1st and 2nd poly:silicon, 3rd insulating, removing redundant 2nd poly:silicon and 3rd insulating, forming dielectric & deposit 3rd poly:silicon

Country Status (1)

Country Link
NL (1) NL1005624C2 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2875588B2 (en) * 1990-05-22 1999-03-31 沖電気工業株式会社 Method for manufacturing semiconductor device
KR960011652B1 (en) * 1993-04-14 1996-08-24 현대전자산업 주식회사 Stack capacitor and the method
JP3085831B2 (en) * 1993-09-17 2000-09-11 沖電気工業株式会社 Method for manufacturing semiconductor device
US5604148A (en) * 1996-03-08 1997-02-18 United Microelectronics Corporation Process of fabricating stacked capacitor configuration for dynamic random access memory

Also Published As

Publication number Publication date
NL1005624C2 (en) 2000-02-08

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AD1A A request for search or an international type search has been filed
RD2N Patents in respect of which a decision has been taken or a report has been made (novelty report)

Effective date: 19990923

PD2B A search report has been drawn up
VD1 Lapsed due to non-payment of the annual fee

Effective date: 20021001