MY142532A - Procedure for the manufacture of track patterns - Google Patents
Procedure for the manufacture of track patternsInfo
- Publication number
- MY142532A MY142532A MYPI20020228A MY142532A MY 142532 A MY142532 A MY 142532A MY PI20020228 A MYPI20020228 A MY PI20020228A MY 142532 A MY142532 A MY 142532A
- Authority
- MY
- Malaysia
- Prior art keywords
- punching
- manufacture
- procedure
- pattern
- track patterns
- Prior art date
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B26—HAND CUTTING TOOLS; CUTTING; SEVERING
- B26F—PERFORATING; PUNCHING; CUTTING-OUT; STAMPING-OUT; SEVERING BY MEANS OTHER THAN CUTTING
- B26F1/00—Perforating; Punching; Cutting-out; Stamping-out; Apparatus therefor
- B26F1/38—Cutting-out; Stamping-out
- B26F1/40—Cutting-out; Stamping-out using a press, e.g. of the ram type
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B21—MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL; PUNCHING METAL
- B21D—WORKING OR PROCESSING OF SHEET METAL OR METAL TUBES, RODS OR PROFILES WITHOUT ESSENTIALLY REMOVING MATERIAL; PUNCHING METAL
- B21D28/00—Shaping by press-cutting; Perforating
- B21D28/02—Punching blanks or articles with or without obtaining scrap; Notching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/041—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a die for cutting the conductive material
Abstract
THE PRESENT INVENTION RELATES TO A PROCEDURE FOR THE MANUFACTURE OF TRACK PATTERNS IN AN ELONGATED MATERIAL TAPE (I A, I B, 6A, 6B) WITH THE INDIVIDUAL TRACK PATTERNS BEING FORMED FROM A FIRST PUNCHING PATTERN (2, 7) AND A SECOND PUNCHING PATTERN, IN WHICH THE FIRST PUNCHING PATTERN (2, 7) IS GENERATED THROUGH AT LEAST ONE PUNCHING STEP AT AT LEAST ONE FIRST PUNCHING STATION AND THE SECOND PUNCHING PATTERN (3, 5, 8, 10) IS GENERATED AT AT LEAST ONE ADDITIONAL PUNCHING STEP AT LEAST ONE ADDITIONAL PUNCHING STATION. THE PROBLEM IS TO PROVIDE A PUNCHING PROCEDURE FOR MANUFACTURE OF TRACK PATTERNS AND/OR PUNCHING PATTERNS. THIS PROBLEM IS SOLVED BY DESIGNING THE FIRST PUNCHING PATTERN (2, 7) AND THE SECOND PUNCHING PATTERN (3, 5, 8, 10) TO BE PARTIALLY OVERLAPPING.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2001103193 DE10103193B4 (en) | 2001-01-24 | 2001-01-24 | Method for producing printed conductor structures |
Publications (1)
Publication Number | Publication Date |
---|---|
MY142532A true MY142532A (en) | 2010-12-15 |
Family
ID=7671638
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI20020228 MY142532A (en) | 2001-01-24 | 2002-01-21 | Procedure for the manufacture of track patterns |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1227709A3 (en) |
JP (1) | JP2002321190A (en) |
CN (1) | CN1289225C (en) |
DE (1) | DE10103193B4 (en) |
MY (1) | MY142532A (en) |
SG (1) | SG120863A1 (en) |
TW (1) | TW521549B (en) |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3059320A (en) * | 1958-06-23 | 1962-10-23 | Ibm | Method of making electrical circuit |
US3072734A (en) * | 1958-08-26 | 1963-01-08 | Eastman Kodak Co | Circuit board for mounting and inter-connecting electrical components |
DE1226182B (en) | 1960-11-10 | 1966-10-06 | Siemens Ag | Process for the production of so-called printed circuits with conductor lines made of metal foil |
DE3108490A1 (en) * | 1981-03-06 | 1982-10-21 | Robert Bosch Gmbh, 7000 Stuttgart | METHOD AND PUNCHING TOOL FOR WASTE-FREE PUNCHING OF PACKING STRIPS AND CORRECTLY PRODUCED PACKING STRIPS |
US4555291A (en) * | 1981-04-23 | 1985-11-26 | Minnesota Mining And Manufacturing Company | Method of constructing an LC network |
DE3703649A1 (en) * | 1987-02-06 | 1988-08-18 | Heraeus Gmbh W C | TOOL FOR PUNCHING COMPLEX CUTTING IMAGES FROM A METAL STRIP |
SU1438886A1 (en) * | 1987-05-27 | 1988-11-23 | Ульяновский политехнический институт | Method of progressive forming on a band |
JPH05144336A (en) * | 1991-11-22 | 1993-06-11 | Mitsubishi Cable Ind Ltd | Manufacture of conductor pattern for flat cable |
DE19521022C2 (en) * | 1995-06-13 | 1997-04-10 | Heraeus Gmbh W C | Process for producing a layered composite |
DE19600481A1 (en) * | 1996-01-09 | 1997-07-10 | Orga Kartensysteme Gmbh | Chip- or intelligent-card design |
KR100231837B1 (en) * | 1997-05-12 | 1999-12-01 | 유무성 | Method for inner lead manufacturing in fine pitch leadframe |
DE19914032A1 (en) * | 1998-11-18 | 2000-09-28 | Prometron Gmbh | Method for producing and depositing punched antenna coil with several turns on chip card by depositing one or more coils after splitting on chip card in certain spatial mode |
-
2001
- 2001-01-24 DE DE2001103193 patent/DE10103193B4/en not_active Expired - Fee Related
- 2001-11-30 TW TW090129651A patent/TW521549B/en not_active IP Right Cessation
- 2001-12-11 EP EP01129510A patent/EP1227709A3/en not_active Withdrawn
- 2001-12-12 SG SG200107777A patent/SG120863A1/en unknown
-
2002
- 2002-01-21 MY MYPI20020228 patent/MY142532A/en unknown
- 2002-01-23 JP JP2002014418A patent/JP2002321190A/en active Pending
- 2002-01-24 CN CN 02102819 patent/CN1289225C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1227709A3 (en) | 2004-04-07 |
JP2002321190A (en) | 2002-11-05 |
DE10103193B4 (en) | 2008-10-30 |
SG120863A1 (en) | 2006-04-26 |
DE10103193A1 (en) | 2002-08-01 |
TW521549B (en) | 2003-02-21 |
CN1289225C (en) | 2006-12-13 |
CN1367068A (en) | 2002-09-04 |
EP1227709A2 (en) | 2002-07-31 |
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