MY100402A - Injection molded multi - layer circuit board and method of making same. - Google Patents

Injection molded multi - layer circuit board and method of making same.

Info

Publication number
MY100402A
MY100402A MYPI88000261A MYPI19880261A MY100402A MY 100402 A MY100402 A MY 100402A MY PI88000261 A MYPI88000261 A MY PI88000261A MY PI19880261 A MYPI19880261 A MY PI19880261A MY 100402 A MY100402 A MY 100402A
Authority
MY
Malaysia
Prior art keywords
plating
substrates
conductive material
circuit board
plating resist
Prior art date
Application number
MYPI88000261A
Inventor
H Mettler John
W Mettler Rollin Jr
Impey John
Original Assignee
Mint Pac Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/771,134 external-priority patent/US4591220A/en
Application filed by Mint Pac Tech Inc filed Critical Mint Pac Tech Inc
Publication of MY100402A publication Critical patent/MY100402A/en

Links

Landscapes

  • Injection Moulding Of Plastics Or The Like (AREA)

Abstract

A MULTI-LAYER CIRCUIT BOARD COMPRISED OF TWO OR MORE CIRCUIT BOARD SUBSTRATES (10, 12) SHAPED BY INJECTION MOLDING WITH MATING INTERCONNECTING PINS (22) AND HOLES (26) AND BANDED TOGETHER WITH AN ELECTRICALLY INSULATED ADHESIVE MATERIAL (28). CIRCUIT LEADS (14-20) ARE PROVIDED ON BOTH SIDES OF EACH SUBSTRATE RECESSED INTO CHANNELS FORMED IN THE SURFACE OF THE SUBSTRATE DURING THE MOLDING PROCESS.ELECTRICAL INTERCONNECTION OF THE LAYERS OF CIRCUITRY OCCURS WHERE THE CONDUCTIVE MATERIALS OF THE CIRCUIT LEADS PASSES DOWN THROUGH COMPONENT LEAD HOLE (26) AXIALLY LOCATED IN THE INTERCONNECTING PINS AND AROUND THE EXTERIOR OF THE INTERCONNECTING PINS WHERE CONTACT IS MADE WITH THE CONDUCTIVE MATERIAL COATING ON THE INTERIOR OF THE INTERCONNECTING HOLES.A METHOD OF MAKING THE MULTI-LAYER BOARD INCLUDES INJECTION MOLDING THE SUBSTRATES IN THE SUITABLE SHAPED MOLD (74, 76), PLATING SUBSTANTIALLY ALL OF THE SURFACE OF THE SUBSTRATES WITH THE CONDUCTIVE MATERIAL (82), MASKING WITH A PLATING RESIST (84), PLATING AGAIN WITH CONDUCTIVE MATERIAL (86), PLATING WITH AN ETCH RESISTANT CONTACT MATERIAL (88), REMOVING THE PLATING RESIST AND FLASH-ETCHING TO REMOVE THE CONDUCTIVE MATERIAL INITIALLY PLATED AND MASKED BY THE PLATING RESIST SO AS TO DEFINE THE CIRCUIT LEADS (14-20). THE PREFERRED METHOD USES A ROLLER TO APPLY THE PLATING RESIST TO SOME SURFACES OF THE SUBSTRATES. (FIG.1)
MYPI88000261A 1984-10-12 1988-03-14 Injection molded multi - layer circuit board and method of making same. MY100402A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US66049584A 1984-10-12 1984-10-12
US06/771,134 US4591220A (en) 1984-10-12 1985-08-28 Injection molded multi-layer circuit board and method of making same
GB2183921 1985-10-11

Publications (1)

Publication Number Publication Date
MY100402A true MY100402A (en) 1990-09-17

Family

ID=79909451

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI88000261A MY100402A (en) 1984-10-12 1988-03-14 Injection molded multi - layer circuit board and method of making same.

Country Status (1)

Country Link
MY (1) MY100402A (en)

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