MXPA99007129A - Radio architecture - Google Patents

Abstract

A digital radio transceiver integrated circuit includes MOS transistors with normal threshold voltages in the digital circuits, and with reduced threshold voltages in at least some of the analog RF components. This allows the transceiver to be reduced in size and weight, without requiring performance to be compromised.

Description

RADIO ARCHITECTURE TECHNICAL FIELD OF THE INVENTION This invention relates to a radio architecture, and in particular to a CMOS architecture for a digital radio transceiver.

DESCRIPTION OF THE RELATED ART In the field of digital mobile telephony, it is necessary to transmit and receive radio signals carrying digital signals. In addition, it is preferable that the mobile transceiver be as small and light as possible, with few power requirements. It is advantageous to realize the digital components of the transceiver, such as a digital signal processor and an A / D converter and a D / A converter, using CMOS manufacturing techniques. This means that it is also advantageous, from the point of view of manufacturing, to realize the analog components of a transceiver, such as amplifiers, mixers, etc., using the same CMOS manufacturing techniques, such an architecture is described in Low- Power CMOS Chipset for Spread-Spectrum Communications ", S. Sheng, et al, International Solid-State Circuits Conference, 1996. However, CMOS transistors are usually designed to function as switches with low leakage current. that such transistors are less suitable for use in analog RF circuits, for example, they usually have low transconductances, especially at low bias voltages, resulting in low gain and high noise (phase.) U.S. Patent No. 5,407,849 is concerned to a method of manufacturing a CMOS circuit in which the threshold voltage of some of the transis (FET) is reduced, for example, close to zero volts.

COMPENDIUM OF THE INVENTION Thus, the radio architectures of the prior art involve the compromise of the operation of the device, if it is decided to use the CMOS processes to perform all the circuits. On the other hand, U.S. Patent No. 5,407,849 relates to reducing the threshold voltage of some of the FETs in a CMOS circuit, but does not describe how this may have any application for radio architectures. The invention includes the use of transceivers with different threshold voltages in different parts of an integrated circuit for a digital radio. An advantage of the invention is that it includes the use of transistors with high or normal threshold voltages in the circuits that handle the digital signals, and transistors with reduced threshold voltages in the circuits that process analog signals. In addition, the invention may also include the use of some transistors with high or normal threshold voltages and some transistors with reduced threshold voltages in the front end circuits of a radio transceiver. Such a transceiver can be a CMOS array, or it can use only NMOS or PMOS devices.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic block diagram of a radio transceiver according to the invention. Figure 2 is a schematic circuit diagram of a front end circuit according to the invention.

Figure 3 shows a first conventional circuit to illustrate the advantages of the present invention. Figure 4 shows a second conventional circuit to illustrate the advantages of the present invention.

DETAILED DESCRIPTION OF THE MODALITIES As shown in Figure 1, a radio transceiver 2, for use in a mobile telephone, has a receiving antenna 4 for receiving radio signals, and a low noise amplifier 6 for restoring the received signals to the usual levels. The amplified signals pass to a mixer 8 where they are converted from the radio frequency to a lower intermediate frequency, and then filtered in a filter 10. The filtered signals are passed to an analog-digital converter (A / D) 12, which converts the signals to a digital form, in which these can be handled by a signal processor 14, after which they are sent on line 16. The signals for transmission are digitally supplied on line 18 to the signal processor 14, and then, after of the process, are supplied to a digital-analog converter (D / A) 20. After conversion to the analog form, the signals are sent to a modulator 22 for conversion to the radio frequency, and then to an amplifier. power 24, and to a transmitting antenna 26 (which can be combined with the receiving antenna 4), for transmission as a radio signal. The general structure of a transceiver such as the one indicated above will be familiar to a person skilled in the art, and it will be evident that various changes and modifications are possible. In addition, it has been proposed that it may be advantageous to integrate the circuits into a single chip. The inventors of this patent have recognized that the transceiver shown in Figure 1 includes circuits of two different types, which represent different requirements, and that these conflicting requirements can be met by using transistors with different threshold voltages and in different types of circuit. This allows the function of a transceiver to be optimized, while still allowing the radio circuits to be formed in a monolithic integrated circuit, which has an advantage from the point of view of the size and weight of the telephone. Specifically, the digital parts of the circuit, for example, the A / D converter and the D / A converter, are advantageously formed using CMOS transistors with normal threshold voltages (sometimes referred to here as high), for example in the + region. 1V for an NMOS device or -IV for a PMOS device. In this way, the magnitude of the threshold voltage in each case is greater than 0.5V. In contrast, the analogue RF parts of the circuit, for example the amplifiers, are advantageously formed using CMOS transistors with reduced threshold voltages, with magnitudes less than 0.5V. This can result in low power consumption, low noise, and greater bandwidth. Threshold voltages are preferably reduced, close to 0, or even after 0. Thus, NMOS transistors may have small negative threshold voltages, while PMOS transistors may have small positive threshold voltages. The dotted line 28 in Figure 1 shows a preferred division of the circuit. The circuits to the right of line 28 can have transistors with high threshold voltages, while the circuits to the left of line 28 have transistors with low threshold voltages. However, other divisions are possible, and it is certainly possible to use transistors with different threshold voltages in different parts of the same circuit. As described in U.S. Patent No. 5,407,849, it is possible to achieve different threshold voltages in different transistors by changing the threshold implantation doses in selected parts of a semiconductor device,. using the existing masks, or adding other masks. It also indicates a radio architecture which can be integrated into a single chip, without sacrificing the function. Figure 2 is a schematic circuit diagram of a front end circuit of a radio receiver according to the invention. As mentioned above, this circuit includes transistors with different threshold voltages. In the drawing, the transistors are shown only for clarity. In Figure 2, transistors with reduced threshold voltages are shown with thick drainage source channels. As mentioned, the threshold voltages of these devices can be greatly reduced, advantageously to near zero, or even after zero. Devices with thresholds after zero are known as depletion devices. The rest of the circuits are conventional, and the general design of the circuit will be well known to a person skilled in the art. The transistors can be CMOS devices, or they can be PMOS or NMOS devices. In a broad sense, the receiver circuit of Figure 2 includes an input amplifier stage 52, local oscillator controllers 54, 56 and a pair of mixers 58, 60. The circuit forms a single symmetrical front end. The circuit can be combined with another identical circuit to form a double symmetric low noise amplifier and mixer. The amplifier stage 52 includes a pair of input transistors Ml, M4, which are respectively connected to ground and to the supply voltage Vdd. An RFin input frequency signal is supplied to the gate of the first input transistor Ml, and is supplied inverted to the second input transistor M4. The amplification stage 52 also includes a pair of common gate transistors M2, M3, which receive the divided supply voltage Vdd / 2 in their gates (inverted in the case of M3), and has their drain source channels connected to the drain source channels of the input transistors Ml, M4. It will be noted that the common cascode gate transistors M2, M3 are low threshold devices. The output of the amplifier stage 52 is supplied to a phase mixer 58 constituted by transistors M5, M6, and a quadrature mixer 60 constituted by transistors M7, M8. A signal from the local oscillator in phase LOi is supplied to the gate of transistor M9, and is supplied inverted to the gate of the MIO transistor, the M9 and MIO transistors connected between supply voltage Vdd and ground, so that M9 and MIO form a controller of the local oscillator 54. The output signal of the transistors M9 and MIO is supplied to the gate of the transistor M8, and is supplied inverted to the gate of the transistor M5. A signal from the local oscillator in quadrature LOq is supplied to a gate of the transistor Mil, and is supplied in inverted form to the gate of the transistor M12, the transistors Mil and M12 are connected between the supply voltage Vdd and ground, so that and M12 form a controller of the local oscillator 56. The output signal of the transistors Mil and M12 is supplied to a gate of the transistor M6, and is supplied inverted to the gate of the transistor M7. The output of the mixer in phase 58 is an intermediate frequency signal in phase IFi, and the output of the quadrature mixer 60 is a quadrature intermediate frequency signal IFq. It will be noted that transistors M5, M6, M7 and M8 are low threshold devices, while the transistors of the local oscillator controller M9, MIO, Mil and M12 are of the regular threshold type. In the case of the transistors of the local oscillator controller, it is advantageous that the leakage currents in the off state be reduced to a minimum, and so the use of regular threshold transistors is preferred. In addition, an advantage of the use of transistors with high or regular threshold voltages in a VCO is that this results in a longer "oscillation of the signal" on the resonator, and lower noise (phase). low threshold in a cascode, as in amplifier 52, will be explained with reference to Figure 3. Figure 2 shows two cascode transistors Ql and Q2, which have their respective gate source voltages Vgsl and Vgs2. input is applied to the gate of Ql, and an output signal is obtained in the drain of Q2. The voltage of the gate source Vgsl of the source device ground connection Ql must be at least sufficient height, in comparison with the threshold voltage Vth, so that Vgsl-Vth = IV.Otherwise, the device will not operate on RF.Similar considerations apply to Q2, which means that the voltage gate of Q2 must be set at less near 2.8V This can not be achieved in a 3V process, and could hardly be reached in any process with lower supply voltage. However, if the threshold voltage were reduced, for example to zero, a gate voltage of 2V would be sufficient for Q2. Returning to the circuit of Figure 2, it can be seen that using low threshold devices for cascode common gate transistors M2, M3 improves the dynamic range of the circuit, or may allow the use of lower supply voltages. A potential problem with the use of low threshold devices is that they will lead (due to sub-threshold conduction) even when their source gate voltage is zero. This problem is solved in the amplifier circuit 52 of Figure 2 wherein - the input transistors Ml, M4 are of the regular threshold type, with low leakage currents. The input transistors Ml, M4 can also have reduced thresholds, in which case it will be necessary to turn off the supply current to turn off the amplifier. In this case, it would also be necessary to couple the transistors Ml, M4 to the input, and to polarize them separately. The advantage of using low threshold devices in a transmission gate, such as in mixers 58, 60 will be explained with reference to Figure 4. Specifically, Figure 4 shows a transmission gate constituted by two transistors, one of which Q3 it has its gate connected to supply voltage Vdd, and the other, Q4 has its gate connected to ground. For each transistor, the gate source voltage is Vdd / 2. Taking into account the threshold voltage and ignoring the effects of reverse polarization, the effective gate voltage is Vdd / 2-Vth. For a 3V process, where the threshold voltage is 0.8V, this gives an effective gate voltage of about 0.7V. The lower the effective gate voltage, the greater the problem that arises due to the noise. In addition, if the supply voltage were reduced, the effective gate voltage could hardly be sufficient to turn on the gate. If the threshold voltage is reduced to zero, the effective gate voltage would be approximately equal to Vdd / 2, that is, about 1.5V, approximately twice the value when the normal threshold devices are used. Returning to the circuit of Figure 2, it can be seen that using low threshold devices for transistors M5, M6, M7 and M8 reduces noise, and also reduces the resistance of the devices in the on state. It is also possible to use a lower supply voltage. A potential problem with the use of low threshold devices is that they will lead (due to sub-threshold conduction) even when their source gate voltage is zero. This problem is solved in the mixing circuits 58, 60 of Figure 2 in which the transistors can be properly turned off by the application of negative gate source voltage, equal and opposite to the operating voltage Vdd / 2. Thus the receiver circuits have been described which are capable of operating effectively with low supply voltages, without causing problems due to high leakage currents.

Claims (19)

1. An integrated circuit for use in a digital radio transceiver, the integrated circuit includes: the first MOS transistors with high threshold voltages, and the second MOS transistors with reduced threshold voltages. The integrated circuit for use in a digital radio transceiver according to claim 1, wherein the NMOS transistors between the second MOS transistors have negative threshold voltages and the PMOS transistors between the second MOS transistors have positive threshold voltages. 3. A mobile telephone including an integrated circuit according to claim 1 or

2. 4. An integrated circuit for use in a digital radio transceiver of the integrated circuit including analog devices containing MOS transistors, at least some of which they have high threshold voltages, and digital devices that include MOS transistors where at least some of them have reduced threshold voltages. 5. A digital radio transceiver, which contains an analog RF receiver and transmitter components and an analog-to-digital converter and a digital-analog converter, each of which includes MOS transistors, wherein the analog RF receiver and the components Transmitters and the analog-digital converter and the digital-analog converter are part of the same integrated circuit, and where the MOS transistors in the analog-digital converter and the digital-analog converter have high threshold voltages and at least some of the MOS transistors have low threshold voltages in their analog components. 6. A mobile telephone including a transceiver according to claim 5. 7. A digital radio transceiver, which contains analog devices and digital devices each of which includes MOS transistors, wherein the MOS transistors in the digital devices have voltages high thresholds and at least some of the MOS transistors have low threshold voltages in analog devices. The digital radio transceiver according to claim 7, wherein the analog devices and the digital devices are part of the same integrated circuit. 9. A digital radio transceiver, comprising analog components and digital components each of which includes MOS transistors, wherein the MOS transistors of the digital components have higher threshold voltages than the at least some of the MOS transistors of the digital components. the analog components. The digital radio transceiver according to claim 9, wherein the NMOS transistors have negative threshold voltages in the analog components and the PMOS transistors have positive threshold voltages to the analog components. 11. A digital radio transceiver, which contains an analog RF receiver and transmitter components and an analog-digital converter and a digital-analog converter, each of which includes MOS transistors, where the MOS transistors have high threshold voltages in the analog-digital converter and the digital-analog converter and the MOS transistors have low threshold voltages in their analog components. 12. A digital radio transceiver according to claim 11, wherein the analog RF receiver and the transmitter components and the analog-digital converter and the digital-analog converter are part of the same integrated circuit. The digital radio transceiver according to claim 11 or 12, wherein the NMOS transistors in the RF analogue receiver and the transmitting components have negative threshold voltages and the PMOS transistors in the analog RF receiver and the transmitting components have voltages of positive thresholds. 14. A method for manufacturing an integrated circuit of a digital radio transceiver, which contains analog components and digital components, each of which includes MOS transistors, comprises the modification of the threshold implantation doses so that the MOS transistors have high threshold voltages in the digital components and at least some of the MOS transistors have low threshold voltages in the analog components. 15. A radio receiver amplifier circuit contains a pair of common gate MOSFET transistors, and a pair of input MOSFET transistors, to which the input signal is applied, the input transistors are connected to the supply voltage and Earth, and common gate transistors are cascode between input transistors, where common gate transistors have reduced threshold voltages. 16. The amplifier circuit of the radio receiver according to claim 15, wherein the input transistors have regular thresholds. 17. A mixing circuit of the radio frequency containing a pair of transmission gates, each with a pair of MOSFET transistors, with their respective local oscillator signals is supplied to the gates of the transistors, and an input signal is it supplies the inputs of the transmission gates, where the transistors of the transmission gates have reduced thresholds. 18. The radio frequency mixing circuit according to claim 17, wherein the local oscillator signals for the transmission gates are supplied through a pair of local oscillator controllers, each formed by a pair of transistors, in where the transistors of the local oscillator controllers have normal thresholds. 19. A radio receiver containing an amplifier according to claim 15 or 16 and a mixing circuit according to claim 17 or 18.