JPH06152254A - Frequency/conversion circuit and transmission/reception circuit - Google Patents

Abstract

PURPOSE:To considerably increase the switching speed by using the second gate of a dual gate FET to turn on/off a circuit. CONSTITUTION:An FET 105 for signal amplification consists of the dual gate FET, and its first gate is connected to the source of an FET 101 for frequency conversion, and its second gate is used as the circuit turning-on/off control terminal. Signals LO and RF are inputted to the gate and the drain of the FET 101 for frequency conversion through matching circuits respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency conversion circuit, and more particularly to a frequency conversion circuit suitable for a communication radio.

[0002]

2. Description of the Related Art In recent years, the number of users of mobile telephone wireless devices has been rapidly increasing due to the progress of miniaturization, light weight and low power consumption. In the conventional communication method, transmission and reception are divided according to frequency, but digitization is in progress to support more users. In this system, it is possible to perform transmission and reception at the same frequency by time-dividing transmission and reception, which conventionally required two frequencies per line. However, the frequency conversion circuit used in the equipment using this communication system uses the circuit for the conventional system, and it is important to invent a small, low power consumption, low cost frequency conversion circuit adapted to the new communication system. Has become a problem.

A field effect transistor (hereinafter referred to as an FET) having a simple circuit configuration and a conversion gain is used in a conventional frequency conversion circuit which requires miniaturization and low power consumption.
A frequency conversion circuit using is often used (for example, the 1991 Autumn Meeting of the Institute of Electronics, Information and Communication Engineers C-337).

An example of a frequency conversion circuit using the above-mentioned conventional FET will be described below with reference to the drawings.

FIG. 4 shows the structure of a conventional frequency conversion circuit using FETs. In FIG. 4, the FET 40
A bypass capacitor 402 is connected to the source of No. 1 for grounding at high frequency, and a source bias 403 is connected to the same source side to adjust the operating current of the FET 401. The output terminal 408 is connected to the drain of the FET 401 through the output matching circuit 405, and the same output matching circuit 405 is the FET 4
01 has a power supply terminal 107 for operating.
Further, the input terminal 407 is connected to the drain of the FET 404 through the input matching circuit 406. Also FET
An LO input terminal is connected to the gate of 404 through a local (hereinafter, referred to as LO) signal matching circuit 103,
The source of the FET 404 and the gate terminal of the FET 401 are connected.

The operation of the frequency conversion circuit configured as described above will be described below.

For example, in the case of converting an RF signal of a receiving section of a radio device into an intermediate frequency (hereinafter referred to as IF), the RF signal is not shown in FIG. It is applied to the signal input terminal 407 in the figure. On the other hand, although not shown in the figure, the LO signal is amplified to a desired level through an amplifier from an oscillator and applied to the LO input terminal 109. The RF signal input to the input terminal 407 of the FET 404 is the input matching circuit 4
After 06, it is modulated by the frequency component of the LO signal input to the gate, and the IF component appears at the gate terminal of the FET 401. The IF component input to the gate of FET 401 is FE
The signal is amplified by T401 and output from the output terminal 408 via the output circuit 405 connected to the drain.

Further, this circuit is a modulated wave of an intermediate frequency (hereinafter referred to as MOD) which is modulated by a modulation circuit in the transmission section.
When the RF is replaced by MOD and the IF is replaced by TX, the same operation is performed in the case of converting (denoted by) to a transmission frequency (hereinafter referred to as TX).

Next, an example of the configuration of the receiving circuit and the transmitting circuit in the conventional communication system in which the transmission frequency and the reception frequency are different will be described with reference to the drawings.

FIG. 5 shows a receiving circuit for performing frequency conversion in the receiving section and a transmitting circuit for performing frequency conversion in the transmitting section. In FIG. 5, the transmission circuit 204 is configured as follows. The frequency conversion circuit 503 has an MO
The MOD input terminal 504 is connected through the D matching circuit 501, the LO input terminal 109 is connected through the LO input matching circuit 103 to the same frequency conversion circuit 503, and the TX output through the TX output matching circuit 502. Terminal 5
05 is connected. Further, the TX output matching circuit also serves as the power supply of the frequency conversion circuit 503, and the power supply terminal 107
have.

On the other hand, the receiving circuit 205 has the same structure as the receiving circuit 204, except that the TX output matching circuit 502 is replaced with the IF output matching circuit 104 and the MOD matching circuit 501 is replaced with the RF input matching circuit 102. Although not shown in the figure, a power source, a power source stabilizing capacitor such as an electrolytic capacitor, and a bypass capacitor for high frequency grounding are attached to the power source terminal 107.

The receiving circuit 205 configured as described above,
The operation of the frequency conversion circuit of the transmission circuit 204 will be described below. Explaining the reception circuit 205, the LO signal input to the LO input terminal 109 is input to the frequency conversion circuit 503 via the LO matching circuit 103. The RF signal is input to the RF input terminal 108, and then input to the frequency conversion circuit 503 via the RF input matching circuit 102. The RF signal is converted into an IF frequency by the frequency conversion circuit 503, and is output from the IF output terminal 110 via the IF output matching circuit 104. Here, the conversion circuit of FIG. 4 described above may be used as the frequency conversion circuit. Next, the transmission circuit 204 will be described. The MOD signal is input to the MOD input terminal 504, and then input to the frequency conversion circuit 503 via the MOD matching circuit 501. LO signal is terminal 1
09 is input to the frequency conversion circuit 503 via the LO matching circuit 103. The MOD signal is frequency-converted into TX in the frequency conversion circuit 503, and is output from the terminal 505 via the TX output matching circuit 502.

Next, a communication method for transmitting and receiving at the same frequency by time division, which is a method different from the above-described method of using different frequencies for transmission and reception, will be described with reference to FIG.

FIG. 6 shows a time chart when transmission and reception are repeated by time division. Reception is performed between A and transmission is performed between B. The receiving circuit of FIG. 5 is turned on between A and OF between B.
F, and conversely, by turning off the transmission circuit between A and turning on between B, time division transmission / reception is performed. At this time, MOD and IF, and TX and RF have the same frequency. In this way, transmission / reception is performed at the same frequency by turning on / off the transmission circuit and the reception circuit at a predetermined interval.

[0015]

However, in the case of the communication system using the same frequency, the power source 107 shown in FIG.
Since the circuit is switched by turning off and on, the capacitors for stabilizing the power supply and the capacitors for high frequency grounding attached to the respective power supply lines must be charged and discharged, which is inefficient. Further, there is a problem that high-speed switching cannot be performed because the capacitor charging / discharging time is required.

Further, since it has the same structure as the conventional method of simultaneously operating transmission and reception at different frequencies, the advantage that the frequencies of MOD and IF, TX and RF of digital and time division multiplexing systems are the same can be fully obtained. It had a problem that it was not utilized.

In view of the above problems, the present invention makes it possible to rapidly turn on / off the transmission / reception circuit in a communication system using the same frequency.
Provided is a frequency conversion circuit in which a matching circuit is simplified by using a circuit capable of performing FF, a transmission circuit, and a reception circuit in the same circuit.

[0018]

In order to solve the above problems, the frequency conversion circuit of the present invention comprises a dual gate FET circuit in which the source is grounded in a high frequency manner, and the second gate is turned ON / OFF for the circuit operation. By controlling the above, it is possible to perform the above high-speed switching, and the output of the transmission circuit is connected to the input terminal of the reception circuit of the same circuit configuration, and the output of the reception circuit is connected to the output of the transmission circuit. The above object is achieved by connecting to an input terminal and inputting a local oscillation signal to a transmission circuit and a reception circuit via a switch.

[0019]

According to the present invention, the circuit is turned on and off by using the second gate of the dual gate FET according to the above-mentioned structure, thereby turning on and off the capacitor attached to the power source as in the case of using the conventional power source. There is no need, and the switching speed can be dramatically increased.

Furthermore, the matching circuit, which has been conventionally required for each of the transmission circuit and the reception circuit, can be shared by the configuration in which the above-mentioned transmission circuit and reception circuit are combined. In this way, the switching speed can be improved, the circuit can be simplified, and the size and cost can be reduced.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A frequency conversion circuit according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a frequency conversion circuit according to an embodiment of the present invention. In FIG. 1, the RF input terminal 108 is connected to the drain of the FET 101 that performs frequency conversion through the RF input matching circuit 102. Further, the LO input terminal 103 is connected to the gate of the FET 101.
The LO input terminal 109 is connected through. FE
T105 is a dual gate FET that amplifies the IF frequency
A bypass capacitor 112 is connected to the source of the same FET 105 in order to ground at high frequency, and a source bias 111 is connected to the same source side in order to adjust the operating current of the FET 105. The IF output matching circuit 104 is connected to the drain of the FET 105.
An output terminal 110 is connected through the output terminal 110, and the same output matching circuit 104 has a power supply terminal 107 for operating the FET 401. The source of the FET 101 and the second gate terminal of the FET 105 are connected.

The second gate of the FET 105 is connected to the switching terminal 106. The point of the configuration of this embodiment is that a dual gate FET is used for the FET 105 that amplifies the IF frequency.

The operation of the frequency conversion circuit configured as described above will be described below with reference to FIG.

The threshold of the FET 105 is -1V.
When a voltage lower than the threshold voltage of the second gate terminal 106 of the FET 105, -1.2 V in this case, is applied, the FET becomes inoperative by pinching off, and the entire circuit also becomes inoperative. In this way, the circuit is put into a sleep state, but the power consumed by the circuit at this time is almost zero because the FET 105 is pinched off. On the other hand, when operating, it is sufficient to apply a sufficiently positive voltage to the pinch-off voltage. In this case, if the second gate terminal 106 is set to 0V, the circuit operates in the same manner as the conventional circuit shown in FIG. To do. As described above, according to the present embodiment, by providing the second gate of the dual-gate FET, the control voltage is applied to the second gate to achieve the circuit operation
It can be turned on and off, and in the conventional circuit shown in FIG. 4, the power supply connected to the power supply terminal 107 is turned on and off.

A second embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram of a frequency conversion circuit showing a second embodiment of the present invention.

In the figure, the receiving circuit 204 and the transmitting circuit 205 have exactly the same configuration as the FET of FIG. 1, and the IF output matching circuit 104, the LO input matching circuit, and R of FIG.
It is configured without the F input matching circuit. Transmission circuit 2
The output of 04 is connected to the IF output and MOD input terminal 210 through an IF and MOD matching circuit, and the same output is connected to the input of the transmission circuit 205 through a capacitor 208. Similarly, the output of the transmission circuit 205 is connected to the RF input / TX output terminal 209 through the RF / TX matching circuit. The output of the same transmitting circuit 205 is connected to the input of the receiving circuit 204 through the capacitor 208. The IF / MOD matching circuit also serves as the power source of the receiving circuit 204 and has a power source terminal 107. Similarly, the RF / TX matching circuit 201 is the transmitter circuit 20.
5 also serves as a power source and has a power source terminal 107.
The LO signal passes through the LO input selector switch 202 and is applied to the receiving circuit 204 and the transmitting circuit 205 by the F corresponding to the gate terminal of the FET 101 that performs the frequency conversion of FIG.
It is input to the gate terminal of ET. The point of the configuration of this embodiment is that transmission and reception can be performed, and the matching circuit for transmission and reception also serves as the matching circuit for reception.

The operation of the transmission / reception circuit configured as described above will be described below. The configurations of the reception circuit 204 and the transmission circuit 205 are the same as the configurations of the frequency conversion circuit described in the first embodiment. First, the operation state during reception will be described. The RF signal input to the RF input terminal 209 is input to the receiving circuit 204 via the matching circuit 201 and the DC cutting capacitor 208, and is frequency-converted by the LO signal input to the receiving circuit side by the LO input changeover switch. , IF matching circuit 203, and output from terminal 210. Since the operation in the receiving circuit 204 has been described in the first embodiment, it will be omitted. In such a state where the receiving circuit 204 is operating, the transmitting circuit is in the OFF state because a negative voltage is applied to the switching control terminal 207. As a result, in the reception state, only the reception circuit 204 operates and the transmission circuit 205 does not operate. Similarly, when the transmission circuit 205 is operating, the reception circuit is turned off by the negative voltage applied to the switching control terminal 206,
The LO input signal is input to the transmission circuit by the LO input changeover switch 202, and only the transmission circuit 205 is operating. In this way, the changeover switch 20
The transmission / reception circuit is operated by using 6, 207 and LO input changeover switches. In addition, since the matching circuit is shared by coupling the RF input and TX output, and the IF output and MOD input, and the ON / OFF control is performed by the second gate, the operation is switched without significantly changing the output impedance. Can be done. As a result, the matching circuit can be easily designed. As described above, according to the present embodiment, by sharing the input / output terminals of the transmission / reception circuit, the matching circuit of RF and TX, and IF and MOD can be shared.

A third embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram of a frequency conversion circuit showing a third embodiment of the present invention.

In the figure, 301 is a dual gate F
This is an LO input changeover switch using ET, which is the LO input changeover switch 202 of FIG. 2 described in the second embodiment.
Is equivalent to The other configuration of FIG. 3 is the same as that of FIG. 2, and the same numbers are given. The changeover switch 301 is composed of dual gate FET amplifiers 302 and 303, and the L0 input is connected to the first gates of the dual gate FET amplifiers 302 and 303 through the LO input matching circuit 202. The second gate of the dual gate amplifier 302 is connected to the switching terminal 206, and the second gate of the dual gate FET amplifier 303 is connected to the switching terminal 207.

The operation of this circuit is the same as that of the second embodiment, and shows a circuit that realizes the LO input changeover switch 202 in the second embodiment. The LO input changeover switch 202 of FIG. It is replaced by the LO input changeover switch 301. The operation of the LO changeover switch 301 will be briefly described below.

The LO changeover switch 301 is the receiving circuit 2
A dual gate FET amplifier 302 for 04 and a dual gate FET amplifier 303 for transmitting circuit, and a second gate of the dual gate FET amplifier 302 for receiving circuit 204.
The gate is connected to the control terminal of the reception circuit 204, and the second gate of the dual gate FET amplifier 303 for the transmission circuit 205 is connected to the control terminal of the transmission circuit 205.
By applying a negative voltage to 06 and 207, the circuits of the dual gate FET amplifier 302 for the receiving circuit 204 and the dual gate FET amplifier 303 for the transmitting circuit are turned off.
It turns off N and becomes a switch. In this way, the role of the LO changeover switch of the second embodiment can be easily fulfilled.

In the first, second and third embodiments,
It goes without saying that the circuit can be further miniaturized by integrating the circuit on the semiconductor substrate.

[0034]

As described above, the present invention comprises a dual gate FET circuit in which the source is grounded in high frequency, and the circuit is turned on and off using the second gate of the dual gate FET.
By performing FF, it is not necessary to turn on and off the capacitor attached to the power source as in the case of using the conventional power source, and the switching speed can be dramatically increased. In addition, the output of the transmitter circuit is connected to the input terminal of the receiver circuit of the same circuit configuration, the output of the receiver circuit is connected to the input terminal of the transmitter circuit, and the local oscillation signal is input to the transmitter circuit and receiver circuit via the switch. It is possible to share the matching circuit which is conventionally required for each of the transmitting circuit and the receiving circuit. In this way, the switching speed can be improved, the circuit can be simplified, and the size and cost can be reduced. Further, by integrating these circuits on a semiconductor substrate, further miniaturization and cost reduction can be achieved, and its industrial value is great.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a frequency conversion circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a frequency conversion circuit according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a frequency conversion circuit according to a third embodiment of the present invention.

FIG. 4 is a block diagram of a conventional frequency conversion circuit.

FIG. 5 is a configuration diagram of a conventional transmission / reception circuit.

FIG. 6 is a time chart showing the operation of a conventional time division / transmission / reception circuit.

[Explanation of symbols]

 101 FET for performing frequency / frequency conversion 102 RF input matching circuit 103 LO input matching circuit 104 IF output matching circuit 105 Dual gate FET 106 for increasing IF frequency Second gate terminal 107 for inputting switching signal 107 Power supply terminal 108 RF input terminal 109 LO Input terminal 110 IF output terminal 111 Bias resistor 112 Source capacitor for high frequency ground 201 RF, TX matching circuit 202 LO input changeover switch 203 IF, MOD matching circuit 204 Reception circuit 205 Transmission circuit 206, 207 Transmission / reception switching control signal terminal 208 DC cut capacitor 209 RF input and TX output terminal 210 IF output, MOD input terminal 301 LO input selector switch 302 Dual gate FET amplifier for receiving circuit 204 303 Dual gate FET amplifier for transmitter circuit 401 FET with source grounded at high frequency 402 Bypass capacitor 403 Source bias resistor 404 FET for frequency conversion 405 Output matching circuit 406 Input matching circuit 407 Input terminal 408 Output terminal 501 MOD matching circuit 502 TX Output matching circuit 503 Frequency conversion circuit 504 MOD input terminal 505 Output terminal

Claims (3)

[Claims] 1. A FET circuit in which a received signal is input to a drain via a first matching circuit and a local oscillation signal is input to a gate via a second matching circuit, and a source is grounded at a high frequency,
A dual gate FET circuit in which the source output of the FET circuit is input to a first gate, and the operation of the dual gate FET is controlled by turning on and off the second gate of the dual gate FET. Frequency conversion circuit. 2. The output terminal of the first frequency conversion circuit according to claim 1 is connected to the input terminal of the same second frequency conversion circuit, and the second output terminal is the input terminal of the first frequency conversion circuit. A transmission / reception frequency, comprising a FET circuit connected to the FET, and inputting a local oscillation signal to the gate of the FET through the switch, the first frequency conversion circuit, and the second matching circuit of the second frequency conversion circuit. Conversion circuit. 3. A dual local oscillation signal switch in which a first gate is connected to a matching circuit in common, a source is grounded at a high frequency, and a second gate is connected to a second gate of a transmission / reception circuit. 3. The transmission / reception frequency conversion circuit according to claim 2, which is replaced with a gate FET circuit.