MX383432B - Distribución de múltiples subprocesos en una computadora. - Google Patents
Distribución de múltiples subprocesos en una computadora.Info
- Publication number
- MX383432B MX383432B MX2016012528A MX2016012528A MX383432B MX 383432 B MX383432 B MX 383432B MX 2016012528 A MX2016012528 A MX 2016012528A MX 2016012528 A MX2016012528 A MX 2016012528A MX 383432 B MX383432 B MX 383432B
- Authority
- MX
- Mexico
- Prior art keywords
- threads
- machine
- mode
- core
- guest
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/3009—Thread control instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
- G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
- G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Stored Programmes (AREA)
Abstract
De acuerdo con un aspecto, un sistema de computadora incluye una configuración con una máquina habilitada para operar en un modo de subprocesamiento individual (ST) y un modo de subprocesamiento múltiple (MT). Además, la máquina incluye subprocesos físicos. La máquina se configura para llevar a cabo un método que incluye emitir una instrucción de inicio de ejecución virtual (inicio de VE) para distribuir una entidad invitada que tiene múltiples subprocesos lógicos en el núcleo. La entidad invitada incluye toda o una parte de una máquina virtual (VM) invitada, y la emisión se lleva a cabo por un anfitrión que se ejecuta en uno de los subprocesos físicos en el núcleo en el modo ST. La ejecución de la instrucción de inicio de VE por la máquina incluye mapear cada uno de los subprocesos lógicos a uno correspondiente de los subprocesos físicos, inicializar cada uno de los subprocesos físicos mapeados con un estado del subproceso lógico correspondiente, e iniciar la ejecución de la entidad invitada en el núcleo en el modo MT.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/226,955 US9195493B2 (en) | 2014-03-27 | 2014-03-27 | Dispatching multiple threads in a computer |
| PCT/EP2015/055942 WO2015144585A1 (en) | 2014-03-27 | 2015-03-20 | Dispatching multiple threads in a computer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2016012528A MX2016012528A (es) | 2016-12-20 |
| MX383432B true MX383432B (es) | 2025-03-14 |
Family
ID=52727125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2016012528A MX383432B (es) | 2014-03-27 | 2015-03-20 | Distribución de múltiples subprocesos en una computadora. |
Country Status (15)
| Country | Link |
|---|---|
| US (1) | US9195493B2 (es) |
| EP (1) | EP3123319A1 (es) |
| JP (1) | JP6501791B2 (es) |
| KR (1) | KR101843676B1 (es) |
| CN (1) | CN106170768B (es) |
| AU (1) | AU2015238517B2 (es) |
| BR (1) | BR112016022282B1 (es) |
| CA (1) | CA2940923C (es) |
| IL (1) | IL247889B (es) |
| MX (1) | MX383432B (es) |
| RU (1) | RU2666249C2 (es) |
| SG (1) | SG11201606090RA (es) |
| TW (1) | TWI617986B (es) |
| WO (1) | WO2015144585A1 (es) |
| ZA (1) | ZA201606254B (es) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9223574B2 (en) * | 2014-03-27 | 2015-12-29 | International Business Machines Corporation | Start virtual execution instruction for dispatching multiple threads in a computer |
| US9213569B2 (en) * | 2014-03-27 | 2015-12-15 | International Business Machines Corporation | Exiting multiple threads in a computer |
| US10198298B2 (en) * | 2015-09-16 | 2019-02-05 | Salesforce.Com, Inc. | Handling multiple task sequences in a stream processing framework |
| US10146592B2 (en) | 2015-09-18 | 2018-12-04 | Salesforce.Com, Inc. | Managing resource allocation in a stream processing framework |
| US10437635B2 (en) | 2016-02-10 | 2019-10-08 | Salesforce.Com, Inc. | Throttling events in entity lifecycle management |
| US12248560B2 (en) | 2016-03-07 | 2025-03-11 | Crowdstrike, Inc. | Hypervisor-based redirection of system calls and interrupt-based task offloading |
| US12339979B2 (en) * | 2016-03-07 | 2025-06-24 | Crowdstrike, Inc. | Hypervisor-based interception of memory and register accesses |
| US9977677B2 (en) | 2016-04-07 | 2018-05-22 | International Business Machines Corporation | Execution slice with supplemental instruction port for an instruction using a source operand from another instruction port |
| CN105871917A (zh) * | 2016-06-08 | 2016-08-17 | 北京金山安全管理系统技术有限公司 | 传输控制协议tcp连接调度的方法及装置 |
| US10372498B2 (en) * | 2016-09-26 | 2019-08-06 | Intel Corporation | Dynamic virtual CPU core allocation |
| US10771554B2 (en) * | 2017-09-30 | 2020-09-08 | Intel Corporation | Cloud scaling with non-blocking non-spinning cross-domain event synchronization and data communication |
| GB2574049B (en) * | 2018-05-24 | 2020-10-07 | Advanced Risc Mach Ltd | Interrupt controller |
Family Cites Families (58)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4456954A (en) | 1981-06-15 | 1984-06-26 | International Business Machines Corporation | Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations |
| WO1985000453A1 (en) | 1983-07-11 | 1985-01-31 | Prime Computer, Inc. | Data processing system |
| CA1213986A (en) | 1983-12-14 | 1986-11-12 | Thomas O. Curlee, Iii | Selective guest system purge control |
| US4779188A (en) | 1983-12-14 | 1988-10-18 | International Business Machines Corporation | Selective guest system purge control |
| US4792895A (en) | 1984-07-30 | 1988-12-20 | International Business Machines Corp. | Instruction processing in higher level virtual machines by a real machine |
| JPH0658650B2 (ja) | 1986-03-14 | 1994-08-03 | 株式会社日立製作所 | 仮想計算機システム |
| JPS6474632A (en) * | 1987-09-16 | 1989-03-20 | Fujitsu Ltd | Control transfer system for virtual computer |
| US5317754A (en) | 1990-10-23 | 1994-05-31 | International Business Machines Corporation | Method and apparatus for enabling an interpretive execution subset |
| US5437033A (en) * | 1990-11-16 | 1995-07-25 | Hitachi, Ltd. | System for recovery from a virtual machine monitor failure with a continuous guest dispatched to a nonguest mode |
| EP0619898A4 (en) | 1992-01-02 | 1995-05-03 | Amdahl Corp | COMPUTER SYSTEM WITH TWO GAS SHIFTS. |
| US5485626A (en) | 1992-11-03 | 1996-01-16 | International Business Machines Corporation | Architectural enhancements for parallel computer systems utilizing encapsulation of queuing allowing small grain processing |
| US6453392B1 (en) | 1998-11-10 | 2002-09-17 | International Business Machines Corporation | Method of and apparatus for sharing dedicated devices between virtual machine guests |
| US6349365B1 (en) | 1999-10-08 | 2002-02-19 | Advanced Micro Devices, Inc. | User-prioritized cache replacement |
| JP2004506262A (ja) | 2000-08-04 | 2004-02-26 | イントリンジック グラフィックス, インコーポレイテッド | グラフィックハードウェアおよびソフトウェアの開発 |
| EP1182567B1 (en) | 2000-08-21 | 2012-03-07 | Texas Instruments France | Software controlled cache configuration |
| EP1267572A2 (en) * | 2001-06-11 | 2002-12-18 | Canal+ Technologies Société Anonyme | Improvements in the field of programme delivery |
| US20040128448A1 (en) | 2002-12-31 | 2004-07-01 | Intel Corporation | Apparatus for memory communication during runahead execution |
| US7155600B2 (en) | 2003-04-24 | 2006-12-26 | International Business Machines Corporation | Method and logical apparatus for switching between single-threaded and multi-threaded execution states in a simultaneous multi-threaded (SMT) processor |
| US7496915B2 (en) * | 2003-04-24 | 2009-02-24 | International Business Machines Corporation | Dynamic switching of multithreaded processor between single threaded and simultaneous multithreaded modes |
| US7130949B2 (en) * | 2003-05-12 | 2006-10-31 | International Business Machines Corporation | Managing input/output interruptions in non-dedicated interruption hardware environments |
| US7530067B2 (en) | 2003-05-12 | 2009-05-05 | International Business Machines Corporation | Filtering processor requests based on identifiers |
| US7849297B2 (en) | 2003-08-28 | 2010-12-07 | Mips Technologies, Inc. | Software emulation of directed exceptions in a multithreading processor |
| US7424599B2 (en) | 2003-08-28 | 2008-09-09 | Mips Technologies, Inc. | Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessor |
| US7493621B2 (en) | 2003-12-18 | 2009-02-17 | International Business Machines Corporation | Context switch data prefetching in multithreaded computer |
| US7526421B2 (en) | 2004-02-27 | 2009-04-28 | International Business Machines Corporation | System and method for modeling LPAR behaviors in a simulation tool |
| US7873776B2 (en) | 2004-06-30 | 2011-01-18 | Oracle America, Inc. | Multiple-core processor with support for multiple virtual processors |
| US8271976B2 (en) | 2004-06-30 | 2012-09-18 | Microsoft Corporation | Systems and methods for initializing multiple virtual processors within a single virtual machine |
| GB0420442D0 (en) * | 2004-09-14 | 2004-10-20 | Ignios Ltd | Debug in a multicore architecture |
| US8356143B1 (en) | 2004-10-22 | 2013-01-15 | NVIDIA Corporatin | Prefetch mechanism for bus master memory access |
| WO2009076324A2 (en) * | 2007-12-10 | 2009-06-18 | Strandera Corporation | Strand-based computing hardware and dynamically optimizing strandware for a high performance microprocessor system |
| CN1828544B (zh) * | 2005-03-02 | 2013-01-02 | 英特尔公司 | 利用同步开销以改善多线程性能的机制 |
| US20060242389A1 (en) | 2005-04-21 | 2006-10-26 | International Business Machines Corporation | Job level control of simultaneous multi-threading functionality in a processor |
| US7493436B2 (en) * | 2006-10-26 | 2009-02-17 | International Business Machines Corporation | Interrupt handling using simultaneous multi-threading |
| US7698540B2 (en) | 2006-10-31 | 2010-04-13 | Hewlett-Packard Development Company, L.P. | Dynamic hardware multithreading and partitioned hardware multithreading |
| US8621459B2 (en) | 2006-12-22 | 2013-12-31 | Intel Corporation | Method and apparatus for multithreaded guest operating system execution through a multithreaded host virtual machine monitor |
| US8286170B2 (en) | 2007-01-31 | 2012-10-09 | International Business Machines Corporation | System and method for processor thread allocation using delay-costs |
| JP5595633B2 (ja) | 2007-02-26 | 2014-09-24 | スパンション エルエルシー | シミュレーション方法及びシミュレーション装置 |
| US9164784B2 (en) | 2007-10-12 | 2015-10-20 | International Business Machines Corporation | Signalizing an external event using a dedicated virtual central processing unit |
| US7739434B2 (en) | 2008-01-11 | 2010-06-15 | International Business Machines Corporation | Performing a configuration virtual topology change and instruction therefore |
| WO2009101563A1 (en) | 2008-02-11 | 2009-08-20 | Nxp B.V. | Multiprocessing implementing a plurality of virtual processors |
| US8086811B2 (en) | 2008-02-25 | 2011-12-27 | International Business Machines Corporation | Optimizations of a perform frame management function issued by pageable guests |
| US8010822B2 (en) * | 2008-03-28 | 2011-08-30 | Microsoft Corporation | Power-aware thread scheduling and dynamic use of processors |
| US9250973B2 (en) | 2009-03-12 | 2016-02-02 | Polycore Software, Inc. | Apparatus and associated methodology of generating a multi-core communications topology |
| FR2950714B1 (fr) | 2009-09-25 | 2011-11-18 | Bull Sas | Systeme et procede de gestion de l'execution entrelacee de fils d'instructions |
| US8650554B2 (en) | 2010-04-27 | 2014-02-11 | International Business Machines Corporation | Single thread performance in an in-order multi-threaded processor |
| US8589922B2 (en) | 2010-10-08 | 2013-11-19 | International Business Machines Corporation | Performance monitor design for counting events generated by thread groups |
| CN102193779A (zh) | 2011-05-16 | 2011-09-21 | 武汉科技大学 | 一种面向MPSoC的多线程调度方法 |
| US8856452B2 (en) | 2011-05-31 | 2014-10-07 | Illinois Institute Of Technology | Timing-aware data prefetching for microprocessors |
| US8990830B2 (en) | 2011-07-19 | 2015-03-24 | International Business Machines Corporation | Thread management in parallel processes |
| US8752036B2 (en) | 2011-10-31 | 2014-06-10 | Oracle International Corporation | Throughput-aware software pipelining for highly multi-threaded systems |
| US8850450B2 (en) | 2012-01-18 | 2014-09-30 | International Business Machines Corporation | Warning track interruption facility |
| US9110878B2 (en) | 2012-01-18 | 2015-08-18 | International Business Machines Corporation | Use of a warning track interruption facility by a program |
| US8930950B2 (en) | 2012-01-19 | 2015-01-06 | International Business Machines Corporation | Management of migrating threads within a computing environment to transform multiple threading mode processors to single thread mode processors |
| US9032191B2 (en) | 2012-01-23 | 2015-05-12 | International Business Machines Corporation | Virtualization support for branch prediction logic enable / disable at hypervisor and guest operating system levels |
| JP5813554B2 (ja) * | 2012-03-30 | 2015-11-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US8682877B2 (en) * | 2012-06-15 | 2014-03-25 | International Business Machines Corporation | Constrained transaction execution |
| CN102866957B (zh) | 2012-07-31 | 2014-07-30 | 中国人民解放军国防科学技术大学 | 面向多核多线程微处理器的虚拟活跃页缓冲方法及装置 |
| JP6074955B2 (ja) | 2012-08-31 | 2017-02-08 | 富士通株式会社 | 情報処理装置および制御方法 |
-
2014
- 2014-03-27 US US14/226,955 patent/US9195493B2/en active Active
-
2015
- 2015-03-20 MX MX2016012528A patent/MX383432B/es unknown
- 2015-03-20 SG SG11201606090RA patent/SG11201606090RA/en unknown
- 2015-03-20 AU AU2015238517A patent/AU2015238517B2/en active Active
- 2015-03-20 CN CN201580015801.8A patent/CN106170768B/zh active Active
- 2015-03-20 KR KR1020167026255A patent/KR101843676B1/ko active Active
- 2015-03-20 WO PCT/EP2015/055942 patent/WO2015144585A1/en not_active Ceased
- 2015-03-20 EP EP15711733.4A patent/EP3123319A1/en not_active Withdrawn
- 2015-03-20 RU RU2016127435A patent/RU2666249C2/ru active
- 2015-03-20 BR BR112016022282-2A patent/BR112016022282B1/pt active IP Right Grant
- 2015-03-20 JP JP2016558798A patent/JP6501791B2/ja active Active
- 2015-03-20 CA CA2940923A patent/CA2940923C/en active Active
- 2015-03-25 TW TW104109600A patent/TWI617986B/zh active
-
2016
- 2016-09-09 ZA ZA2016/06254A patent/ZA201606254B/en unknown
- 2016-09-18 IL IL24788916A patent/IL247889B/en active IP Right Grant
Also Published As
| Publication number | Publication date |
|---|---|
| TWI617986B (zh) | 2018-03-11 |
| BR112016022282B1 (pt) | 2022-12-06 |
| CN106170768B (zh) | 2020-01-03 |
| CA2940923A1 (en) | 2015-10-01 |
| BR112016022282A2 (es) | 2017-08-15 |
| CA2940923C (en) | 2025-06-17 |
| RU2016127435A3 (es) | 2018-04-28 |
| TW201610854A (zh) | 2016-03-16 |
| CN106170768A (zh) | 2016-11-30 |
| JP6501791B2 (ja) | 2019-04-17 |
| IL247889A0 (en) | 2016-11-30 |
| US9195493B2 (en) | 2015-11-24 |
| MX2016012528A (es) | 2016-12-20 |
| EP3123319A1 (en) | 2017-02-01 |
| ZA201606254B (en) | 2017-08-30 |
| RU2016127435A (ru) | 2018-04-28 |
| SG11201606090RA (en) | 2016-08-30 |
| IL247889B (en) | 2019-10-31 |
| KR20160124887A (ko) | 2016-10-28 |
| JP2017513128A (ja) | 2017-05-25 |
| AU2015238517B2 (en) | 2018-02-22 |
| US20150277946A1 (en) | 2015-10-01 |
| AU2015238517A1 (en) | 2016-08-11 |
| WO2015144585A1 (en) | 2015-10-01 |
| RU2666249C2 (ru) | 2018-09-06 |
| KR101843676B1 (ko) | 2018-05-14 |
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