MX2017009413A - Sistemas y metodos para conmutación asincrona de linea de datos i2c. - Google Patents

Sistemas y metodos para conmutación asincrona de linea de datos i2c.

Info

Publication number
MX2017009413A
MX2017009413A MX2017009413A MX2017009413A MX2017009413A MX 2017009413 A MX2017009413 A MX 2017009413A MX 2017009413 A MX2017009413 A MX 2017009413A MX 2017009413 A MX2017009413 A MX 2017009413A MX 2017009413 A MX2017009413 A MX 2017009413A
Authority
MX
Mexico
Prior art keywords
systems
methods
toggling
asynchronous
pin
Prior art date
Application number
MX2017009413A
Other languages
English (en)
Inventor
J Ahne Adam
Original Assignee
Lexmark Int Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lexmark Int Inc filed Critical Lexmark Int Inc
Publication of MX2017009413A publication Critical patent/MX2017009413A/es

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Power Sources (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Information Transfer Systems (AREA)

Abstract

Se describe un método de operación de un dispositivo esclavo de comunicación en serie de circuitos inter-integrados (I2C) que tiene un pin de reloj I2C y un pin de datos I2C. El método incluye (a) recibir un comando a través del pin de reloj I2C y el pin de datos I2C, (b) polarizar el pin de datos I2C a un nivel lógico bajo durante una primera duración, (c) no polarizar el pin de datos I2C a un nivel lógico bajo durante una segunda duración, y (d) alternar de forma repetitiva (b) y (c) hasta que se presente un evento de terminación. (b) y (c) no se sincronizan con transiciones del pin de reloj I2C. Se describen otros métodos y sistemas.
MX2017009413A 2015-06-03 2016-05-25 Sistemas y metodos para conmutación asincrona de linea de datos i2c. MX2017009413A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/729,858 US10067895B2 (en) 2015-06-03 2015-06-03 Systems and methods for asynchronous toggling of I2C data line
PCT/US2016/034087 WO2016196118A1 (en) 2015-06-03 2016-05-25 Systems and methods for asynchronous toggling of i2c data line

Publications (1)

Publication Number Publication Date
MX2017009413A true MX2017009413A (es) 2017-10-12

Family

ID=57441650

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2017009413A MX2017009413A (es) 2015-06-03 2016-05-25 Sistemas y metodos para conmutación asincrona de linea de datos i2c.

Country Status (8)

Country Link
US (1) US10067895B2 (es)
EP (1) EP3304381B1 (es)
CN (1) CN107209811B (es)
AU (1) AU2016270514A1 (es)
BR (1) BR112017015928A2 (es)
CA (1) CA2974734A1 (es)
MX (1) MX2017009413A (es)
WO (1) WO2016196118A1 (es)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10894423B2 (en) 2018-12-03 2021-01-19 Hewlett-Packard Development Company, L.P. Logic circuitry
CA3121147C (en) 2018-12-03 2023-08-22 Hewlett-Packard Development Company, L.P. Logic circuitry
CA3121183A1 (en) 2018-12-03 2020-06-11 Hewlett-Packard Development Company, L.P. Logic circuitry
EP3688643A1 (en) 2018-12-03 2020-08-05 Hewlett-Packard Development Company, L.P. Logic circuitry package
PT3767480T (pt) 2018-12-03 2022-05-02 Hewlett Packard Development Co Circuitos lógicos
EP4235494A3 (en) 2018-12-03 2023-09-20 Hewlett-Packard Development Company, L.P. Logic circuitry
CN113165391A (zh) 2018-12-03 2021-07-23 惠普发展公司,有限责任合伙企业 逻辑电路
US11338586B2 (en) 2018-12-03 2022-05-24 Hewlett-Packard Development Company, L.P. Logic circuitry
CN113168458A (zh) 2018-12-03 2021-07-23 惠普发展公司,有限责任合伙企业 逻辑电路系统
CN113168443A (zh) 2018-12-03 2021-07-23 惠普发展公司,有限责任合伙企业 逻辑电路系统
EP3681723B1 (en) 2018-12-03 2021-07-28 Hewlett-Packard Development Company, L.P. Logic circuitry
US11829319B2 (en) 2019-05-31 2023-11-28 Ams International Ag Inter-integrated circuit (I2C) apparatus
US11662846B2 (en) * 2019-09-26 2023-05-30 Chongqing Boe Optoelectronics Technology Co., Ltd. Touch circuit and driving method thereof, and driving system for a touch display device
US11407229B2 (en) 2019-10-25 2022-08-09 Hewlett-Packard Development Company, L.P. Logic circuitry package

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
US4689740A (en) 1980-10-31 1987-08-25 U.S. Philips Corporation Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations
US7788431B2 (en) 2005-04-29 2010-08-31 Nxp B.V. Dynamic I2C slave device address decoder
CN1845211A (zh) * 2006-05-17 2006-10-11 上海工程技术大学 一种pic单片机实验系统
US20130019039A1 (en) 2011-06-10 2013-01-17 Intersil Americas LLC System and method for operating a one-wire protocol slave in a two-wire protocol bus environment
US9037766B2 (en) 2011-11-18 2015-05-19 Fairchild Semiconductor Corporation Pin selectable I2C slave addresses
US8855962B2 (en) * 2012-02-22 2014-10-07 Freescale Semiconductor, Inc. System for testing electronic circuits
US9710419B2 (en) * 2012-05-31 2017-07-18 Sonova Ag System and method for master-slave data transmission based on a flexible serial bus for use in hearing devices
US8832343B2 (en) 2012-07-17 2014-09-09 International Business Machines Corporation Double density I2C system
US9336167B2 (en) 2012-12-13 2016-05-10 Texas Instruments Incorporated I2C controller register, control, command and R/W buffer queue logic
US20150100713A1 (en) * 2013-10-08 2015-04-09 Qualcomm Incorporated Coexistence of i2c slave devices and camera control interface extension devices on a shared control data bus
US9059906B1 (en) * 2013-12-03 2015-06-16 Barry John McCleland Data communication interface
US9298908B1 (en) * 2014-10-17 2016-03-29 Lexmark International, Inc. Methods and apparatus for setting the address of a module using a voltage
US9213396B1 (en) * 2014-10-17 2015-12-15 Lexmark International, Inc. Methods and apparatus for setting the address of a module using a clock

Also Published As

Publication number Publication date
AU2016270514A1 (en) 2017-08-03
US20160357691A1 (en) 2016-12-08
EP3304381A1 (en) 2018-04-11
BR112017015928A2 (pt) 2018-03-27
US10067895B2 (en) 2018-09-04
EP3304381A4 (en) 2018-08-29
CN107209811A (zh) 2017-09-26
EP3304381B1 (en) 2019-07-17
CN107209811B (zh) 2021-10-12
CA2974734A1 (en) 2016-12-08
WO2016196118A1 (en) 2016-12-08

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