TW201612761A - Apparatus and method for compensating a misalignment on a synchronous data bus - Google Patents

Apparatus and method for compensating a misalignment on a synchronous data bus

Info

Publication number
TW201612761A
TW201612761A TW104144171A TW104144171A TW201612761A TW 201612761 A TW201612761 A TW 201612761A TW 104144171 A TW104144171 A TW 104144171A TW 104144171 A TW104144171 A TW 104144171A TW 201612761 A TW201612761 A TW 201612761A
Authority
TW
Taiwan
Prior art keywords
lag
synchronous
misalignment
compensating
control element
Prior art date
Application number
TW104144171A
Other languages
Chinese (zh)
Other versions
TWI569149B (en
Inventor
Vanessa S Canac
James R Lundberg
Original Assignee
Via Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/747,140 external-priority patent/US8886855B2/en
Priority claimed from US13/747,187 external-priority patent/US9319035B2/en
Priority claimed from US13/747,038 external-priority patent/US9552320B2/en
Application filed by Via Tech Inc filed Critical Via Tech Inc
Publication of TW201612761A publication Critical patent/TW201612761A/en
Application granted granted Critical
Publication of TWI569149B publication Critical patent/TWI569149B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The present invention provides an apparatus for compensating misalignment on a synchronous bus including a bit lag control element and a synchronous lag receiver. The bit lag control element measures a propagation time beginning with assertion of a synchronization strobe and ending with assertion of a first one of a plurality of strobes corresponding to the synchronization strobe, and generates a lag bus signal on a lag bus that indicates the propagation time. The synchronous lag receiver is coupled to the bit lag control element and receives the first one of the plurality of strobes and a data bit signal, and delays registering of the data bit signal by the propagation time.
TW104144171A 2013-01-22 2013-11-26 Apparatus and method for compensating a misalignment on a synchronous data bus TWI569149B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/747,140 US8886855B2 (en) 2013-01-22 2013-01-22 Apparatus and method for dynamic alignment of source synchronous bus signals
US13/747,187 US9319035B2 (en) 2013-01-22 2013-01-22 Source synchronous bus signal alignment compensation mechanism
US13/747,038 US9552320B2 (en) 2013-01-22 2013-01-22 Source synchronous data strobe misalignment compensation mechanism

Publications (2)

Publication Number Publication Date
TW201612761A true TW201612761A (en) 2016-04-01
TWI569149B TWI569149B (en) 2017-02-01

Family

ID=50315835

Family Applications (2)

Application Number Title Priority Date Filing Date
TW102142942A TWI522809B (en) 2013-01-22 2013-11-26 Apparatus and method for compensating a misalignment on a synchronous data bus
TW104144171A TWI569149B (en) 2013-01-22 2013-11-26 Apparatus and method for compensating a misalignment on a synchronous data bus

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW102142942A TWI522809B (en) 2013-01-22 2013-11-26 Apparatus and method for compensating a misalignment on a synchronous data bus

Country Status (2)

Country Link
CN (2) CN103678218B (en)
TW (2) TWI522809B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI748425B (en) * 2019-04-30 2021-12-01 大陸商上海微電子裝備（集團）股份有限公司 Synchronous drive equipment fault diagnosis system and its diagnosis method

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6372202B2 (en) 2014-07-07 2018-08-15 ソニー株式会社 Reception device, transmission device, and communication system
CN104375968B (en) 2014-12-03 2017-09-15 上海兆芯集成电路有限公司 Host side peripheral interface circuit
CN105227376B (en) * 2015-10-27 2018-03-30 上海斐讯数据通信技术有限公司 The method and system that timing prolongs in SPI long haul communications transmission
CN110457328B (en) * 2019-08-15 2022-02-25 中国银行股份有限公司 Parameter validation method and device

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Publication number Priority date Publication date Assignee Title
US5721841A (en) * 1994-11-04 1998-02-24 Texas Instruments Incorporated Adapter having data aligner including register being loaded to or from memory with an offset in accordance with predetermined network fragmentation parameters
TW345636B (en) * 1996-04-23 1998-11-21 Toshiba Co Ltd Time information synchronous delay control circuit
US5999032A (en) * 1998-03-05 1999-12-07 Etron Technology, Inc. Multiple phase synchronous race delay clock distribution circuit with skew compensation
US6892314B2 (en) * 2001-04-02 2005-05-10 International Business Machines Corporation Method and system of automatic delay detection and receiver adjustment for synchronous bus interface
US7590211B1 (en) * 2006-04-07 2009-09-15 Altera Corporation Programmable logic device integrated circuit with communications channels having sharing phase-locked-loop circuitry
US7881402B2 (en) * 2006-09-07 2011-02-01 Via Technologies, Inc. Compensation for gain imbalance, phase imbalance and DC offsets in a transmitter
US7900129B2 (en) * 2007-01-29 2011-03-01 Via Technologies, Inc. Encoded mechanism for source synchronous strobe lockout
US7543090B2 (en) * 2007-01-29 2009-06-02 Via Technologies, Inc. Double-pumped/quad-pumped variation mechanism for source synchronous strobe lockout
US8839018B2 (en) * 2011-06-21 2014-09-16 Via Technologies, Inc. Programmable mechanism for optimizing a synchronous data bus
US8782459B2 (en) * 2011-06-21 2014-07-15 Via Technologies, Inc. Apparatus and method for advanced synchronous strobe transmission

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI748425B (en) * 2019-04-30 2021-12-01 大陸商上海微電子裝備（集團）股份有限公司 Synchronous drive equipment fault diagnosis system and its diagnosis method

Also Published As

Publication number Publication date
TWI522809B (en) 2016-02-21
TW201430578A (en) 2014-08-01
CN103678218B (en) 2016-09-21
TWI569149B (en) 2017-02-01
CN106407142B (en) 2019-05-24
CN103678218A (en) 2014-03-26
CN106407142A (en) 2017-02-15

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