MX2012008070A - Unidad de interfaz de usuario para cargar unicamente regiones activas de un marco. - Google Patents

Unidad de interfaz de usuario para cargar unicamente regiones activas de un marco.

Info

Publication number
MX2012008070A
MX2012008070A MX2012008070A MX2012008070A MX2012008070A MX 2012008070 A MX2012008070 A MX 2012008070A MX 2012008070 A MX2012008070 A MX 2012008070A MX 2012008070 A MX2012008070 A MX 2012008070A MX 2012008070 A MX2012008070 A MX 2012008070A
Authority
MX
Mexico
Prior art keywords
pixels
active regions
user interface
interface unit
frames
Prior art date
Application number
MX2012008070A
Other languages
English (en)
Inventor
Joseph P Bratt
Shing Horng Choo
Peter F Holland
Timothy J Millet
Original Assignee
Apple Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Inc filed Critical Apple Inc
Publication of MX2012008070A publication Critical patent/MX2012008070A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/265—Mixing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/10—Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14—Display of multiple viewports
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397—Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Generation (AREA)
  • Image Processing (AREA)
  • Digital Computer Display Output (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

Una unidad de interfaz de usuario en un conducto de despliegue de gráficos puede incluir registradores programables con información que define regiones activas de un marco de una imagen. Los pixeles dentro de las regiones activas del marco de la imagen tienen la intención de desplegarse, mientras que los pixeles externos de las regiones activas del marco de la imagen no se van a desplegar. La circuitería de carga dentro de la unidad de interfaz del usuario puede cargar marcos de memoria, cargando únicamente los pixeles dentro de las regiones activas de los marcos de imagen como se define por el contenido programado de los registro. La unidad de interfaz de usuario puede posteriormente proporcionar los pixeles cargados a una unidad de mezcla para mezclar los pixeles cargados con pixeles de otros marcos o pixeles de una secuencia de video para producir marcos externos. Cuando se mezcla con pixeles de una secuencia video, los pixeles mezclados pueden desplegarse como gráficos cubiertos en la parte superior de la secuencia del video.
MX2012008070A 2010-01-11 2011-01-05 Unidad de interfaz de usuario para cargar unicamente regiones activas de un marco. MX2012008070A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/685,152 US8669993B2 (en) 2010-01-11 2010-01-11 User interface unit for fetching only active regions of a frame
PCT/US2011/020254 WO2011085024A1 (en) 2010-01-11 2011-01-05 User interface unit for fetching only active regions of a frame

Publications (1)

Publication Number Publication Date
MX2012008070A true MX2012008070A (es) 2012-07-30

Family

ID=43759877

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2012008070A MX2012008070A (es) 2010-01-11 2011-01-05 Unidad de interfaz de usuario para cargar unicamente regiones activas de un marco.

Country Status (12)

Country Link
US (1) US8669993B2 (es)
EP (1) EP2524297A1 (es)
JP (1) JP2013516664A (es)
KR (2) KR20140117692A (es)
CN (1) CN102763071A (es)
AU (1) AU2011203640B2 (es)
BR (1) BR112012017007A2 (es)
DE (1) DE112011100221T5 (es)
GB (1) GB2498416B (es)
HK (1) HK1181230A1 (es)
MX (1) MX2012008070A (es)
WO (1) WO2011085024A1 (es)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110242427A1 (en) * 2010-04-01 2011-10-06 Timothy Ramsdale Method and System for Providing 1080P Video With 32-Bit Mobile DDR Memory
US10353633B2 (en) 2013-12-19 2019-07-16 Sony Interactive Entertainment LLC Mass storage virtualization for cloud computing
US9497358B2 (en) 2013-12-19 2016-11-15 Sony Interactive Entertainment America Llc Video latency reduction
KR102246105B1 (ko) * 2014-09-25 2021-04-29 삼성전자주식회사 디스플레이 장치, 이의 제어 방법 및 이의 데이터 전송 방법
US10074203B2 (en) * 2014-12-23 2018-09-11 Synaptics Incorporated Overlay for display self refresh
US10484640B2 (en) 2015-06-03 2019-11-19 Intel Corporation Low power video composition using a stream out buffer
CN105260153B (zh) * 2015-10-15 2018-11-30 西安诺瓦电子科技有限公司 图像输出装置和图像输出方法
US20230196496A1 (en) * 2021-12-20 2023-06-22 Ati Technologies Ulc Method and apparatus for controlling image processing pipeline configuration data

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US639473A (en) * 1898-08-10 1899-12-19 Elmer E Ward Culinary steamer and boiler.
US6396473B1 (en) 1999-04-22 2002-05-28 Webtv Networks, Inc. Overlay graphics memory management method and apparatus
US6801203B1 (en) 1999-12-22 2004-10-05 Microsoft Corporation Efficient graphics pipeline with a pixel cache and data pre-fetching
US6570574B1 (en) 2000-01-10 2003-05-27 Intel Corporation Variable pre-fetching of pixel data
US7471298B1 (en) 2000-06-26 2008-12-30 S3 Graphics Co., Ltd. Fetching pixel data with reduced memory bandwidth requirement
US7034791B1 (en) * 2000-12-14 2006-04-25 Gary Odom Digital video display employing minimal visual conveyance
JP2003288067A (ja) * 2002-03-28 2003-10-10 Hitachi Ltd 画像表示装置
US6919902B2 (en) 2002-06-03 2005-07-19 Seiko Epson Corporation Method and apparatus for fetching pixel data from memory
JP4522404B2 (ja) * 2004-04-22 2010-08-11 富士通セミコンダクター株式会社 画像処理装置
JP2007170834A (ja) 2005-12-19 2007-07-05 Denso Corp ナビゲーション装置及びナビゲーション装置の画像表示方法
US20080001967A1 (en) * 2006-06-30 2008-01-03 Srikanth Rengarajan Display bandwidth reduction apparatus, system, and method
US20090135916A1 (en) 2007-11-26 2009-05-28 Mediatek Inc. Image processing apparatus and method
US20090310947A1 (en) 2008-06-17 2009-12-17 Scaleo Chip Apparatus and Method for Processing and Blending Multiple Heterogeneous Video Sources for Video Output

Also Published As

Publication number Publication date
BR112012017007A2 (pt) 2016-04-05
EP2524297A1 (en) 2012-11-21
US20110169847A1 (en) 2011-07-14
GB201212303D0 (en) 2012-08-22
DE112011100221T5 (de) 2012-10-25
GB2498416B (en) 2013-11-06
WO2011085024A1 (en) 2011-07-14
US8669993B2 (en) 2014-03-11
CN102763071A (zh) 2012-10-31
GB2498416A (en) 2013-07-17
HK1181230A1 (en) 2013-11-01
AU2011203640B2 (en) 2014-01-09
AU2011203640A1 (en) 2012-08-02
KR20140117692A (ko) 2014-10-07
JP2013516664A (ja) 2013-05-13
KR20120117860A (ko) 2012-10-24

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