LU84541A1 - INTERFACE DEVICE BETWEEN A COMPUTER AND A TELEX LINE OR A TELEPRINTER - Google Patents

Description

r * ·

INTERFACE DEVICE BETWEEN A COMPUTER

AND A TELEX LINE OR A TELEPRINTER.

the present invention relates to a device designed to perform the function of interface between a computer - 5 and a telex line and / or a local teleprinter, for printing for the service of telex.

In information generation and transmission systems, the problem is encountered. · Consisting in overcoming the difficulties linked to the different types of information that 10 can provide or receive on the one hand a computer and on the other hand a communication system. telex. This information belongs to different types because, first of all, the computer transmits and receives in the synchronous binary transmission mode (BSC), while the telex line transmits and receives asynchronous serial data at five levels. (Baudot process). Second, the rate of transmission and reception of information is different and it is much higher for the computer, for example 1200 baud, while the telex line transmits and receives at the rate of 50 baud, or even 75 baud according to a more recent 20 trend. Such differences make it impossible to communicate directly between the computer and the telex line or a local teleprinter transmitting and receiving telex communications, which requires the intervention of an operator, in the most basic solution to the problem. There is thus a need in the telecommunications industry for means which automatically carry out the transmission of telex messages, despite the aforementioned difficulties.

The invention solves the problem by providing a positive dis-i 50 intended to be connected on the one hand to the computer and on the other hand to the telex line and / or to the local teleprinter, ia "> 2 'and able to fulfill the function of interface between them and to allow the automatic transmission of information between them, in one direction as in the other.

In its general form, the device of the invention 5 is characterized by the combination of the following circuit elements: 1) level conversion circuits intended to carry out the conversion from the standardized level of the computer to the level of the central unit , defined below, ie practically 10 from the standard level V24 to the level TTL (level of the logic family known as "Transistor Transistor Logic"); 2) series-parallel conversion circuits; 3) iine central unit (microprocessor) comprising ï 3A) a central processor having at least 8 bits; 15 3B) a permanent memory (programmable read-only memory) constructed (programmed) to perform the translation passing from the EBCDIC code to the Baudot code, and intended to implement the connection procedures and transmission of the end-20 mite "computer" and the end "telex"; 3C) a reversible data memory (random access memory); 3D) lines (bus) of data, address and. command, which interconnect the s components 2, 25 3A, 3B, 3C and 4; 4) parallel-to-series conversion circuits; and 5) conversion circuits intended to carry out the conversion from the level of the central processing unit to the normalized level of the telex line, that is to say from TTL level 30 to the level of current loop conforming to the CCITT standard, from preferably with a telegraph switching device for a local printer.

Component 3A) is preferably an 8-bit central processor.

35 More precisely, the characteristics and functions of O.

J

"% 3 - tions of the components of the device of the invention, as well as their structural and functional relationships, are those indicated below.

the circuits 1) fulfill the function which consists in converting the pulses or the information which they receive, from the computer, into other forms corresponding to a voltage level allowing reception and processing by the circuits following, i.e. in practice a level which is suitable for one of the common microprocessors such as a Z80, an INTEL 8085, etc.

the pulses which are brought to the level TT1 are always transmitted in series and must be converted in parallel to be recorded in the memories of the central unit and processed appropriately. This is accomplished by the circuit element 2), connected in series to the previous one.

the information which leaves the circuit element 2) is ready for processing by the central processing unit. The latter includes a central processor, a program memory (typically in the form of one or more programmable read only memories), a data memory (typically in the form of one or more memories vives) and the various buses (data, address and control), and constitutes a microprocessor when considered as a whole.

The central unit is preferably a microprocessor; 8-bit; a central unit comprising a greater number of bits would be usable, but superabundant in practice.

5 the central unit receives the serial information which is sent to it by the computer or the telex line (the local teletypewriter 50, if any, would normally not transmit information). Naturally, this central processing unit has a finite memory capacity and once this capacity is fully used, it signals this fact in well known and obvious ways which it is not necessary to describe here. Therefore, in | 55. the limits of its memory capacity, the central processing unit processes '/ i "H"' r 4 information in the manner necessary for its use by the telex line or the local teleprinter, when the information comes from the computer, and by the computer when the information comes from the telex line.

5 At this stage, since the telex also works on serial information and at a level different from that of the microprocessor, the information must be converted from serial form to parallel form and brought to an appropriate level. This is accomplished by the circuit elements 4) and 5) · 10 The order in which the components of the device of the invention are considered and the order followed in the description of their functions apply to the case in which the information is transmitted from the computer to the telex, but if on the contrary the information is transmitted from the telex line 15 to the computer, the same components can be considered in reverse order, since their operation is reversible . Thus, the level converters perform a reversible conversion and the serial-parallel converters can also convert from the parallel form to the serial form.

All the components of the device of the invention, considered individually, are known to a person skilled in the art and he will be able to obtain them without difficulty on the market, their combination in a single device, in order to reach the goals and fulfill the functions specified above, is original and constitutes significant progress in the particular technical field considered.

The invention will be better understood on reading the following description of an embodiment, given by way of nonlimiting example. The following description refers to the accompanying drawings in which: FIG. 1 is a diagram showing the connections between the interface device of the invention and the computer, on the one hand, and the telegraph line and / or the local teleprinter 55, on the other hand; .1! & 5 'Figure 2 is a schematic representation of the internal structure of the device of the invention, in accordance with a preferred embodiment thereof; Figure 3 schematically shows an organi-5 gram or a possible operating diagram for the device according to the invention; FIGS. 4a, 41 and 4c schematically represent a procedure for exchanging information possible between the device of the invention and a computer operating in accordance with the BSC (synchronous binary transmission) procedure, which represents a preferred embodiment of the invention; and Figures 5 to 9 show a diagram of the electronic circuits of an interface device according to an exemplary embodiment of the invention and, more specifically, Figure 5 shows a level adaptation unit, Figure 6 a frequency generation unit, FIG. 7 a microprocessor unit, FIG. 8 a power supply unit and FIG. 9 a diagram of the interconnections of the units of FIGS. 5 to 8.

20 We will now consider FIG. 1, in which the reference 10 generally designates the interface device of the invention, which communicates with the computer 13 by the access 11 and the line 12, the computer being preferably a medium or large computer, for example of the IBM S / 34 type.

the unit 10 is connected by an access 14, a line 15 and a line protection device 16, to the telegraph line 17 which leads to the telex station, the unit 10 communicates with the local teleprinter 20 by means of 30 access 18 and line 19. the dotted line 21 indicates the communication between the telex station and the local teleprinter.

Now considering FIG. 2, it can be seen that the device of the invention comprises the components described 3 ^ specially below, starting from the access 11 and going ί i / 6 towards the accesses 14 and 18.

the reference 30 designates the level adapter, which consists of a circuit element intended for the level conversion to pass from the level of the standard V24 to the level TT1, 5 and this circuit element is that which has been called component 1 ) in the general definition of the device, given above.

Level adapters of this kind exist commercially, for example under the references IM 1488, LM 1489, 10 75188 or 75189.

component 31 is a serial-parallel converter which receives and converts information at a rate identical to that of synchronous information from the computer, ie in practice at 1200 baud. This type of component is known commercially under the name USART (universal synchronous asynchronous transceiver), and it can be supplied in a form suitable for conversion into synchronous or asynchronous mode, and for the various frequencies. used in industry, component 31 will thus be a synchronous USART at 1200 baud.

The information coming from the component 31 is applied to the bus of the central unit, the central unit comprises all the elements of a microprocessor, namely: a central processor 32, a programmed memory 33, typically comprising a or several program-25 mables read only memories; a data storage memory 34, typically comprising one or more random access memories; a data bus 35; an address bus 36; and a control bus 37. the use of memories of different types is not to be excluded, in principle, the structure and the operation 30. of these components are too well known to require an explanation. Suffice it to say that the input program contained in the memory 33 allows the processing of the data coming from the computer, so that this data can be received and used by the telex line or the local teleprinter.

X

> 7 r At this stage, the data must be reconverted from the form parallel to the serial form, in a manner suitable for telex and, consequently, the device comprises a parallel-serial converter 38 which comprises an asynchronous USART to 50 baud (or having a slightly higher frequency, like 75 baud, as mentioned above).

reference 39 designates the level adapter which switches from TTL level to the current loop level, in accordance with the CCITT standard. The information which comes from the com-10 posing 39 can pass preferably by a referral device 40 which, according to the case, directs it either towards the telex line, by the access 14, or towards 1 has local teletypewriter , via access 18. However, the possibility of transmission to a local teleprinter or telex line may not exist.

As mentioned, the device is reversible. The arrows in the diagram in FIG. 2 show this characteristic of reversibility. The flow of data in any direction between the various components of the central unit is characteristic of any microprocessor and will be readily apparent to those skilled in the art. The two-way traffic between the central unit and the USARTs and between the latter and the level adapters is apparent from the examination of the diagram and does not require any additional explanation.

The flowchart or the operating diagram re presented by way of example in FIG. 3 does not require any additional explanation, in addition to the information given. ‘By the legends of the figure.

FIG. 4a illustrates the communication between the computer and the interface device of the invention, in accordance with the BSG procedure (synchronous binary transmission). In this figure, the reference characters C and I denote the computer and the interface respectively.

The computer sends a request for control of the line ;; em by sending the characters ENQ (request) (1), preceded by '£> 6 or 0 8 the synchronization characters ψ (specified in FIG. 4c), The interface responds to this request with ACK 0 (2), which indicates that reception is correct and that transmission can continue. The computer resumes operation by providing the first block of data (3) (country prefix, recipient name, reply name), preceded by the characters STX (beginning of the text) and terminated by ETB (end of block). We then find the control characters W (specified in FIG. 4b). The interface internally calculates the control characters (BCC, BOC) and compares them with the characters received. If the two characters are identical (no errors in data reception), the interface responds with an ACK (block (4)) · The computer resumes transmission to send the second block of data ( 5) which is represented in this particular case by 69 exclamation marks, to which the interface responds with the block (6), followed by the termination of the text (block (7)) by the computer. At this stage, the interface frees the synchronous transmission lines and initiates the connection procedure to the telex line by performing the operations which consist in giving the name and controlling the response. After having requested and compared twice the name of the selected user, the interface resumes synchronous transmission by sending to the computer a line control request, with block (8), and, when it receives a reply. -25 affirmative response from the computer (block (9)), it emits the ITC symbol (block (10)) followed by wine digit indicating the result of the connection to the telex line (in the example- - 'pie of the figure, 0 indicates a correct selection). After the computer's response (block (11)), the interface ends the transmission with EOT (block (12)). At this point, the computer resumes command of the line (blocks (13) and (14)) and it transmits the text, line by line (blocks (15) and (16)), this being repeated N times, if we denote by K the number of lines in the text. After having transmitted the last line of the text * 35j (ie MMMMM in this particular case), the computer ends the i 1 /! • 4 9 text (block (17)) and, when it receives an affirmative response (18), it ends the transmission (19). The interface also frees the synchronous lines and performs the exchange and control of names with the called user, then it reconnects to the synchronous lines (block 20)) and, when the computer responds (block (21 )), it issues the ITC symbol (block (22)), followed by a number, as described above. When the interface receives the response from the computer (block (23)), it ends the communication (block (24)) and returns to the initial step, ready to process a new request from the computer, concerning the emission of a following message.

Figures 5 to 8 show the electrical circuits. of the interface device and the auxiliary circuits, in accordance with a preferred embodiment of the invention. These circuits are not represented in accordance with the functional layout followed by the description, but in the form in which they are materially associated on the individual cards, that is to say in the form of individual units. dual.

Figure 5 shows the wiring diagram of the level adaptation unit. This unit includes the level 30 adapter and the access 11 intended for the transmission of information between the microprocessor and the computer, as well as the adapter 39, the switching device 40 and the accesses 14 25 and 18 intended for the transmission between the microprocessor and the telex line or the local teletypewriter.

By way of example for the description, the diagram in FIG. 5 has been divided into 6 sub-assemblies, each sub-assembly seems to include the components which perform a respective function.

The table below summarizes the functions and j operating levels of the individual sub-assemblies.

t '' ψ 10

Subassembly Function Signal level

1 Telex line to Input = + 20 mA

microprocessor Output = 0, + 5V

2 Microprocessor to Input = 0, + 5V

5 local teleprinter Output = + 20 mA

3 Microprocessor to Input = 0.5V

telex line Output = + 20 mA

4 Local teletypewriter to Input = + 20 mA

the microprocessor Output = 0, + 5V

10 .5 Microprocessor to Input = 0, + 5V

the computer Output = + 12V

6 Computer to Input = + 12V

microprocessor Output = 0, + 5V

The level adaptation unit further comprises a relay, designated by the reference RLA, which has the function of galvanically connecting the telex line to the local teletypewriter in the inactive state.

The circuit of FIG. 6 fulfills the function of generating the frequencies necessary for the operation of the entire device.

Starting from a single quartz oscillator with a frequency of 4915.2 kHz, the necessary frequencies can be obtained by independent division chains, in a way that can be summarized as follows: 25 Symbol Frequency Function USART 0 1 228.8 kHz Clock signal from serial / parallel converters (USART) Z80 0 2 457.6 kHz Clock signal from central processor Z80 30 CL 0 1.2 kHz Signal transmission frequency, synchronous side (1200 baud) 4 "j CL1 800.0 kHz Signal transmission frequency, on the asynchronous side (x 16) r" t 11 'the circuits shown in figures 5 and 6 are connected, according to the interconnection diagram of FIG. 9, to the microprocessor unit whose electrical diagram is represented in FIG. 7.

^ the microprocessor card of Figure 7 actually also includes the two serial / parallel converters (USARI) 2) and 4), in addition to the microprocessor or the central unit 3).

On this card, the central processor (Z80) is connected by the address and data buses to the program memories (programmable erasable read-only memory 2716), to the data memories (random access memory 2114) and to the two serial / parallel converters , one of which (8251a) provides the synchronous connection with the computer, while the other (8251b) receives 15 and transmits synchronously to the telex line and the local teletypewriter.

the three units described above require different supply voltages, depending on the functions they fulfill, namely the microprocessor card or unit Supply = -5V, + 5V (Figure 7)

Frequency generation unit Power supply = —5V, + 5V (figure 6)

Supply level adaptation unit = -5V, + 5V

25 (figure 5) (central processor side) = + 12V, -12V (computer side) = + 60V, -60V (telex side) 50 All the supply voltages indicated above are produced by the circuit of the figure 8.

It goes without saying that numerous modifications can be made to the device described and represents, without departing from the scope of the invention.

is

Claims (5)

1. Interface device between a computer (13) and a telex line (17) and / or a local teleprinter (20), for printing the telex service, characterized in that it comprises, in combination, the following elements: 1) level conversion circuits (30) passing from the standardized level of the computer to the level of the central unit defined in 3); 2) series-parallel conversion circuits (31); 3) a central unit comprising: 3A) a central processor (32) having at least 8 bits; 3B) a permanent memory (programmable read only memory) (33) designed so as to translate the EBCDIC codes into Baudot codes and to implement the connection and communication procedures on the "computer side and on the telex side; 30) a reversible data memory (random access memory) (34); 3D) data (bus), address (36) and remote (37) lines (bus) which connect components 2), 3A), 3B), 30) and 4); 4) parallel-series conversion circuits (38); and 5) conversion circuits (39) passing from the central privacy level to the standardized level of the telex line. 2. Device according to claim 1, characterized in that the component 3A) consists of an 8-bit central processor (32). 3. Device according to claim 1, characterized in that the component 1) comprises level conversion circuits (30) passing from the standardized level V24 to the TTL level, and in that the component 5) comprises conversion circuits level (39) passing from TTL level to current loop level, in accordance with the CCITT standard. 4. Device according to claim 1, characterized in that it comprises a switching device (40) which is designed so as to make the interface device communicate alternately with a telex line (17) and a local teleprinter ( 20). p5 5 »Device according to claim 1, characterized £. ψ; 13 in that the central unit consists of an 8-bit Z80 microprocessor. ~ —JL. / ^ ~ i - i ~ 'T 1' r; I / - ti ·; f i l \ \ f ï \ t | ! II i, ·. - L P: Ιί 1 t a.