KR980012822A - H-bridge type drive circuit - Google Patents

Abstract

The present invention relates to an H-bridge drive furnace, and more particularly to an H-bridge drive furnace comprising four power transistors; A pair of transistors for differentially inputting a difference between voltage signals applied between the first input terminal and the second input terminal; A pair of driving means for generating a pair of control currents and a feedback current proportional to a collector current of any one of the transistors of the pair of transistors; A first external resistor coupled between the power supply voltage and the first node; A second external resistor coupled between the power supply voltage and a second node; A control for controlling the base current of the output transistor by controlling the gain of the pair of differential input transistors by adding or subtracting a third control current set by the ratio of the first and second external resistances by the first or second feedback current And means for providing a control signal.

Description

H-bridge type drive circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an H-bridge type driver circuit, and more particularly to an H-bridge type drive circuit that can be controlled to maintain a constant beta characteristic regardless of a load condition.

1 includes a first power transistor Q1 connected between one terminal of a load 10 such as a motor and a power supply voltage, a first power transistor Q1 connected between one terminal of the load 10 and a ground voltage A third power transistor Q3 connected between the other terminal of the load 10 and the power supply voltage, a third power transistor Q3 connected between the other terminal of the load 10 and the ground voltage, A second driving means for switching driving the first and second power transistors Q1 and Q2 and a second driving means for switching driving the third and fourth power transistors Q3 and Q4, (30). Accordingly, during the forward rotation of the motor 10, the first and fourth power transistors Q1 and Q4 are turned on to apply an output current to the motor 10, and during the reverse rotation of the motor 10, The power transistors Q3 and Q2 are turned on and an output current is applied to the motor 10. [ In this conventional circuit, the base current of the power transistors is supplied from the first and second driving means 20 and 30. Since the base current is fixed, there is a problem that the output current is limited according to the load condition there was.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a H-bridge type transistor which can maintain a constant beta value regardless of a load condition by enabling a base current of an output transistor to be adjusted by setting a resistance value of an external resistor, And to provide a driving circuit.

To achieve the above object, the circuit of the present invention comprises a first power transistor connected between a first node and a first output terminal; A second power transistor coupled between the first node and the second output terminal; A third power transistor connected between the first output terminal and ground; A fourth power transistor coupled between the second output terminal ground; A pair of emitter coupled differential input transistors for differentially inputting a difference between voltage signals applied between the first input terminal and the second input terminal; Generating first and second control currents and a first feedback current that are proportional to the collector current of any one of the transistors of the pair of transistors and wherein the first control current is applied to the base of the second power transistor, First driving means applied to the base of the third power transistor; Generating third and fourth control current-induced second feedback currents proportional to the collector current of the other transistor of the pair of transistors, the third control current being applied to the base of the first power transistor, Second driving means applied to the base of the fourth power transistor; A first external resistor coupled between the power supply voltage and the first node; A second external resistor coupled between the power supply voltage and a second node; And controlling a base current of the output transistor by controlling a gain of the differential input transistor pair by adding or subtracting a third control current set by the ratio of the first and second external resistances by the first or second feedback current And a control means.

1 is a circuit diagram showing a configuration of a conventional H-bridge type driver circuit,

2 is a circuit diagram showing the configuration of an H-bridge type driver circuit according to the present invention,

3 is a graph showing a beta characteristic according to a power supply voltage of an output transistor of an H-bridge type driver circuit according to the present invention,

4 is a graph showing an output current characteristic according to a power supply voltage of an output transistor of an H-bridge type driver circuit according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention.

Fig. 2 shows the structure of an H-bridge type driver circuit according to the present invention. The circuit of FIG. 2 includes a first power transistor Q1 connected between a first node N1 and a first output terminal VO1, a second power transistor Q2 connected between a first node N1 and a second output terminal VO2, A third power transistor Q3 connected between the first output terminal VO1 and ground and a fourth power transistor Q4 connected between the second output terminal VO2 and ground.

The circuit includes an emitter coupled differential input transistor pair 100 consisting of NPN transistors Q5 and Q6 for differentially inputting the difference between the voltage signals applied between the first input terminal VIN1 and the second input terminal VIN2, Generating first and second control currents and a first feedback current that are proportional to the collector current of one transistor (Q5) of the transistor pair (100) and the first control current is applied to the base of the second power transistor (Q2) And a second control current is applied to the base of the third power transistor Q3 by first drive means 110 comprised of transistors Q7 to Q11, Generates a third and a fourth control current and a second feedback current that are proportional to the collector current of the first power transistor Q1 and the third control current is applied to the base of the first power transistor Q1, On the base of the fourth power transistor Q4 A first external resistor Rl connected between the power supply voltage and the first node N1 and a second external resistor Rl connected between the power supply voltage and the second node N2 , A third control current set by the ratio of the first and second external resistors (R1, R2) to or from the first or second feedback current by the first or second feedback current, And a control means 130 composed of transistors Q17 to Q24 for controlling the base current of the output transistor by controlling the gain of the input transistor pair 100. [

Each of the driving units 110 and 120 includes a first transistor Q7 or Q12 connected between a power supply voltage and a collector of one transistor Q5 or Q6 of the transistor pair 100, A third transistor Q8 or Q13 having its emitter and base connected between its base and ground and its base connected to the collector of the first transistor Q7 or Q12, the first transistor Q7 or Q12, In order to form a current mirror, each base is commonly connected to the base of the first transistor (Q7 or Q12) and three output transistors (Q9, Q10, Q11) for outputting the pair of control currents and feedback currents (Q14, Q15, Q16).

The control means 130 includes a first current mirror means 132 comprised of transistors Q17 and Q18 for generating a first reference current proportional to the feedback current, a transistor Q19, Q2 and a resistor R8 connected to the first and second nodes N1 and N2 and connected to the first and second nodes N1 and N2 and connected to the first reference current and the second reference current, A third current mirror means 136 comprised of transistors Q21 and Q22 for generating a third reference current; a third current mirror means 136 comprising transistors Q21 and Q22 for controlling a common emitter current of the transistor pair 100 in proportion to the third reference current. Q23, and Q24, respectively.

The function and effect of the H bridge type driver circuit of the present invention constructed as described above are as follows.

When the voltage signal applied to the input terminal VIN1 is higher than the voltage signal applied to the input terminal VIN2, the collector current of the transistor Q5 flows, and the collector current of the first driving means 110 The collector current of the transistors Q9, Q10 and Q11 flows. The collector current of the transistor Q11 is applied to the base current of the second power transistor Q2 and the collector current of the transistor Q10 is applied to the base current of the third power transistor Q3. A load connected between the emitter collector-output terminals VO1 and VO2 of the second power transistor Q2 and a load-third power transistor Q3 of the emitter collector- The output current flows through the ground. The collector current of the transistor Q9 is fed back to the control means 130 as a feedback current. A collector current of the transistor Q18 is generated in proportion to the feedback current supplied to the collector current of the transistor Q17 of the first current mirror means 132 of the control means 130 and this current is provided as the first reference current . The collector current of the transistor Q20 is generated in proportion to the current flowing in the resistor R8 of the WP2 current mirror means 134 and this current is provided as the second reference current. Since the collector current of the transistor Q21 of the third current mirror means 136 is determined by the sum of the first and second reference currents, the sum current is larger than the first reference current And the size thereof varies depending on the variation. Therefore, the collector current of the transistor Q22 is determined by the ratio of the collector current of the transistor Q21 to the external resistors rl and r2. The collector current of the transistor Q22 is provided to the collector current of the transistor Q23 of the fourth current mirror means 138 and the collector current of the transistor Q24 is determined so that the gain of the transistor pair 100 is adjusted . Since the gain adjustment of the transistor pair 100 eventually adjusts the output current of the driving means, the base current of the power transistor is adjusted.

That is, the output current in the present invention is determined by the following equation.

As shown in FIG. 3, it can be seen that the beta characteristics of the H-bridge drive circuit according to the present invention are maintained at about 50 even when the power supply voltage is changed from 8V to 13V. Referring to FIG. 4, it can be seen that the output current varies from 750 mA to 1150 mA as the power supply voltage changes from 8V to 13V.

Therefore, in the present invention, the base current can be controlled to be constant by setting the external resistor, so that it is possible to control the beta value constantly regardless of the load condition.

Claims (3)

A first power transistor coupled between the first node and the first output terminal; A second power transistor coupled between the first node and the second output terminal; A third power transistor connected between the first output terminal and ground; A fourth power transistor coupled between the second output terminal ground; A pair of emitter coupled differential input transistors for differentially inputting a difference between voltage signals applied between the first input terminal and the second input terminal; Generating first and second control currents and a first feedback current that are proportional to the collector current of any one of the transistors of the pair of transistors and wherein the first control current is applied to the base of the second power transistor, First driving means applied to the base of the third power transistor; Third and fourth control currents and a second feedback current proportional to the collector current of the other transistor of the pair of transistors and the third control current is applied to the base of the first power transistor, Second driving means applied to the base of the fourth power transistor; A first external resistor coupled between the power supply voltage and the first node; A second external resistor coupled between the power supply voltage and a second node; A control for controlling the base current of the output transistor by controlling the gain of the pair of differential input transistors by adding or subtracting a third control current set by the ratio of the first and second external resistances by the first or second feedback current And an H-bridge driving circuit. 2. The device of claim 1, wherein each of the driving means comprises: a first transistor coupled between a power supply voltage and a collector of one transistor of the transistor pair; A third transistor having an emitter and a base connected between a base of the first transistor and a ground, and a base connected to a collector of the first transistor; Each of which is connected to the base of the first transistor in common to form a current mirror with the first transistor, and three output transistors for outputting the pair of control currents and feedback currents. Bridge drive circuit. 2. The apparatus of claim 1, wherein the control means comprises: first current mirror means for generating a first reference current proportional to the feedback current; Second current mirror means for generating a second reference current; Third current mirror means connected to the first and second nodes for generating a third reference current proportional to the sum current of the first reference current and the second reference current; And fourth current mirror means for controlling a common emitter current of said pair of transistors in proportion to said third reference current. ※ Note: It is disclosed by the contents of the first application.