KR980007751A - Apparatus and method for parallel processing of MPEG-2 variable-length decoder - Google Patents
Apparatus and method for parallel processing of MPEG-2 variable-length decoder Download PDFInfo
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- KR980007751A KR980007751A KR1019960024110A KR19960024110A KR980007751A KR 980007751 A KR980007751 A KR 980007751A KR 1019960024110 A KR1019960024110 A KR 1019960024110A KR 19960024110 A KR19960024110 A KR 19960024110A KR 980007751 A KR980007751 A KR 980007751A
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Abstract
본 발명은 MPEG2의 비디오 디코더에 관한 것으로 특히, 비디오 디코더의 가변길이 디코더(Variable Length Decoder : VLD)의 병렬처리장치 및 방법에 관한 것이다.The present invention relates to an MPEG2 video decoder, and more particularly, to an apparatus and method for parallel processing of a variable length decoder (VLD) of a video decoder.
본 발명에 따른 엠펙2의 가변길이 디코더의 병렬처리장치 및 방법은 비트스트림 요구 신호의 우선순위를 결정하고, 입력 비트스트림 요구신호가 입력되면 비디오 비트스트림에서 슬라이스 스타트 코드에서 슬라이스 스타트 코드를 검출하는 단계와, 상기 단계에서 슬라이스 스타트 코드가 검출되면 비디오 비트스트림 저장 및 이때 어드레스를 저장하고, 슬라이스 스타트 코드가 검출되지 않으면 상기 비디오 비트스트림을 저장하는 단계와, 오드 및 이븐 슬라이스 비트스트림 요구신호가 입력되면 해당 슬라이스의 위치 어드레스의 비디오 비트스트림을 읽어 저장하는 단계와, 상기 저장된 비디오 비트스트림을 각각 가변길이 디코딩하여 출력하는 단계로 이루어짐을 특징으로 하여 각 슬라이스 비트스트림의 위치를 저장하여 하나의 VBV 버퍼 사이즈의 비디오 비트스트림 버퍼를 이용하여 병렬처리하므로 메모리 효율성이 높고, 경제적이다.An apparatus and method for parallel processing a variable length decoder of MPEG-2 according to the present invention determines priority of a bitstream request signal and detects a slice start code in a slice start code in a video bitstream when an input bitstream request signal is input Storing a video bitstream storage and an address at this time if the slice start code is detected and storing the video bitstream if no slice start code is detected; A step of reading and storing a video bit stream of a position address of the corresponding slice, and a step of variable length decoding the stored video bit stream and outputting the resultant video bit stream, size Since parallel processing using a video bitstream buffer memory with high efficiency, is economical.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.
제2도는 본 발명에 따른 가변길이 디코더의 병렬처리장치의 구성을 보여주는 블록도.FIG. 2 is a block diagram showing a configuration of a parallel processor of a variable-length decoder according to the present invention; FIG.
제3도는 제2도의 비디오 비트스트림 버퍼와 슬라이스 위치 메모리에 대한 도면.Figure 3 shows a diagram of a video bitstream buffer and a slice location memory of Figure 2;
제4도는 본 발명에 따른 가변길이 디코더의 병렬처리방법을 보여주는 플로우 챠트.FIG. 4 is a flow chart showing a parallel processing method of a variable-length decoder according to the present invention;
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019960024110A KR980007751A (en) | 1996-06-26 | 1996-06-26 | Apparatus and method for parallel processing of MPEG-2 variable-length decoder |
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KR1019960024110A KR980007751A (en) | 1996-06-26 | 1996-06-26 | Apparatus and method for parallel processing of MPEG-2 variable-length decoder |
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KR980007751A true KR980007751A (en) | 1998-03-30 |
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KR1019960024110A KR980007751A (en) | 1996-06-26 | 1996-06-26 | Apparatus and method for parallel processing of MPEG-2 variable-length decoder |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100801630B1 (en) * | 2007-06-15 | 2008-02-05 | 디비코 주식회사 | Distributed decoding processing device using multi-core processor and the method for the same |
KR101353193B1 (en) * | 2006-03-29 | 2014-01-21 | 톰슨 라이센싱 | Methods and apparatus for use in a multi-view video coding system |
US9020286B2 (en) | 2010-07-27 | 2015-04-28 | Samsung Electronics Co., Ltd. | Apparatus for dividing image data and encoding and decoding image data in parallel, and operating method of the same |
-
1996
- 1996-06-26 KR KR1019960024110A patent/KR980007751A/en not_active Application Discontinuation
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101353193B1 (en) * | 2006-03-29 | 2014-01-21 | 톰슨 라이센싱 | Methods and apparatus for use in a multi-view video coding system |
KR101383735B1 (en) * | 2006-03-29 | 2014-04-08 | 톰슨 라이센싱 | Methods and apparatus for use in a multi-view video coding system |
US9100659B2 (en) | 2006-03-29 | 2015-08-04 | Thomson Licensing | Multi-view video coding method and device using a base view |
KR100801630B1 (en) * | 2007-06-15 | 2008-02-05 | 디비코 주식회사 | Distributed decoding processing device using multi-core processor and the method for the same |
US9020286B2 (en) | 2010-07-27 | 2015-04-28 | Samsung Electronics Co., Ltd. | Apparatus for dividing image data and encoding and decoding image data in parallel, and operating method of the same |
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