KR980005541A - METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR - Google Patents

METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR Download PDF

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Publication number
KR980005541A
KR980005541A KR1019960024513A KR19960024513A KR980005541A KR 980005541 A KR980005541 A KR 980005541A KR 1019960024513 A KR1019960024513 A KR 1019960024513A KR 19960024513 A KR19960024513 A KR 19960024513A KR 980005541 A KR980005541 A KR 980005541A
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KR
South Korea
Prior art keywords
film
forming
metal wiring
tin
semiconductor
Prior art date
Application number
KR1019960024513A
Other languages
Korean (ko)
Other versions
KR100197537B1 (en
Inventor
박진요
전배근
양예석
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960024513A priority Critical patent/KR100197537B1/en
Publication of KR980005541A publication Critical patent/KR980005541A/en
Application granted granted Critical
Publication of KR100197537B1 publication Critical patent/KR100197537B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 금속 배선 형성 방법에 관한 것으로, 보다 상세하게는, TiN막에 크랙이 발생되는 것을 방지하고, 금속의 반사율을 감소시킬 수 있는 반도체 소자의 금속 배선 형성 방법에 관한 것이다. 본 발명의 반도체 소자의 금속 배선 형성 방법은 반도체 기판상에 장벽 금속막으로서 Ti막을 형성하는 단계; Ti막상에 알루미늄을 증착하는 단계; 알루미늄 상에 버퍼용 O3 PSG막을 형성하는 단계; 및 그 상부에 Tin을 증착하여 난반사 Tin막을 형성하는 단계를 포함하는 것을 특징으로 한다.The present invention relates to a method of forming a metal wiring of a semiconductor device, and more particularly, to a method of forming a metal wiring of a semiconductor device capable of preventing cracks from occurring in the TiN film and reducing the reflectance of the metal. A metal wiring forming method of a semiconductor device of the present invention includes the steps of: forming a Ti film as a barrier metal film on a semiconductor substrate; Depositing aluminum on the Ti film; Forming an O3 PSG film for buffer on aluminum; And forming a diffusive Tin film by depositing Tin on the Tin film.

Description

반도체 소자의 금속 배선 형성 방법METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a도 내지 제2c도는 본 발명에 따른 반도체 소자의 금속 배선 형성 방법을 설명하기 위한 단면도.FIGS. 2A to 2C are cross-sectional views for explaining a method of forming a metal wiring of a semiconductor device according to the present invention. FIG.

Claims (3)

반도체 기판상에 장벽 금속막으로서 Ti막을 형성하는 단계; Ti막상에 알루미늄을 증착하는 단계; 알루미늄막상에 버퍼용 O3 PSG막을 형성하는 단계; 및 그 상부에 TiN을 증착하여 난반사 TiN막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.Forming a Ti film as a barrier metal film on the semiconductor substrate; Depositing aluminum on the Ti film; Forming an O3 PSG film for buffer on the aluminum film; And depositing TiN on the TiN film to form a diffused reflection TiN film. 제1항에 있어서, 상기 O3 PSG막은 250°C 내지 300°C 에서 100Å 두께로 형성되는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.The method of claim 1, wherein the O3 PSG film is formed to a thickness of 100 ANGSTROM at 250 DEG C to 300 DEG C. 제1항에 있어서, 상기 금속 배선을 형성하기 위한 금속 에칭시 에천트로 BC13 또는 SF6가스를 사용하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.The method according to claim 1, wherein BC13 or SF6 gas is used as an etchant in metal etching for forming the metal interconnection. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960024513A 1996-06-27 1996-06-27 Forming method for metal wiring in semiconductor device KR100197537B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960024513A KR100197537B1 (en) 1996-06-27 1996-06-27 Forming method for metal wiring in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960024513A KR100197537B1 (en) 1996-06-27 1996-06-27 Forming method for metal wiring in semiconductor device

Publications (2)

Publication Number Publication Date
KR980005541A true KR980005541A (en) 1998-03-30
KR100197537B1 KR100197537B1 (en) 1999-06-15

Family

ID=19463901

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960024513A KR100197537B1 (en) 1996-06-27 1996-06-27 Forming method for metal wiring in semiconductor device

Country Status (1)

Country Link
KR (1) KR100197537B1 (en)

Also Published As

Publication number Publication date
KR100197537B1 (en) 1999-06-15

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