KR980004009A - Latch data select output circuit - Google Patents
Latch data select output circuit Download PDFInfo
- Publication number
- KR980004009A KR980004009A KR1019960021521A KR19960021521A KR980004009A KR 980004009 A KR980004009 A KR 980004009A KR 1019960021521 A KR1019960021521 A KR 1019960021521A KR 19960021521 A KR19960021521 A KR 19960021521A KR 980004009 A KR980004009 A KR 980004009A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- latch
- multiplexer
- output
- latches
- Prior art date
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- Time-Division Multiplex Systems (AREA)
Abstract
본 발명은 입력된 데이터의 사이즈에 따라 공급되는 로드신호에 의해 데이터를 각각 래치하는 제1, 2래치부와, 상기 제1, 2래치부에 래치된 데이터의 상위 비트를 데이터 셀렉터신호에 따라 멀티플렉싱하는 제1멀티플렉서부와, 상기 제1, 2래치부에 래치된 데이터의 하위 비트를 데이터 셀렉터신호에 따라 멀티플렉싱하는 제2멀티플렉서부와, 상기 제1, 2 멀티플렉서부에서 각각 출력된 데이터를 셀렉터신호에 따라 멀티플렉싱하여 출력하는 제3멀티플렉서부로 구성되어, 입력된 데이터의 사이즈에 따라 복수 개의 래치회로 래치시킨 후 셀렉터신호에 따라 상기 복수 개의 래치회로에서 출력되는 데이터를 멀티플렉싱하여 희망하는 데이터를 선택 출력하므로 래치회로를 효율적으로 이용하는 래치 데이터 선택 출력 회로에 관한 것이다.The present invention multiplexes the first and second latches for latching data according to the load signal supplied according to the size of the input data, and the upper bits of the data latched in the first and second latches according to the data selector signal. A first multiplexer unit configured to multiplex the lower bits of the data latched in the first and second latch units according to a data selector signal, and data output from the first and second multiplexer units, respectively; And a third multiplexer unit for multiplexing and outputting the plurality of latch circuits, and latching the plurality of latch circuits according to the size of the input data, and then multiplexing the data output from the plurality of latch circuits according to the selector signal to selectively output desired data. A latch data selection output circuit using the latch circuit efficiently.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 따른 래치 데이터 선택 출력 회로를 나타낸 도면이다.1 is a diagram illustrating a latch data select output circuit according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960021521A KR980004009A (en) | 1996-06-14 | 1996-06-14 | Latch data select output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960021521A KR980004009A (en) | 1996-06-14 | 1996-06-14 | Latch data select output circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
KR980004009A true KR980004009A (en) | 1998-03-30 |
Family
ID=66287370
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960021521A KR980004009A (en) | 1996-06-14 | 1996-06-14 | Latch data select output circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR980004009A (en) |
-
1996
- 1996-06-14 KR KR1019960021521A patent/KR980004009A/en not_active Application Discontinuation
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Legal Events
Date | Code | Title | Description |
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WITN | Withdrawal due to no request for examination |