KR980003809A - Processing method of micro penetrating structure - Google Patents

Processing method of micro penetrating structure Download PDF

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Publication number
KR980003809A
KR980003809A KR1019960020353A KR19960020353A KR980003809A KR 980003809 A KR980003809 A KR 980003809A KR 1019960020353 A KR1019960020353 A KR 1019960020353A KR 19960020353 A KR19960020353 A KR 19960020353A KR 980003809 A KR980003809 A KR 980003809A
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South Korea
Prior art keywords
film
photoresist
substrate
plating
predetermined
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KR1019960020353A
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Korean (ko)
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KR0165523B1 (en
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최완욱
권오근
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김광호
삼성전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 미세한 형상의 투과형 홀(hole)이나 홈(groove)과 같은 관통형 구조 등을 가공하기 위한 가공방법에 관하여 개시한 것으로서, 본 발명에 의한 가공방법의 특징에 따르면 주로 반도체 제조공정에서 이용되고 있는 석판술(Lithopraphy)과, 통상적인 도금기술을 이용하여 원하는 형상과 치수의 미세형 관통구조를 가공한다. 즉, 금속 또는 전도성 박막을 포함하는 실리콘 웨이퍼 및 세라믹재로 된 기판 위에 감광막을 증착하고 가공형상이 형성되어 있는 마스크를 이용하여 노광 및 현상과정을 거쳐 소정 부위의 감광막을 제거하고, 그 부위에 도금막을 형성한 다음, 잔류된 감광막의 제거와 동시에 기판으로부터 도금막을 분리시켜 원하는 형상의 미세형 관통 구조를 얻을 수 있도록 한 것이다.The present invention discloses a processing method for processing a through-hole structure such as a fine-shaped transmission hole (hole) or groove (groove), according to the characteristics of the processing method according to the invention mainly used in the semiconductor manufacturing process Lithopraphy and conventional plating techniques are used to machine fine through structures of desired shapes and dimensions. That is, a photoresist film is deposited on a silicon wafer and a substrate made of a ceramic material including a metal or a conductive thin film, and a photoresist film is removed through a process of exposure and development using a mask having a processed shape, and then plated on the site. After the film was formed, the plated film was separated from the substrate at the same time as the remaining photosensitive film was removed, thereby obtaining a fine through structure having a desired shape.

이러한 본 발명의 가공방법에 의하면 다양한 형상의 미세한 관통형 구조를 예컨대, 미크론 이하 단위의 극미세 가공으로 정말하게 행할 수 있고, 또한 가공 효율이 우수하여 높은 양산성을 얻을 수 있는 장점을 가진다.According to such a processing method of the present invention, a fine through-shaped structure of various shapes can be really performed by, for example, ultra-fine processing of a unit of micron or less, and also has excellent advantages in processing efficiency and high mass productivity.

Description

미세형 관통 구조의 가공방법Processing method of micro penetrating structure

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제7도는 본 발명에 의한 제1의 가공방법을 적용하여 미세형 관통 구조를 가지는 가공물을 가공하는 과정을 설명하기 위해 나타내 보인 개략적 공정도이다.7 is a schematic process diagram shown to explain a process of processing a workpiece having a fine through structure by applying the first processing method according to the present invention.

Claims (15)

금속 기판 상에 감광제를 도포하여 소정 두께의 감광막을 형성하는 제1단계와; 소정 형상이 가공되어 있는 마스크를 이용하여 상기 감광막을 노광시키는 제2단계와; 상기 마스크를 제거하고 노광된 부위를 현상하여 가공형상 이외의 부분에 형성되어 있는 감광막을 제거하는 제3단계와; 상기 제3단계에서 얻어진 결과물의 감광제 제거부위에 소정 금속의 도금막을 형성시키는 제4단계와; 상기 가공형상 부분의 제거되지 않은 감광제를 제거하여 미세 관통 구조를 형성하는 제5단계와; 상기 기판과 상기 도금막을 분리시키는 제6단계를 포함하는 것을 특징으로 하는 미세형 관통 구조의 가공방법.A first step of forming a photoresist film having a predetermined thickness by applying a photoresist on the metal substrate; A second step of exposing the photosensitive film by using a mask having a predetermined shape processed; A third step of removing the mask and developing the exposed portion to remove the photosensitive film formed on the portion other than the processed shape; A fourth step of forming a plating film of a predetermined metal on the photoresist removing portion of the resultant obtained in the third step; A fifth step of forming a fine penetrating structure by removing the unremoved photoresist of the processed portion; And a sixth step of separating the substrate and the plated film. 제1항에 있어서, 상기 금속 기판의 두께는 0.5 내지 1.0㎜인 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 1, wherein the metal substrate has a thickness of 0.5 to 1.0 mm. 제1항에 있어서, 상기 감광제는 포토레지스트인 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 1, wherein the photosensitive agent is a photoresist. 제1항에 있어서, 상기 제3단계에서 얻어진 결과물의 도금처리 과정 전에 이형처리 과정을 거치는 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 1, wherein a mold release process is performed before the plating process of the resultant product obtained in the third step. 제1항에 있어서, 상기 제4단계에서의 도금처리 과정에서 도금액에 붕소화합물을 첨가시켜 도금막을 형성시키는 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 1, wherein the plating film is formed by adding a boron compound to the plating liquid in the plating process in the fourth step. 소정 기판 상에 전도성 물질을 증착하여 소정 두께의 전도성 박막을 형성하는 제1단계와; 상기 전도성 박막 위에 감광제를 도포하여 소정 두께의 감광막을 형성하는 제2단계와; 소정 형상이 가공되어 있는 마스크를 이용하여 상기 감광막을 노광시키는 제3단계와; 상기 마스크를 제거하고 노광된 부위를 현상하여 가공형상 이외의 부분에 형성되어 있는 감광막을 제거하는 제4단계와; 상기 제3단계에서 얻어진 결과물의 감광막 제거부위에 소정 금속이 도금막을 형성하는 제5단계와; 상기 가공형상 부분의 제거되지 않은 감광막을 제거하여 소정의 관통 구조를 형성하는 제6단계와; 상기 기판 및 전도성 박막으로부터 상기 도금막을 분리시키는 제7단계를 포함하는 것을 특징으로 하는 미세형 관통 구조의 가공방법.Depositing a conductive material on a predetermined substrate to form a conductive thin film having a predetermined thickness; A second step of forming a photoresist film having a predetermined thickness by applying a photoresist on the conductive thin film; A third step of exposing the photosensitive film by using a mask having a predetermined shape processed; A fourth step of removing the mask and developing the exposed portion to remove the photosensitive film formed on the portion other than the processed shape; A fifth step of forming a plating film by a predetermined metal on the photoresist film removing portion of the resultant obtained in the third step; A sixth step of forming a predetermined through structure by removing the unremoved photosensitive film of the processed portion; And a seventh step of separating the plating film from the substrate and the conductive thin film. 제6항에 있어서, 상기 기판은 실리콘 웨이퍼인 것을 특징으로 하는 미세형 관통 구조의 가공방법.7. The method of claim 6, wherein the substrate is a silicon wafer. 제6항에 있어서, 상기 기판은 세라믹물질로 형성된 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 6, wherein the substrate is formed of a ceramic material. 제6항에 있어서, 상기 기판은 알루미나(Al₂O₃), 산화마그네슘(MgO), 유리(Glass)재 중 어느 하나인 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 6, wherein the substrate is any one of alumina (Al₂O₃), magnesium oxide (MgO), and glass (Glass). 제6항 내지 제9항에 있어서, 상기 기판은 0.5 내지 1.0㎜ 범위의 두께를 가지는 것을 특징으로 하는 미세형 관통 구조의 가공방법.10. The method of claim 6, wherein the substrate has a thickness in the range of 0.5 to 1.0 mm. 제6항에 있어서, 상기 감광제는 포토레지스트인 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of processing a micro penetrating structure according to claim 6, wherein the photosensitive agent is a photoresist. 제6항에 있어서, 상기 제1단계에서 전도성 박막은 증착 또는 스퍼터링법에 의해 형성되는 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 6, wherein the conductive thin film is formed by vapor deposition or sputtering in the first step. 제6항 또는 제12항에 있어서, 상기 전도성 박막은 수백 내지 수천 옹그스트롬 범위 이내의 두께로 형성되는 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 6 or 12, wherein the conductive thin film is formed to a thickness within a range of several hundred to thousands of Angstroms. 제6항에 있어서, 상기 제4단계에서 얻어진 결과물의 도금처리 과정 전에 이형처리 과정을 거치는 것을 특징으로 하는 미세형 관통 구조의 가공방법.7. The method of claim 6, wherein a mold release process is performed before the plating process of the resultant product obtained in the fourth step. 제6항에 있어서, 상기 제5단계에서의 도금처리 과정에서 도금액에 붕소화합물을 첨가시켜 도금막을 형성시키는 것을 특징으로 하는 미세형 관통 구조의 가공방법.The method of claim 6, wherein the plating film is formed by adding a boron compound to the plating liquid in the plating process in the fifth step. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960020353A 1996-06-07 1996-06-07 Method for fabricating a fine hole structure KR0165523B1 (en)

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KR1019960020353A KR0165523B1 (en) 1996-06-07 1996-06-07 Method for fabricating a fine hole structure

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