KR970077715A

KR970077715A - Metal wiring formation method

Info

Publication number: KR970077715A
Application number: KR1019960014947A
Authority: KR
Inventors: 허철
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1996-05-08
Filing date: 1996-05-08
Publication date: 1997-12-12

Abstract

본 발명은 반도체소자의 메탈 배선 형성방법에 관한 것으로, 메탈층을 패턴닝할때 중첩도를 향상시킬 수 있도록 하기 위하여 상기 얼라인 키 또는 중첩도 마크가 있는 영역에는 메탈층이 제거되도록 한 상태에서 셀지역에 증착된 메탈층을 패턴닝하는 반도체소자의 메탈 배선 형성방법이다.The present invention relates to a method of forming a metal wiring of a semiconductor device, in which a metal layer is removed in an area where the alignment mark or the overlapping mark is formed so as to improve the degree of overlap when patterning the metal layer And patterning the metal layer deposited on the cell region.

Description

Metal wiring formation method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제3도의 (a)-(e)는 본 발명의 실시예에 의해 메탈배선을 형성하는 단계를 제1도의 I-I를 따라 도시한 단면도.FIG. 3 (a) - (e) are cross-sectional views along the line I-I of FIG. 1 showing the step of forming a metal wiring according to an embodiment of the present invention.

Claims

A method of forming a metal wiring of a semiconductor device, comprising: forming a photoresist pattern only on a region where an alignment mark or an overlap mark is formed before depositing a metal layer; depositing a metal layer on the entire structure of the wafer; A step of lifting off the photoresist pattern having the metal layer stacked thereon, a step of forming a photoresist pattern by applying a photoresist over the metal layer and exposing and developing using a mask, And forming a wiring.

A method of forming a metal wiring of a semiconductor device, comprising the steps of: depositing a metal layer on a wafer; forming a photoresist pattern on the cell area; forming an alignment mark or an overlap mark using the photoresist pattern as a mask Etching the metal layer to remove the photoresist pattern, applying a photoresist over the entire structure, forming a photoresist pattern by a lengthening and developing process using a mask, etching the exposed metal layer, To form a metal interconnect.

※ Note: It is disclosed by the contents of the first application.