KR970076832A - Bit line precharge method of semiconductor memory device - Google Patents
Bit line precharge method of semiconductor memory device Download PDFInfo
- Publication number
- KR970076832A KR970076832A KR1019960016525A KR19960016525A KR970076832A KR 970076832 A KR970076832 A KR 970076832A KR 1019960016525 A KR1019960016525 A KR 1019960016525A KR 19960016525 A KR19960016525 A KR 19960016525A KR 970076832 A KR970076832 A KR 970076832A
- Authority
- KR
- South Korea
- Prior art keywords
- bit line
- memory device
- semiconductor memory
- line precharge
- bit lines
- Prior art date
Links
Landscapes
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
Abstract
본 발명은 인접한 비트 라인들 간의 용량성 결합으로 인한 프리챠지 속도의 지연을 개선하기 위해 선택된 비트 라인(BL3)을 프리챠지시킬 때 선택된 비트 라인(BL3)에 인접한 적어도 2개의 비트 라인들(BL2,BL4)을 선택된 비트 라인(BL3)과 함께 동시에 프리챠지시킨다. 이로써, 인접한 비트 라인들 간의 결합 용량으로 인해 데이타 감지의 오류 또는 읽기 동작의 지연과 같은 읽기 동작 특성을 저하를 상당히 개선할 수 있게 된다.The present invention provides at least two bit lines BL2, BL3 adjacent to the selected bit line BL3 when precharging the selected bit line BL3 to improve the delay of the precharge rate due to capacitive coupling between adjacent bit lines. BL4 simultaneously with the selected bit line BL3. This makes it possible to significantly reduce the degradation of the read operation characteristics such as the error of data detection or the delay of the read operation due to the coupling capacitance between adjacent bit lines.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.
제1도는 전형적인 반도체 메모리 장치의 비트 라인 구조를 보여주는 도면, 제2도는 종래 기술과 본 발명에 따른 반도체 장치의 비트 라인 프리챠지 시간을 보여주는 도면.FIG. 1 is a view showing a bit line structure of a typical semiconductor memory device, FIG. 2 is a diagram showing bit line precharge time of a semiconductor device according to the related art and the present invention. FIG.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960016525A KR970076832A (en) | 1996-05-16 | 1996-05-16 | Bit line precharge method of semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960016525A KR970076832A (en) | 1996-05-16 | 1996-05-16 | Bit line precharge method of semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970076832A true KR970076832A (en) | 1997-12-12 |
Family
ID=66220206
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960016525A KR970076832A (en) | 1996-05-16 | 1996-05-16 | Bit line precharge method of semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970076832A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100328554B1 (en) * | 1999-06-29 | 2002-03-14 | 박종섭 | Bit line sense amplifier for semi-conductor memory |
US7599237B2 (en) | 2006-09-07 | 2009-10-06 | Samsung Electronics Co., Ltd. | Memory device and method for precharging a memory device |
-
1996
- 1996-05-16 KR KR1019960016525A patent/KR970076832A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100328554B1 (en) * | 1999-06-29 | 2002-03-14 | 박종섭 | Bit line sense amplifier for semi-conductor memory |
US7599237B2 (en) | 2006-09-07 | 2009-10-06 | Samsung Electronics Co., Ltd. | Memory device and method for precharging a memory device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100546307B1 (en) | Semiconductor device comprising precharge circuit for precharging and/or equalizing global input and output line and layout of precharging and/or equalizing transistor | |
KR880004479A (en) | Dynamic Semiconductor Memory Device | |
KR900015323A (en) | Semiconductor memory | |
KR970023381A (en) | Ferroelectric Memory | |
KR920010638A (en) | Semiconductor memory | |
KR910020724A (en) | Semiconductor memory | |
KR870008320A (en) | Semiconductor memory device composed of different type memory cells | |
KR900013621A (en) | Semiconductor device | |
EP0848851B1 (en) | Segmented read line circuit particularly useful for multi-port storage arrays | |
KR960042734A (en) | Semiconductor memory device with hierarchical column selection line structure | |
KR970012754A (en) | Semiconductor memory and its writing method | |
GB2306028A (en) | Semiconductor memory device | |
KR970076832A (en) | Bit line precharge method of semiconductor memory device | |
KR950006858A (en) | Semiconductor memory circuit | |
KR970029768A (en) | Semiconductor memory device with block write function | |
KR920022306A (en) | Input / output line precharge method of memory device | |
KR980004981A (en) | Data I / O Line Loading Reduction Device in Multi-Bank Structure | |
KR970051149A (en) | Semiconductor memory device with double word line structure | |
KR980006386A (en) | Dirham | |
KR940010106A (en) | Current Sense Amplifier Circuit with Presetting Circuit | |
KR920004950A (en) | Computer terminal with multiport function | |
KR960002360A (en) | Semiconductor memory device | |
KR950034260A (en) | Integrated semiconductor memory circuit and its operation method | |
KR940001167A (en) | Word line access method of static RAM (SRAM) | |
KR970023429A (en) | Bit line discharge method of semiconductor memory device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |