KR940010106A - Current Sense Amplifier Circuit with Presetting Circuit - Google Patents

Current Sense Amplifier Circuit with Presetting Circuit

Info

Publication number
KR940010106A
KR940010106A KR1019930018437A KR920018437A KR940010106A KR 940010106 A KR940010106 A KR 940010106A KR 1019930018437 A KR1019930018437 A KR 1019930018437A KR 920018437 A KR920018437 A KR 920018437A KR 940010106 A KR940010106 A KR 940010106A
Authority
KR
South Korea
Prior art keywords
sense amplifier
current sense
circuit
presetting
amplifier circuit
Prior art date
Application number
KR1019930018437A
Other languages
Korean (ko)
Other versions
KR950014258B1 (en
Inventor
정철민
최진영
서영호
임형규
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920018437A priority Critical patent/KR950014258B1/en
Publication of KR940010106A publication Critical patent/KR940010106A/en
Application granted granted Critical
Publication of KR950014258B1 publication Critical patent/KR950014258B1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

본 발명은 반도체 메모리 장치에서 특히 스태틱 램의 전류센스앰프를 소정의 액티브동작시 프리세팅(presetting)하는 전류 센스 앰프 회로에 관한 것으로, 전류센스앰프의 프리세팅을 위하여 전류센스앰프의 양단을 등화시키고 또한 전류센스앰프의 프리세팅을 위하여 전류센스앰프에 연결된 비트라인 또는 데이타 라인을 소정의 정전압레벨로 프리차아지하므로서, 신뢰성 높고 라이트 리커버리 특성이 우사한 전류센스앰프를 제공할 수 있어서, 전류센싱회로가 특히 라이트 리커버리에 민감하게 반응하는 것을 개설할 뿐만 아니라 쎌 데이타의 액세스를 고속화시키는 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current sense amplifier circuit for presetting a current sense amplifier of a static RAM in a predetermined active operation in a semiconductor memory device. The present invention relates to equalizing both ends of a current sense amplifier for presetting the current sense amplifier. In addition, by precharging a bit line or a data line connected to the current sense amplifier to a predetermined constant voltage level for presetting the current sense amplifier, it is possible to provide a current sense amplifier with high reliability and similar light recovery characteristics. Not only makes it particularly sensitive to write recovery, but also has the effect of speeding up access of the data.

Description

프리세팅회로를 구비하는 전류 센스 앰프 회로Current Sense Amplifier Circuit with Presetting Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 프리세팅회로가 구비된 전류센싱회로.3 is a current sensing circuit having a presetting circuit according to the present invention.

Claims (3)

래치형태의 전류센스앰프를 가지는 전류센싱회로에 있어서, 상기 전류센스앰프의 양단을 소정의 제1동작시 등화시키는 등화회로와, 상기 전류센스 앰프의 입력으로 연결되는 라인을 제2동작시 프리차아지하는 프리차아지 회로로 구성되는 프리세팅회로를 적얻 구비함을 특징으로 하는 전류센스앰프 회로.A current sensing circuit having a latch-type current sense amplifier, comprising: an equalization circuit for equalizing both ends of the current sense amplifier in a first predetermined operation, and a line connected to an input of the current sense amplifier during a second operation. An azigzag current sensing amplifier circuit comprising a presetting circuit composed of a precharge circuit. 제1항에 있어서, 상기 제1동작이 라이트동작임을 특징으로 하는 전류센스앰프 회로.The current sense amplifier circuit of claim 1, wherein the first operation is a write operation. 제2항에 있어서, 상기 제2동작이 데이타의 리드 동작과 프리차아지 동작을 적어도 포함함을 특징으로 하는 전류 센스 앰프 회로.3. The current sense amplifier circuit of claim 2, wherein the second operation comprises at least a read operation of data and a precharge operation. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920018437A 1992-10-08 1992-10-08 Current sense amp circuit with presetting circuit KR950014258B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920018437A KR950014258B1 (en) 1992-10-08 1992-10-08 Current sense amp circuit with presetting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920018437A KR950014258B1 (en) 1992-10-08 1992-10-08 Current sense amp circuit with presetting circuit

Publications (2)

Publication Number Publication Date
KR940010106A true KR940010106A (en) 1994-05-24
KR950014258B1 KR950014258B1 (en) 1995-11-23

Family

ID=19340797

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920018437A KR950014258B1 (en) 1992-10-08 1992-10-08 Current sense amp circuit with presetting circuit

Country Status (1)

Country Link
KR (1) KR950014258B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100508423B1 (en) * 1998-12-30 2005-10-26 주식회사 하이닉스반도체 Recovery circuit of flash memory cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100508423B1 (en) * 1998-12-30 2005-10-26 주식회사 하이닉스반도체 Recovery circuit of flash memory cell

Also Published As

Publication number Publication date
KR950014258B1 (en) 1995-11-23

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