KR970072434A - Method for manufacturing memory cell of nonvolatile memory device - Google Patents
Method for manufacturing memory cell of nonvolatile memory device Download PDFInfo
- Publication number
- KR970072434A KR970072434A KR1019960009678A KR19960009678A KR970072434A KR 970072434 A KR970072434 A KR 970072434A KR 1019960009678 A KR1019960009678 A KR 1019960009678A KR 19960009678 A KR19960009678 A KR 19960009678A KR 970072434 A KR970072434 A KR 970072434A
- Authority
- KR
- South Korea
- Prior art keywords
- film
- forming
- exposed
- oxide film
- conductive film
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims 6
- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 238000005530 etching Methods 0.000 claims abstract 6
- 230000003064 anti-oxidating effect Effects 0.000 claims abstract 5
- 229910021332 silicide Inorganic materials 0.000 claims abstract 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract 5
- 239000000758 substrate Substances 0.000 claims abstract 4
- 239000012535 impurity Substances 0.000 claims abstract 3
- 239000004065 semiconductor Substances 0.000 claims abstract 3
- 230000001590 oxidative effect Effects 0.000 claims abstract 2
- 238000000059 patterning Methods 0.000 claims abstract 2
- 102100032157 Adenylate cyclase type 10 Human genes 0.000 claims 1
- 241000196324 Embryophyta Species 0.000 claims 1
- 101000775498 Homo sapiens Adenylate cyclase type 10 Proteins 0.000 claims 1
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims 1
- 229910021342 tungsten silicide Inorganic materials 0.000 claims 1
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
불휘발성 기억장치의 메모리 셀 제조방법이 개시되어 있다. 본 발명은 제1도전형의 반도체기판의 활성영역상에 터널산화막을 형성하는 단계; 상기 터널산화막의 소정영역 상에 제1도전막으로 이루어진 부유게이트를 형성하는 단계; 상기 결과물 전면에 유전막 및 제2도전막을 차례로 형성하는 단계; 상기 부유게이트 사이의 요부를 채우는 제3산화방지막 패턴을 형성하는 단계; 상기 결과물을 열산화시키어 상기 노출된 제2도전막 표면에 열산화막을 형성하는 단계; 상기 제3산화방지막 패턴을 제거하여 그 아래의 제2도전막을 노출시키는 단계; 상기 열산화막을 식각 마스크로 하여 상기 노출된 제2도전막을 식각함으로써 그 아래의 유전막을 노출시킴과 동시에 제어게이트 전극을 형성하는 단계; 상기 노출된 유전막 아래의 활성영역에 제2도전형의 불순물을 이온 주입하여 소오스/드레인 영역을 형성하는 단계; 상기 결과물 전면에 상기 노출된 유전막 상의 요부를 채우는 산화막을 형성하는 단계; 상기 제어게이트 전극이 노출될 때까지 상기 산화막 및 그 아래의 열산화막을 에치백하여 평탄화하는 단계; 상기 평탄화된 기판 전면에 실리사이드막을 형성하는 단계; 및 상기 실리사이드막을 패터닝하여 워드라인을 형성하는 단계를 포함하는 것을 특징으로 하는 불휘발성 기억장치의 메모리 셀 제조방법을 제공한다. 본 발명에 의하면, 커플링 비율을 증가시킬 수 있는 메모리 셀을 구현할 수 있다.A method of manufacturing a memory cell of a nonvolatile memory device is disclosed. The present invention provides a method of manufacturing a semiconductor device, comprising: forming a tunnel oxide film on an active region of a semiconductor substrate of a first conductivity type; Forming a floating gate made of a first conductive film on a predetermined region of the tunnel oxide film; Sequentially forming a dielectric film and a second conductive film on the entire surface of the resultant product; Forming a third anti-oxidation film pattern filling the recesses between the floating gates; Forming a thermally oxidized film on the exposed second conductive film surface by thermally oxidizing the resultant product; Removing the third anti-oxidation film pattern and exposing the second conductive film below the third anti-oxidation film pattern; Etching the exposed second conductive film using the thermal oxide film as an etching mask to expose the underlying dielectric film and form a control gate electrode; Implanting an impurity of a second conductivity type into the active region under the exposed dielectric layer to form a source / drain region; Forming an oxide film on the entire surface of the resultant to fill recesses on the exposed dielectric film; Etching back the oxide film and the underlying thermal oxide film until the control gate electrode is exposed to planarize; Forming a silicide film on the entire surface of the planarized substrate; And patterning the silicide layer to form a word line. The nonvolatile memory device according to claim 1, According to the present invention, a memory cell capable of increasing a coupling ratio can be realized.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.
제2도는 본 발명에 의한 불휘발성 기억장치의 메모리 셀 제조방법을 설명하기 위한 단면도들이다.FIG. 2 is a cross-sectional view illustrating a method of manufacturing a memory cell of a nonvolatile memory device according to the present invention.
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960009678A KR970072434A (en) | 1996-04-01 | 1996-04-01 | Method for manufacturing memory cell of nonvolatile memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960009678A KR970072434A (en) | 1996-04-01 | 1996-04-01 | Method for manufacturing memory cell of nonvolatile memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR970072434A true KR970072434A (en) | 1997-11-07 |
Family
ID=66222914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960009678A KR970072434A (en) | 1996-04-01 | 1996-04-01 | Method for manufacturing memory cell of nonvolatile memory device |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR970072434A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100415517B1 (en) * | 2000-06-30 | 2004-01-31 | 주식회사 하이닉스반도체 | Method for forming a flash memory device |
| KR100753401B1 (en) * | 2001-06-15 | 2007-08-30 | 주식회사 하이닉스반도체 | Method of manufacturing flash memory device |
-
1996
- 1996-04-01 KR KR1019960009678A patent/KR970072434A/en not_active Application Discontinuation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100415517B1 (en) * | 2000-06-30 | 2004-01-31 | 주식회사 하이닉스반도체 | Method for forming a flash memory device |
| KR100753401B1 (en) * | 2001-06-15 | 2007-08-30 | 주식회사 하이닉스반도체 | Method of manufacturing flash memory device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |