KR970072172A - A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film - Google Patents

A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film Download PDF

Info

Publication number
KR970072172A
KR970072172A KR1019960009677A KR19960009677A KR970072172A KR 970072172 A KR970072172 A KR 970072172A KR 1019960009677 A KR1019960009677 A KR 1019960009677A KR 19960009677 A KR19960009677 A KR 19960009677A KR 970072172 A KR970072172 A KR 970072172A
Authority
KR
South Korea
Prior art keywords
material layer
oxide film
gate oxide
forming
film
Prior art date
Application number
KR1019960009677A
Other languages
Korean (ko)
Inventor
김종한
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960009677A priority Critical patent/KR970072172A/en
Publication of KR970072172A publication Critical patent/KR970072172A/en

Links

Abstract

게이트 절연막으로 확산방지막을 사용하는 반도체장치의 제조방법이 개시되어 있다. 본 발명은 반도체기판상에 게이트 산화막을 형성하는 단계, 상기 게이트 산화막이 형성된 기판 전면에 제1물질층을 형성하는 단계, 및 상기 제1물질층을 도우핑시킨 후 이를 패터닝하여 게이트 전극을 형성하는 단계를 구비하는 반도체장치의 제조방법에 있어서, 상기 제1물질층을 형성하는 단계 이후에, 상기 게이트 산화막과 인접하는 상기 제1물질층의 하단부에 최대 농도를 갖도록 질소 이온을 주입하는 단계; 및 상기 결과물을 열처리하여 상기 질소 이온을 확산시킴으로써, 상기 게이트 산화막을 확산방지막으로 변형시키는 단계를 더 구비하는 것을 특징으로 하는 반도체장치의 제조방법을 제공한다. 본 발명에 의하면, 누설전류 및 내압 특성이 우수한 게이트 절연막을 형성할 수 있어 트랜지스터 특성을 개선시킬 수 있다.A method of manufacturing a semiconductor device using a diffusion prevention film as a gate insulating film is disclosed. The present invention provides a method of manufacturing a semiconductor device, comprising: forming a gate oxide film on a semiconductor substrate; forming a first material layer on the entire surface of the substrate on which the gate oxide film is formed; and dipping and patterning the first material layer to form a gate electrode Implanting nitrogen ions so as to have a maximum concentration at a lower end of the first material layer adjacent to the gate oxide film after forming the first material layer; And annealing the resultant to diffuse the nitrogen ions, thereby transforming the gate oxide film into a diffusion prevention film. According to the present invention, a gate insulating film having excellent leakage current and withstand voltage characteristics can be formed, and the transistor characteristics can be improved.

Description

게이트 절연막으로 확산방지막을 사용하는 반도체장치의 제조방법A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제1도 내지 제3도는 본 발명에 의한 반도체장치의 제조방법을 설명하기 위한 단면도들이다.FIGS. 1 to 3 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the present invention.

Claims (3)

반도체기판 상에 게이트 산화막을 형성하는 단계, 상기 게이트 산화막이 형성된 기판 전면에 제1물질층을 형성하는 단계, 및 상기 제1물질층을 도우핑시킨 후 이를 패터닝하여 게이트 전극을 형성하는 단계를 구비하는 반도체장치의 제조방법에 있어서, 상기 제1물질층을 형성하는 단계 이후에, 상기 게이트 산화막과 인접하는 상기 제1물질층의 하단부에 최대 농도를 갖도록 질소 이온을 주입하는 단계; 및 상기 결과물을 열처리하여 상기 질소 이온을 확산시킴으로서, 상기 게이트 산화막을 확산방지막으로 변형시키는 단계를 더 구비하는 것을 특징으로 하는 반도체장치의 제조방법.Forming a gate oxide film on the semiconductor substrate, forming a first material layer on the entire surface of the substrate on which the gate oxide film is formed, and forming a gate electrode by doping the first material layer and patterning the first material layer The method comprising the steps of: injecting nitrogen ions so as to have a maximum concentration at a lower end of the first material layer adjacent to the gate oxide film, after forming the first material layer; And annealing the resultant to diffuse the nitrogen ions, thereby deforming the gate oxide film into a diffusion barrier film. 제1항에 있어서, 상기 질소이온은 N2O, NO, 및 NH3가스로 이루어진 일 군중 선택된 어느 하나를 사용하여 이온주입하는 것을 특징으로 하는 반도체장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the nitrogen ions are implanted using any one selected from the group consisting of N 2 O, NO, and NH 3 gases. 제1항에 있어서, 상기 확산방지막은 옥시나이트라이드막(oxynitride)인 것을 특징으로 하는 반도체장치의 제조방법.The method of claim 1, wherein the diffusion barrier layer is an oxynitride layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960009677A 1996-04-01 1996-04-01 A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film KR970072172A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960009677A KR970072172A (en) 1996-04-01 1996-04-01 A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960009677A KR970072172A (en) 1996-04-01 1996-04-01 A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film

Publications (1)

Publication Number Publication Date
KR970072172A true KR970072172A (en) 1997-11-07

Family

ID=66222883

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960009677A KR970072172A (en) 1996-04-01 1996-04-01 A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film

Country Status (1)

Country Link
KR (1) KR970072172A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100731070B1 (en) * 2005-12-28 2007-06-22 동부일렉트로닉스 주식회사 Method for fabricating gate electrode of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100731070B1 (en) * 2005-12-28 2007-06-22 동부일렉트로닉스 주식회사 Method for fabricating gate electrode of semiconductor device

Similar Documents

Publication Publication Date Title
KR970013412A (en) Manufacturing method of semiconductor device
KR950010065A (en) Semiconductor device and manufacturing method thereof
US6300207B1 (en) Depleted sidewall-poly LDD transistor
KR950034796A (en) Nonvolatile Memory Device and Manufacturing Method Thereof
KR970008500A (en) Polycrystalline Silicon Thin Film Transistor and Manufacturing Method Thereof
KR970077399A (en) Semiconductor component with compensation injection and manufacturing method thereof
KR970072172A (en) A method of manufacturing a semiconductor device using a diffusion barrier film as a gate insulating film
KR970030676A (en) Semiconductor device and manufacturing method thereof
JP2860482B2 (en) Method for manufacturing semiconductor device
KR900001023A (en) EPROM cell and its manufacturing method using trench isolation
KR940005291B1 (en) Manufacturing method of semiconductor device using an impurity segregation phenomenon
JPH0338839A (en) Manufacture of semiconductor device
KR910001876A (en) Semiconductor device manufacturing method
KR20000028675A (en) Method to create a depleted poly mosfet
JPH0346272A (en) Manufacture of semiconductor device
KR940016961A (en) MOS transistor and its manufacturing method
KR980005874A (en) Method for manufacturing surface channel type P channel MOS transistor while suppressing P type impurity penetration
KR930005272A (en) LDD type MOS transistor and manufacturing method thereof
KR930003295A (en) Structure and Manufacturing Method of Semiconductor Device
KR970013417A (en) Semiconductor device with self-aligned field injection and method of manufacturing the same
KR950012717A (en) Semiconductor device manufacturing method
KR970077739A (en) Power transistor with raised inner ring and method of manufacturing the same
KR940004711A (en) Polysilicon Layer Formation Method
KR970077222A (en) Manufacturing method of semiconductor device
KR980005881A (en) Method of manufacturing semiconductor device

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination