KR970058005A - TV Encoder Device using General Memory - Google Patents

TV Encoder Device using General Memory Download PDF

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Publication number
KR970058005A
KR970058005A KR1019950067192A KR19950067192A KR970058005A KR 970058005 A KR970058005 A KR 970058005A KR 1019950067192 A KR1019950067192 A KR 1019950067192A KR 19950067192 A KR19950067192 A KR 19950067192A KR 970058005 A KR970058005 A KR 970058005A
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KR
South Korea
Prior art keywords
memory
image data
unit
encoder
converting
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KR1019950067192A
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Korean (ko)
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KR100217253B1 (en
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김성수
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구자홍
Lg 전자주식회사
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Priority to KR1019950067192A priority Critical patent/KR100217253B1/en
Publication of KR970058005A publication Critical patent/KR970058005A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • H04N5/775Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/64Circuits for processing colour signals
    • H04N9/74Circuits for processing colour signals for obtaining special effects
    • H04N9/76Circuits for processing colour signals for obtaining special effects for mixing of colour signals
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S348/00Television
    • Y10S348/91Flicker reduction

Abstract

본 발명은 일반 메모리를 사용한 TV 엔코더 장치에 관한 것으로서, 종래에는 PC 주사방식이 넌 인터래이스 방식으로 한 프레임에 다수 라인으로 구성되어 있고, NTSC방식의 TV에서의 주사방식은 상기 PC라인의 주사방식에 1/2인 프레임 라인으로 구성되어 있으므로서, 상기 PC의 주사방식이 TV의 주사방식보다 약 2배 정도 빠르기 때문에 화상테이타 처리용 라인 메모리의 용량은 PC의 해상도에 따라 PC의 영상데이타가 변환되는 것을 감안하여 일정해상도(640*480)의 경우, 한 라인용으로 최소한 일정바이트(640Byte)가 필요하게 되었다. 즉, 상기 PC에서 출력시킨 영상데이타를 저장한후, TV로 전송시키기 위해서는 일정바이트(640 Byte)를 지닌 화상데이타 처리용 라인 메모리를 2개 구성해야 하므로서, 가격적으로 제품의 상승 원인을 제공하게 되며, 이에 따라 에이에스아이씨(ASIC)에 적용할 경우, 제품의 크기가 커지는 문제점이 있었다. 따라서, 본 발명은 이와같은 문제점을 해결하기 위해 TV의 엔코더에서 PC의 영상정보를 저장시키는 메모리를 단일 메모리로 구성시키므로서, PC에서 넌 인터래이스 방식의 VGA 출력을 TV의 복합영상신호로 출력시킬수 있도록 하여 TV 엔코더 보드 및 TV 엔코드 에이에스아이씨(ASIC)의 제작에 있어 원가절감을 이룰수 있도록 하는 일반 메모리를 사용한 티브이 엔코더(TV Encoder)장치이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TV encoder device using a general memory. Conventionally, a PC scanning method is composed of a plurality of lines in one frame using a non-interlace method, and a scanning method in an NTSC system TV is a scanning of the PC line. Since the scanning method of the PC is about twice as fast as that of the TV, the capacity of the line memory for image data processing depends on the resolution of the PC. In consideration of the conversion, for a constant resolution (640 * 480), at least a constant byte (640 bytes) is required for one line. That is, in order to store the image data output from the PC and transmit the image data to the TV, two line memory for image data processing having a predetermined byte (640 byte) must be configured, thereby providing a cause of the product increase in price. Therefore, when applied to the ASIC (ASIC), there was a problem that the size of the product increases. Therefore, in order to solve such a problem, the present invention configures a memory for storing image information of a PC in a TV encoder as a single memory, thereby outputting a non-interlaced VGA output from the PC as a composite video signal of the TV. It is a TV Encoder device using general memory that enables cost reduction in the production of TV Encoder Board and TV Encoder ASIC.

Description

일반 메모리를 사용한 티브이 엔코더(TV Encoder)장치TV Encoder Device using General Memory

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제5도는 본 발명 일반 메모리를 사용한 TV 엔코더 장치의 구조를 보인 블럭도,5 is a block diagram showing the structure of a TV encoder device using the general memory of the present invention;

제4도의 (A) ~ (Q)는 본 발명 일반 메모리를 사용한 TV 엔코더 장치에 의해 발생되는 각부 출력 파형도.4A to 4Q are diagrams of output waveforms of each part generated by the TV encoder device using the general memory of the present invention.

Claims (4)

다수 라인의 PC 영상데이타와 이에 따른 일정클럭신호 및 수직/수평 동기신호와 블랭크신호를 출력시키는 VGA제어부(11)와, 상기 VGA제어부(11)에서 출력된 다수 라인의 PC 영상테이타를 저장시키는 저장수단(12)과, 상기 저장수단(12)의 라이트/리드 동작을 제어하는 메모리 제어부(13)와, VGA제어부(11)에서 출력된 수직/수평 동기신호와 블랭크신호 및 상기 메모리 제어부(13)에서의 라이트/리드 동작에 따라 시스템을 제어하는 제어부(14)와, 메모리 제어부(13)에 의해 라이트/리드 제어된 상기 저장수단(12)의 다수 라인의 영상데이타를 넌 인터래이스 방식에 따라 일정 RGB신호로 변환시킨 후, 이를 아날로그로 변환하여 출력시키는 변화수단(15)과, 상기 변환수단(15)에 의해 아날로그로 변환되어 출력된 일정 RGB신호를 믹싱하여 출력시키는 믹싱부(16)와, 상기 믹싱부(16)에 의해 믹싱된 일정 RGB신호를 엔코딩하여 복합영상신호를 TV로 출력시키는 엔티에스씨(NTSC)엔코더부(17)로 구성된 일반 메모리를 사용한 티브이 엔코드(TV Encoder)장치.A VGA controller 11 for outputting a plurality of lines of PC image data, a constant clock signal, a vertical / horizontal synchronization signal, and a blank signal, and storing the PC image data of a plurality of lines output from the VGA controller 11. Means 12, a memory controller 13 for controlling the write / read operation of the storage means 12, a vertical / horizontal sync signal and a blank signal output from the VGA controller 11, and the memory controller 13 Image data of a plurality of lines of the control unit 14 for controlling the system according to the write / read operation in the storage unit and the storage unit 12 that is write / read controlled by the memory control unit 13 according to the non-interlace method. A converting means (15) for converting a predetermined RGB signal and converting it into an analog and outputting the same; a mixing unit (16) for mixing and outputting a predetermined RGB signal converted and outputted by the converting means (15) to analog; Mixing 16, the predetermined entity to the RGB signal encoding seed S to output a composite video signal to a TV (NTSC) encoder unit 17 is encoded television (TV Encoder) using a general memory device consisting of a mixing by. 제1항에 있어서, 저장수단(12)은 입력되는 일정 클럭신호 및 메모리 제어부(13)의 라이트/리드 제어에 따라 VGA제어부(11)에서 출력시킨 일정라인(n, n+4, n+8, …: n=1)의 영상데이타를 저장시키는 제1마스터 라인 메모리부(18)와, 상기 메모리 제어부(13)의 아리트/리드 제어에 따라 상기 제1마스터 라인 메모리부(18)의 다음 수순에 의한 일정라인(n+2, n+6, n+10, …: n=1)의 영상데이타를 저장시키는 제2마스터 라인 메모리부(19)와, 입력되는 일정 클럭신호 및 메모리 제어부(13)의 라이트/리드 제어에 따라 상기 제1 및 제2마스터 라인 메모리부(18)(19)에 저장된 일정라인 (n, n+4, n+8, …: n=1) (n+2, n+6, n+10, …: n=1)의 영상데이타에서 발생되는 플리커현상을 방지시키도록 근접되는 라인(n+1, n+5, n+9, …: n=1) (n+3, n+7, n+11, …: n=1)의 영상데이타를 저장시키는 제1 및 제2슬라이브 라이 메모리부(20)(21)로 구성된 것으 특징으로 하는 일반 메모리를 사용한 티브이 엔코드(TV Encoder)장치.The storage unit 12 according to claim 1, wherein the storage unit 12 outputs a predetermined line (n, n + 4, n + 8) output from the VGA controller 11 according to the input clock signal and the write / read control of the memory control unit 13. , ...: a first master line memory unit 18 for storing image data of n = 1), and next to the first master line memory unit 18 in accordance with the elite / lead control of the memory control unit 13; A second master line memory unit 19 for storing image data of a predetermined line (n + 2, n + 6, n + 10, ...: n = 1) according to a procedure, an input constant clock signal and a memory controller ( A predetermined line (n, n + 4, n + 8, ...: n = 1) stored in the first and second master line memory sections 18 and 19 according to the write / lead control of 13) (n + 2) (n + 1, n + 5, n + 9,…: n = 1) (n + 6, n + 10,…: n = 1) n + 3, n + 7, n + 11, ...: first and second slaves for storing image data of n = 1) TV encoding (TV Encoder) device using a general memory of geoteu features consisting of the memory unit 20 (21). 제1항에 있어서, 변환수단(15)은 메모리 제어부(13)에서 출력시킨 일정라인(n, n+4, n+8, …: n=1)(n+2, n+6, n+10, …: n=1)의 영상데이타를 넌 인터래이스 방식에 따라 일정 RGB신호로 변환시킨 후, 이를 아날로그 변환하여 믹싱부(16)에 출력시키는 제1램 D/A 변환부(22)와, 상기 메모리 제어부(13)에서 출력시킨 근접되는 라인(n+1, n+5, n+9…: n=1)(n+3, n+7, n+11, …: n=1)의 영상테이타를 넌 인터래이스 방식에 따라 일정 RGB신호로 변환시킨 후, 이를 아날로그 변환하여 믹싱부(16)에 출력시키는 제2램 D/A 변환부(23)로 구성된 것을 특징으로 하는 일반 메모리를 사용한 티브이 엔코드(TV Encoder)장치.2. The converting means (15) according to claim 1, wherein the converting means (15) is a constant line (n, n + 4, n + 8, ...: n = 1) output from the memory control section (13) (n + 2, n + 6, n +). 10, ...: first RAM D / A converter 22 for converting the image data of n = 1) into a predetermined RGB signal according to a non-interlace method, and then converting the analog data to the mixing unit 16 for analog conversion. And adjacent lines (n + 1, n + 5, n + 9…: n = 1) output from the memory control unit 13 (n + 3, n + 7, n + 11,…: n = 1 A second RAM D / A converter 23 for converting the image data of the < RTI ID = 0.0 >) < / RTI > TV Encoder device using memory. 제2항에 있어서, 저장수단(12)에 구성된 각 메모리부(18)(19)(20)(21)의 라이트/리드 및 저장 동작 상태를 단이 포트 메모리인 SRAM 또는 DRAM틔 특성을 이용한 것을 특징으로 하는 일반 메모리를 사용한 티브이 엔코드(TV Encoder)장치.3. The write / read and storage operation states of the memory units 18, 19, 20, and 21 configured in the storage means 12 use the SRAM or DRAM 'characteristics of the port memory. A TV Encoder device using a general memory. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950067192A 1995-12-29 1995-12-29 The encoding apparatus using general memory KR100217253B1 (en)

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KR1019950067192A KR100217253B1 (en) 1995-12-29 1995-12-29 The encoding apparatus using general memory

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KR1019950067192A KR100217253B1 (en) 1995-12-29 1995-12-29 The encoding apparatus using general memory

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KR970058005A true KR970058005A (en) 1997-07-31
KR100217253B1 KR100217253B1 (en) 1999-09-01

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