KR970057927A - Blocking effect prevention circuit of image processing device - Google Patents

Blocking effect prevention circuit of image processing device Download PDF

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Publication number
KR970057927A
KR970057927A KR1019950055664A KR19950055664A KR970057927A KR 970057927 A KR970057927 A KR 970057927A KR 1019950055664 A KR1019950055664 A KR 1019950055664A KR 19950055664 A KR19950055664 A KR 19950055664A KR 970057927 A KR970057927 A KR 970057927A
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South Korea
Prior art keywords
pixels
detector
average value
value
input block
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KR1019950055664A
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Korean (ko)
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KR100196830B1 (en
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윤성욱
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배순훈
대우전자 주식회사
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Publication of KR970057927A publication Critical patent/KR970057927A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
    • H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/136—Incoming video signal characteristics or properties
    • H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

본 발명은 영상 신호를 블럭 단위로 처리하는 영상 처리장치에 관한 것으로서, 프레임 단위의 영상 신호가 저장되어 있으며, 입력되는 블럭 영상 신호(B1)와 인접하여 형성되는 경계블럭(B2-B5)들의 영상 신호들을 출력하는 프레임 메모리(1)와; 상기 입력 블럭(B1)내 화소들의 평균값을 검출하는 제1검출부(2)와; 상기 경계 블럭(B2-B5)들내 화소들의 평균값을 검출하는 제2검출부(3)와; 상기 제1검출부(2)의 평균값과 상기 제2검출부(3)의 평균값의 차값을 검출하는 제3검출부(4)와; 상기 제3검출부(4)의 차값이 소정값 이상이면 구동 신호를 출력하는 비교부(5)와; 상기 구동 신호에 따라구동하며 상기 입력 블럭(B1)의 가장 자리를 형성하는 화소(Px)들과, 상기 화소(Px)들과 이웃하는 상기 경계 블럭(B2-B5)의 가장 자리를 형성하는 화소(Py)들의 가중화된 평균값을 검출하여 상기 화소별로 검출된 상기 입력 블럭(B1)의 가장자리를 형성하는 화소값(Pz)으로 대치하여 출력하는 필터(6)를 구비한다.The present invention relates to an image processing apparatus for processing an image signal in units of blocks, wherein an image signal in a frame unit is stored, and images of boundary blocks (B2-B5) formed adjacent to an input block image signal (B1). A frame memory 1 for outputting signals; A first detector (2) for detecting an average value of the pixels in the input block (B1); A second detector (3) for detecting an average value of the pixels in the boundary blocks (B2-B5); A third detector (4) for detecting a difference between the average value of the first detector (2) and the average value of the second detector (3); A comparator 5 for outputting a drive signal when the difference value of the third detector 4 is equal to or greater than a predetermined value; Pixels Px driving the driving signal and forming edges of the input block B1, and pixels forming edges of the boundary blocks B2-B5 adjacent to the pixels Px. And a filter 6 which detects the weighted average value of the Py and replaces and outputs the pixel value Pz forming the edge of the input block B1 detected for each pixel.

즉, 본 발명은 블럭킹 효과가 큰 블럭에 대하여는 그 블럭의 가장자리 화소들을 이웃 화소들로서 평균하여 그 평균값으로 대치하므로써 블럭킹 효과를 방지할 수 있는 효과가 있다.That is, according to the present invention, a block having a large blocking effect can be prevented by averaging the edge pixels of the block as neighboring pixels and replacing the average with the average value.

Description

영상 처리 장치의 블럭킹 효과 방지 회로Blocking effect prevention circuit of image processing device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 영상 처리 장치의 블럭킹 효과 방지 회로의 블럭도.1 is a block diagram of a blocking effect prevention circuit of an image processing apparatus according to the present invention.

제2도는 본 발명에 따른 영상 처리 장치의 블럭킹 효과 방지 회로에 형성되는 블럭의 상태도.2 is a state diagram of blocks formed in the blocking effect preventing circuit of the image processing apparatus according to the present invention.

Claims (2)

영상 신호를 블럭 단위로 처리하는 영상 처리 장치로서, 프레임 단위의 영상 신호가 저장되어 있으며, 입력되는 블럭 영상 신호(B1)와 인접하여 형성되는 경계 블럭(B2-B5)들의 영상 신호들을 출력하는 프레임 메모리(1)와; 상기 입력 블럭(B1)내 화소들의 평균값을 검출하는 제1검출부(2)와; 상기 경계 블럭(B2-B5)들내 화소들의 평균값을 검출하는 제2검출부(3)와; 상기 제1검출부(2)의 평균값과 상기 제2검출부(3)의 평균값의 차값을 검출하는 제3검출부(4)와; 상기 제3검출부(4)의 차값이 소정값 이상이면 구동 신호를 출력하는 비교부(5)와; 상기 구동 신호에 따라 구동하며 상기 입력 블럭(B1)의 가장자리를 형성하는 화소(Px)들과, 상기 화소(Px)들과 이웃하는 상기 경계 블럭(B2-B5)의 가장자리를 형성하는 화소(Py)들의 가중화된 평균값을 검출하여 상기 화소별로 검출된 상기 입력 블럭(B1)의 가장 자리를 형성하는 화소 값(Px)으로 대치하여 출력하는 필터(6)를 구비하는 영상 처리 장치의 블럭킹 효과 방지 회로.An image processing apparatus for processing an image signal in units of blocks, the frame storing an image signal of a frame unit and outputting image signals of boundary blocks B2-B5 formed adjacent to the input block image signal B1. A memory 1; A first detector (2) for detecting an average value of the pixels in the input block (B1); A second detector (3) for detecting an average value of the pixels in the boundary blocks (B2-B5); A third detector (4) for detecting a difference between the average value of the first detector (2) and the average value of the second detector (3); A comparator 5 for outputting a drive signal when the difference value of the third detector 4 is equal to or greater than a predetermined value; Pixels Px driving in response to the driving signal and forming edges of the input block B1 and pixels Py forming edges of the boundary blocks B2-B5 adjacent to the pixels Px. Prevention of the blocking effect of the image processing apparatus having the filter 6 which detects the weighted average value of the pixels and replaces the pixel value Px forming the edge of the input block B1 detected for each pixel. Circuit. 제1항에 있어서, 상기 가중화된 평균값은, 대치 화소 값(Pz)=0.6×(블럭(B1) 가장자리 화소값(Px))+0.4×Py(화소(Px)와 이웃하는 블럭(B2-B5)의 화소값(Py))로 산출하는 영상 처리 장치의 블럭킹 효과 방지 회로.The block value of claim 1, wherein the weighted average value is a substitute pixel value Pz = 0.6 × (block B1 edge pixel value Px) + 0.4 × Py (a block B2- neighboring the pixel Px). The blocking effect prevention circuit of the image processing apparatus computed by the pixel value Py) of B5). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950055664A 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor KR100196830B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950055664A KR100196830B1 (en) 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor

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Application Number Priority Date Filing Date Title
KR1019950055664A KR100196830B1 (en) 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor

Publications (2)

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KR970057927A true KR970057927A (en) 1997-07-31
KR100196830B1 KR100196830B1 (en) 1999-06-15

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