KR970057928A - Blocking effect prevention circuit of video signal processing device - Google Patents

Blocking effect prevention circuit of video signal processing device Download PDF

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Publication number
KR970057928A
KR970057928A KR1019950055665A KR19950055665A KR970057928A KR 970057928 A KR970057928 A KR 970057928A KR 1019950055665 A KR1019950055665 A KR 1019950055665A KR 19950055665 A KR19950055665 A KR 19950055665A KR 970057928 A KR970057928 A KR 970057928A
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KR
South Korea
Prior art keywords
value
detector
dct
block
detecting
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KR1019950055665A
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Korean (ko)
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KR100196831B1 (en
Inventor
윤성욱
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배순훈
대우전자 주식회사
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Priority to KR1019950055665A priority Critical patent/KR100196831B1/en
Publication of KR970057928A publication Critical patent/KR970057928A/en
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Publication of KR100196831B1 publication Critical patent/KR100196831B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
    • H04N19/86Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/117Filters, e.g. for pre-processing or post-processing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/136Incoming video signal characteristics or properties
    • H04N19/137Motion inside a coding unit, e.g. average field, frame or block difference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/625Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding using discrete cosine transform [DCT]

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Discrete Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Studio Circuits (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

본 발명은 영상 신호를 소정 크기의 DCT 블록 단위로 처리하는 영상 처리 장치에 관한 것으로서, 프레임 단위의 DCT 계수가 저장되어 있으며, 입력되는 블록 단위의 영상 신호와 인접하여 형성되는 경계 블록들의 DCT 계수신호 등을 출력하는 프레임 메모리(1)와; 상기 입력 블록내 DCT 계수들의 DC 값을 검출하는 제1검출부(2)와; 상기 경계 블록들내 DCT 계수들의 DC 값의 평균값을 검출하는 제2검출부(3)와; 상기 제1검출부(1)의 DC 값과의 상기 제2검출부(3)의 평균값의 차값을 검출하는 제3검출부(4)와; 상기 제3 검출부(4)의 차값이 소정값 이상이면 구동 신호를 출력하는 비교부(5)와; 상기 구동 신호에 따라 구동하며 상기 입력 DCT 블록의 DC 값을 상기 제2 검출부(3)의 평균값으로 대치하여 출력하는 필터(6)를 구비한다.The present invention relates to an image processing apparatus for processing an image signal in units of a DCT block having a predetermined size, wherein a DCT coefficient in a frame unit is stored, and DCT coefficient signals of boundary blocks formed adjacent to an image signal in an input block unit. A frame memory 1 for outputting the back and the like; A first detector (2) for detecting a DC value of the DCT coefficients in the input block; A second detector (3) for detecting an average value of DC values of DCT coefficients in the boundary blocks; A third detector (4) for detecting a difference value of the average value of the second detector (3) from the DC value of the first detector (1); A comparator 5 for outputting a drive signal when the difference value of the third detector 4 is equal to or greater than a predetermined value; And a filter 6 for driving in accordance with the drive signal and for outputting the DC value of the input DCT block by substituting the average value of the second detector 3.

즉, 본 발명은 블록킹 효과가 큰 블록에 대하여는 그 블록의 DCT 계수의 DC 값을 이웃 DCT 블록의 DC 값의 평균값으로 대치하므로써 블록킹 효과를 방지할 수 있다.That is, the present invention can prevent the blocking effect by replacing the DC value of the DCT coefficient of the block with the average value of the DC value of the neighboring DCT block for the block having a large blocking effect.

Description

영상 신호 처리 장치의 블록킹 효과 방지 회로Blocking effect prevention circuit of video signal processing device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 영상 처리 장치의 블록킹 효과 방지 회로의 블록도.1 is a block diagram of a blocking effect prevention circuit of an image processing apparatus according to the present invention.

제2도는 본 발명에 따른 영상 처리 장치의 블록킹 효과 방지 회로에 형성되는 블록의 상태도.2 is a state diagram of a block formed in the blocking effect prevention circuit of the image processing apparatus according to the present invention.

Claims (1)

영상 신호를 소정 크기의 DCT 블록 단위로 처리하는 영상 처리 장치로서, 프레임 단위의 DCT 계수가 저장되어 있으며, 입력되는 블록 단위의 영상 신호와 인접하여 형성되는 경계 블록들의 DCT 계수 신호들을 출력하는 프레임 메모리(1)와; 상기 입력 블록내 DCT 계수들의 DC 값을 검출하는 제1검출부(2)와; 상기 경계 블록들 내 DCT 계수들의 DC 값의 평균값을 검출하는 제2검출부(3)와; 상기 제1검출부(1)의 DC 값과 상기 제2검출부(3)의 평균값의 차값을 검출하는 제3검출부(4)와; 상기 제3검출부(4)의 차값이 소정값 이상이면 구동 신호를 출력하는 비교부(5)와; 상기 구동 신호에 따라 구동하며 상기 입력 DCT 블록의 DC 값을 상기 제2검출부(3)의 평균값으로 대치하여 출력하는 필터(6)를 구비하는 영상 처리 장치의 블록킹 효과 방지 회로.An image processing apparatus for processing an image signal in units of DCT blocks having a predetermined size, wherein the frame memory stores DCT coefficients in units of frames and outputs DCT coefficient signals of boundary blocks formed adjacent to the input image unit in blocks. (1); A first detector (2) for detecting a DC value of the DCT coefficients in the input block; A second detector (3) for detecting an average value of DC values of DCT coefficients in the boundary blocks; A third detector (4) for detecting a difference value between the DC value of the first detector (1) and the average value of the second detector (3); A comparator 5 for outputting a drive signal when the difference value of the third detector 4 is equal to or greater than a predetermined value; And a filter (6) for driving in response to the driving signal and for outputting by replacing the DC value of the input DCT block with an average value of the second detector (3). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950055665A 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor KR100196831B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950055665A KR100196831B1 (en) 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950055665A KR100196831B1 (en) 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor

Publications (2)

Publication Number Publication Date
KR970057928A true KR970057928A (en) 1997-07-31
KR100196831B1 KR100196831B1 (en) 1999-06-15

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KR1019950055665A KR100196831B1 (en) 1995-12-23 1995-12-23 Circuit for preventing blocking effect in image processor

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100413979B1 (en) * 1996-07-15 2004-05-20 주식회사 팬택앤큐리텔 Predictive coding method and device thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100413979B1 (en) * 1996-07-15 2004-05-20 주식회사 팬택앤큐리텔 Predictive coding method and device thereof

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KR100196831B1 (en) 1999-06-15

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