KR970056089A - Test device for PCM data path access and processor bus matching - Google Patents
Test device for PCM data path access and processor bus matching Download PDFInfo
- Publication number
- KR970056089A KR970056089A KR1019950053610A KR19950053610A KR970056089A KR 970056089 A KR970056089 A KR 970056089A KR 1019950053610 A KR1019950053610 A KR 1019950053610A KR 19950053610 A KR19950053610 A KR 19950053610A KR 970056089 A KR970056089 A KR 970056089A
- Authority
- KR
- South Korea
- Prior art keywords
- pcm
- subscriber board
- matching means
- board block
- test
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/0082—Monitoring; Testing using service channels; using auxiliary channels
- H04B17/0085—Monitoring; Testing using service channels; using auxiliary channels using test signal generators
Abstract
본 발명은 PCM 방식에 의해 변조된 신호를 입출력하는 기능을 가지는 장치(이하, PCM 입출력 장치라 한다) 내의 PCM 정합부와 일반 전화기 등에 접속된 전화교환기의 가입자보드 블록 사이에 접속되어, 일반 전화기 등을 통하여 상기 PCM 입출력 장치의 정상동작을 용이하게 확인할 수 있는 시험장치에 관한 것이다.The present invention is connected between a PCM matching unit in a device having a function of inputting / outputting a signal modulated by a PCM method (hereinafter referred to as a PCM input / output device) and a subscriber board block of a telephone exchanger connected to a general telephone or the like. It relates to a test apparatus that can easily check the normal operation of the PCM input and output device through.
본 발명은, 펄스 코드 변조(PCM) 정합수단 및 시험용 PCM 클럭 발생부를 포함하는 시험받는 장치의 PCM 정합수단과, 다수의 전화기가 연결되며 가입자 보드 제어부에 의해 제어되는 상용 가입자 보드 블록과 접속되며; 상기 시험받는 장치의 PCM 정합수단과 상기 가입자 보드 블록이 정합되도록, 전기적 신호 규격을 맞추어 주는 기능을 하는 것을 특징으로 한다.The present invention relates to a PCM matching means of a device under test including a pulse code modulation (PCM) matching means and a test PCM clock generator, and a plurality of telephones connected to a commercial subscriber board block connected to and controlled by a subscriber board controller; It is characterized in that it serves to match the electrical signal specifications, so that the PCM matching means and the subscriber board block of the device under test.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3도는 본 발명에 따른 시험장치의 구성도.3 is a block diagram of a test apparatus according to the present invention.
제4도는 PCM 경로의 다중채널 데이터 병행처리장치의 시험장치 구성도.4 is a configuration diagram of a test apparatus for a multi-channel data parallel processing apparatus of a PCM path.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950053610A KR100205048B1 (en) | 1995-12-21 | 1995-12-21 | Test jig for pcm data path and process bus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950053610A KR100205048B1 (en) | 1995-12-21 | 1995-12-21 | Test jig for pcm data path and process bus |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970056089A true KR970056089A (en) | 1997-07-31 |
KR100205048B1 KR100205048B1 (en) | 1999-06-15 |
Family
ID=19442499
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950053610A KR100205048B1 (en) | 1995-12-21 | 1995-12-21 | Test jig for pcm data path and process bus |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100205048B1 (en) |
-
1995
- 1995-12-21 KR KR1019950053610A patent/KR100205048B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100205048B1 (en) | 1999-06-15 |
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