KR970055248A - FM Detection Circuit Using Voltage Controlled Oscillator with Parallel Current Sink Structure - Google Patents
FM Detection Circuit Using Voltage Controlled Oscillator with Parallel Current Sink Structure Download PDFInfo
- Publication number
- KR970055248A KR970055248A KR1019950069729A KR19950069729A KR970055248A KR 970055248 A KR970055248 A KR 970055248A KR 1019950069729 A KR1019950069729 A KR 1019950069729A KR 19950069729 A KR19950069729 A KR 19950069729A KR 970055248 A KR970055248 A KR 970055248A
- Authority
- KR
- South Korea
- Prior art keywords
- detection circuit
- signal
- voltage
- voltage controlled
- current sink
- Prior art date
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 11
- 238000001914 filtration Methods 0.000 claims abstract 7
- 230000010355 oscillation Effects 0.000 claims abstract 6
- 238000007796 conventional method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
- H03D3/22—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by means of active elements with more than two electrodes to which two signals are applied derived from the signal to be demodulated and having a phase difference related to the frequency deviation, e.g. phase detector
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0001—Circuit elements of demodulators
- H03D2200/0039—Exclusive OR logic circuits
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PLL 방식의 FM 검파회로를 공개한다. 그 검파회로는 입력 신호와 소정 발진 주파수 신호를 배타 논리합연산함에 의해 위상 검출하는 위상 검출수단; 상기 위상 검출수단의 출력신호를 로우패스 필터링하는 필터링수단; 및 상기 필터링수단의 출력전압과 소정 기준 전압에 따라 상기 소정 발진 주파수 신호를 발생하는 전압제어 발진수단을 구비한 것을 특징으로 한다. 본 발명에 의하면, 기존 방식에 비하여 큰 레벨의 출력신호를 얻을수 있으므로 신호대 잡음비의 개선이 가능하며, 특정 레벨의 신호가 요구되는 경우에도 별도의 증폭기를 사용하지 않고 검출 출력을 바로 사용할 수 있는 잇점이 있다.PLL FM detection circuit is disclosed. The detection circuit includes phase detection means for detecting a phase by performing an exclusive logic operation on an input signal and a predetermined oscillation frequency signal; Filtering means for low pass filtering the output signal of the phase detection means; And a voltage controlled oscillation means for generating the predetermined oscillation frequency signal according to the output voltage of the filtering means and a predetermined reference voltage. According to the present invention, it is possible to improve the signal-to-noise ratio because a larger level of output signal can be obtained than the conventional method, and even when a signal of a specific level is required, the detection output can be used directly without using a separate amplifier. have.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제3도는 본 발명에 따른 PLL 방식의 FM 검파회로를 설명하기 위한 도면이다.3 is a view for explaining the PLL FM detection circuit according to the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069729A KR0183809B1 (en) | 1995-12-30 | 1995-12-30 | Fm detector circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069729A KR0183809B1 (en) | 1995-12-30 | 1995-12-30 | Fm detector circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970055248A true KR970055248A (en) | 1997-07-31 |
KR0183809B1 KR0183809B1 (en) | 1999-04-15 |
Family
ID=19448556
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950069729A KR0183809B1 (en) | 1995-12-30 | 1995-12-30 | Fm detector circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0183809B1 (en) |
-
1995
- 1995-12-30 KR KR1019950069729A patent/KR0183809B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0183809B1 (en) | 1999-04-15 |
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20061128 Year of fee payment: 9 |
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