KR970053615A - Manufacturing Method of Flash Memory Device - Google Patents

Manufacturing Method of Flash Memory Device Download PDF

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Publication number
KR970053615A
KR970053615A KR1019950069484A KR19950069484A KR970053615A KR 970053615 A KR970053615 A KR 970053615A KR 1019950069484 A KR1019950069484 A KR 1019950069484A KR 19950069484 A KR19950069484 A KR 19950069484A KR 970053615 A KR970053615 A KR 970053615A
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KR
South Korea
Prior art keywords
flash memory
memory device
oxide film
manufacturing
interlayer insulating
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Application number
KR1019950069484A
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Korean (ko)
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KR0172727B1 (en
Inventor
박상훈
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1019950069484A priority Critical patent/KR0172727B1/en
Publication of KR970053615A publication Critical patent/KR970053615A/en
Application granted granted Critical
Publication of KR0172727B1 publication Critical patent/KR0172727B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

본 발명은 플래쉬 메모리 소자의 제조방법에 관한 것으로, 보다 구체적으로는 플래쉬 메모리 소자의 터널 산화막의 변형을 방지하여 소자의 프로그램밍 시간 및 소거 시간의 증가됨을 방지할 수 있는 플래쉬 메모리 소자의 제조방법에 관한 것으로, 본 발명에 따르면, 플래쉬 메모리 소자의 제조방법에 있어서, 플래쉬 메모리의 부유 게이트 전극과 제어 게이트 전극 사이에 개재되는 층간 절연막을 기존의 ONO 구조의 절연막 형태에서 열산화막 탄탈륨 산화막 열산화막으로 이루어진 3중막을 적어도 한 층이상 적층하므로서, Si-N 결합을 가진 긴장된 Si-O 결합의 보호에 의해 전자 트랩을 감소시킬 수 있으며, 이러한 구조의 막인 경우 수소가 적게 함유하고 있어서, 터널 산화막의 변이를 방지할 수 있고, 터널링 전류의 감소를 방지할 수 있어 소자의 프로그래밍 및 소거 시간이 증가되는 문제점을 배제하여 소자의 신뢰성을 크게 향상시킬 수 있다.The present invention relates to a method of manufacturing a flash memory device, and more particularly, to a method of manufacturing a flash memory device that can prevent an increase in programming time and erase time of a device by preventing deformation of a tunnel oxide layer of the flash memory device. According to the present invention, in the method of manufacturing a flash memory device, an interlayer insulating film interposed between a floating gate electrode and a control gate electrode of a flash memory comprises a thermal oxide film tantalum oxide thermal oxide film in the form of a conventional insulating film of ONO structure. By stacking at least one layer of the intermediate film, electron traps can be reduced by protecting the strained Si-O bonds having Si-N bonds, and in the case of such a structure, the hydrogen content is low, and thus the tunnel oxide film is prevented from shifting. Can prevent the reduction of tunneling current The reliability of the device can be greatly improved by eliminating the problem of increased graming and erase time.

Description

플래쉬 메모리 소자의 제조방법Manufacturing Method of Flash Memory Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 실시예 1에 따른 플래쉬 메모리 소자의 제조방법을 설명하기 위한 도면.2 is a view for explaining a method of manufacturing a flash memory device according to the first embodiment of the present invention.

Claims (4)

반도체 기판상에 터널 산화막, 부유 게이트 전극을 형성한 다음, 상층의 게이트 전극과의 절연을 위한 층간 절연막을 형성하고, 층간 절연막 상부에 제어 게이트 전극을 형성하는 단계를 포함하는 플래쉬 메모리 소자의 제조방법에 있어서, 상기 층간 절연막은 열산화막 - 탄탈륨 산화막 열산화막으로 이루어진 3중막을 적어도 한 층 이상 적층하여 형성하는 것을 특징으로 하는 플래쉬 메모리 소자의 제조방법.Forming a tunnel oxide film and a floating gate electrode on the semiconductor substrate, and then forming an interlayer insulating film for insulating the upper gate electrode, and forming a control gate electrode on the interlayer insulating film. The method of manufacturing a flash memory device according to claim 1, wherein the interlayer insulating film is formed by laminating at least one triple layer consisting of a thermal oxide film-a tantalum oxide film and a thermal oxide film. 제1항에 있어서, 상기 층간 절연막중 탄탈륨 산화막의 증착 방식은 오존(O3) 가스 및 Ta(C2H5O)5유기물을 원료로 하여 약 300 내지 500℃, 200 내지 500 watt, 400 내지 1000mTorr 및 13.56MHz의 반응 에너지를 인가하여 플라즈마 보조 화학 기상 증착 방식에 의하여 형성하는 것을 특징으로 하는 플래쉬 메모리 소자의 제조방법.The method of claim 1, wherein the deposition method of the tantalum oxide film in the interlayer insulating film is made from about 300 to 500 ° C, 200 to 500 watts, 400 to 500 ozone (O 3 ) gas and Ta (C 2 H 5 O) 5 organic material as a raw material. A method of manufacturing a flash memory device, characterized in that formed by a plasma assisted chemical vapor deposition method by applying a reaction energy of 1000mTorr and 13.56MHz. 제1항에 있어서, 상기 층간 절연막중 탄탈륨 산화막의 증착 방식은 N2O가스와 Ta(C2H5O)5유기물을 원료로 하여 약 300 내지 500℃, 200 내지 500 watt 및 13.56MHz의 반응 에너지를 인가하여 플라즈마 보조 화학 기상 증착 방식에 의하여 형성하는 것을 특징으로 하는 플래쉬 메모리 소자의 제조방법.The method of claim 1, wherein the deposition method of the tantalum oxide film in the interlayer insulating film is a reaction of about 300 to 500 ℃, 200 to 500 watt and 13.56 MHz using N 2 O gas and Ta (C 2 H 5 O) 5 organic material as a raw material A method of manufacturing a flash memory device comprising applying energy to form the plasma assisted chemical vapor deposition method. 제1항에 있어서, 상기 층간 절연막의 증착공정이후, 연속적으로 약 700 내지 900℃ UV - 오존 및 건식 O2으로 어닐링하는 것을 특징으로 하는 플래쉬 메모리 소자의 제조방법.The method of claim 1, wherein after the deposition of the interlayer insulating layer, annealing is performed continuously at about 700 to 900 ° C. in UV − ozone and dry O 2 . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950069484A 1995-12-30 1995-12-30 Method for manufacturing semiconductor device KR0172727B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950069484A KR0172727B1 (en) 1995-12-30 1995-12-30 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950069484A KR0172727B1 (en) 1995-12-30 1995-12-30 Method for manufacturing semiconductor device

Publications (2)

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KR970053615A true KR970053615A (en) 1997-07-31
KR0172727B1 KR0172727B1 (en) 1999-03-30

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010078525A (en) * 1999-12-30 2001-08-21 박종섭 Method for manufacturing gate eletrode of EEPROM flash memory
KR100351450B1 (en) * 1999-12-30 2002-09-09 주식회사 하이닉스반도체 Non-volatile memory device and method for fabricating the same
KR100702799B1 (en) * 2003-12-31 2007-04-03 동부일렉트로닉스 주식회사 flash memory device
KR100852598B1 (en) * 2006-12-23 2008-08-14 동부일렉트로닉스 주식회사 Method for fabricating flash memory device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100673187B1 (en) * 2000-06-20 2007-01-22 주식회사 하이닉스반도체 Method of manufacturing a capacitor
KR102443695B1 (en) 2015-08-25 2022-09-15 삼성전자주식회사 Method of manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010078525A (en) * 1999-12-30 2001-08-21 박종섭 Method for manufacturing gate eletrode of EEPROM flash memory
KR100351450B1 (en) * 1999-12-30 2002-09-09 주식회사 하이닉스반도체 Non-volatile memory device and method for fabricating the same
KR100702799B1 (en) * 2003-12-31 2007-04-03 동부일렉트로닉스 주식회사 flash memory device
KR100852598B1 (en) * 2006-12-23 2008-08-14 동부일렉트로닉스 주식회사 Method for fabricating flash memory device

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Publication number Publication date
KR0172727B1 (en) 1999-03-30

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