KR970053536A - Metal wiring of semiconductor device - Google Patents

Metal wiring of semiconductor device Download PDF

Info

Publication number
KR970053536A
KR970053536A KR1019950054643A KR19950054643A KR970053536A KR 970053536 A KR970053536 A KR 970053536A KR 1019950054643 A KR1019950054643 A KR 1019950054643A KR 19950054643 A KR19950054643 A KR 19950054643A KR 970053536 A KR970053536 A KR 970053536A
Authority
KR
South Korea
Prior art keywords
film
metal wiring
metal
layer
semiconductor device
Prior art date
Application number
KR1019950054643A
Other languages
Korean (ko)
Inventor
전상호
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950054643A priority Critical patent/KR970053536A/en
Publication of KR970053536A publication Critical patent/KR970053536A/en

Links

Abstract

본 발명은 반도체 확산방지막, 금속배선막, 반사방지막이 순차적으로 적층된 삼층구조의 금속배선을 제공하는 것을 목적으로 한다.An object of the present invention is to provide a three-layer metal wiring in which a semiconductor diffusion barrier film, a metal wiring film, and an antireflection film are sequentially stacked.

이와 같은 목적을 달성하기 위한 반도체 소자의 금속배선은 하부 절연층으로의 금속배선원자의 확산을 방지하기 위한 확산방지막과 상기 확산방지막 위의 중간 금속막과, 상기 중간 금속막 위에서 금속배선막의 패턴 형성을 위하여 도포된 감광막의 노광시 상기 중간 금속막에서의 빛의 반사를 방지하기 위한 반사 방지막의 삼층구조로 이루어진 금속배선에 있어서, 상기 중간 금속막이 알루미늄과 스칸듐의 합금으로 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선.In order to achieve the above object, the metal wiring of the semiconductor device may include a diffusion barrier layer for preventing diffusion of metal wiring atoms into a lower insulating layer, an intermediate metal layer on the diffusion barrier layer, and a pattern of a metal interconnection layer on the intermediate metal layer. In the metal wiring consisting of a three-layer structure of the antireflection film for preventing the reflection of light in the intermediate metal film during exposure of the photosensitive film applied for the purpose, the semiconductor device, characterized in that the intermediate metal film is made of an alloy of aluminum and scandium Metal wiring.

Description

반도체 소자의 금속배선Metal wiring of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 실시예에 따른 금속배선의 형성방법을 설명하기 위한 공정 흐름도이다.2 is a flowchart illustrating a method of forming a metal wiring according to an embodiment of the present invention.

Claims (5)

하부 절연층으로의 금속배선원자의 확산을 방지하기 위한 확산방지막과 상기 확산방지막 위의 중간 금속막과, 상기 중간 금속막 위에서 금속배선막의 패턴 형성을 위하여 도포된 감광막의 노광시 상기 중간 금속막에서의 빛의 반사를 방지하기 위한 반사 방지막의 삼층구조로 이루어진 반도체 소자의 금속배선에 있어서, 상기 중간 금속막이 알루미늄과 소칸듐의 합금으로 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선.In the intermediate metal film during exposure of the diffusion barrier film to prevent the diffusion of the metal wiring atoms to the lower insulating layer, the intermediate metal film on the diffusion barrier film, and the photosensitive film coated for the pattern formation of the metal wiring film on the intermediate metal film A metal wiring of a semiconductor device having a three-layer structure of an anti-reflection film for preventing light reflection, wherein the intermediate metal film is made of an alloy of aluminum and socandium. 제1항에 있어서, 상기 확산방지막은 Ti, TiW, TiN중 하나 또는 둘이상이 적층된 것을 특징으로 하는 반도체 소자의 금속배선.2. The metallization of claim 1, wherein the diffusion barrier layer is formed by stacking one or more of Ti, TiW, and TiN. 제1항에 있어서, 상기 반사방지막은 TiW, TiN중 하나 또는 두 가지 물질이 적층된 것을 특징으로 하는 반도체 소자의 금속배선.2. The metallization of claim 1, wherein the anti-reflection film is formed by stacking one or two materials of TiW and TiN. 하부 전도층과의 전기적인 연결을 위하여 절연층 위에 형성된 제1금속막과 상기 제1금속막의 패턴 형성시 상기 제1금속막에 의한 감광막의 반사를 방지하기 위한 반사 방지막의 이층구조로 이루어진 반도체 소자의 금속배선에 있어서, 상기 제1금속막이 알루미늄과 스칸듐의 합금으로 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선.A semiconductor device having a two-layer structure of a first metal film formed on an insulating layer for electrical connection with a lower conductive layer and an anti-reflection film for preventing reflection of the photosensitive film by the first metal film when forming the pattern of the first metal film. The metal wiring of a semiconductor device according to claim 2, wherein the first metal film is made of an alloy of aluminum and scandium. 제4항에 있어서, 상기 반사방지막은 TiW, TiN중 하나 또는 두 가지 물질이 적층된 것을 특징으로 하는 반도체 소자의 금속배선.The metal wiring of claim 4, wherein the anti-reflection film is formed by stacking one or two materials of TiW and TiN. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950054643A 1995-12-22 1995-12-22 Metal wiring of semiconductor device KR970053536A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950054643A KR970053536A (en) 1995-12-22 1995-12-22 Metal wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950054643A KR970053536A (en) 1995-12-22 1995-12-22 Metal wiring of semiconductor device

Publications (1)

Publication Number Publication Date
KR970053536A true KR970053536A (en) 1997-07-31

Family

ID=66617550

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950054643A KR970053536A (en) 1995-12-22 1995-12-22 Metal wiring of semiconductor device

Country Status (1)

Country Link
KR (1) KR970053536A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020011122A (en) * 2000-07-31 2002-02-07 가네꼬 히사시 Semiconductor device and manufacturing process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020011122A (en) * 2000-07-31 2002-02-07 가네꼬 히사시 Semiconductor device and manufacturing process

Similar Documents

Publication Publication Date Title
KR920015527A (en) Semiconductor device
KR970053536A (en) Metal wiring of semiconductor device
KR890005845A (en) Aluminum Alloy Semiconductor Device Having Barrier Layer and Manufacturing Method Thereof
KR970052332A (en) Metal wiring formation method of semiconductor device
KR970052243A (en) Metal wiring formation method of semiconductor device
KR100456317B1 (en) Method for forming multilayer metal interconnection of semiconductor device to improve via contact characteristic
KR950021425A (en) How to Form Multilayer Metal Wiring
KR970053590A (en) Manufacturing Method of Semiconductor Device
KR960002667A (en) Multi-layer metal film formation method
KR940016870A (en) Metal wiring formation method of semiconductor device
KR970053581A (en) Method of forming multi-layered metal wiring of semiconductor device
KR970052186A (en) Semiconductor device manufacturing method
KR980005599A (en) Semiconductor device manufacturing method
KR980005596A (en) Method for forming a metal contact of a semiconductor device
KR970052256A (en) How to Form Via Holes
KR970024008A (en) An interconnection layer structure of a semiconductor device
KR980005531A (en) METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR
KR970008490A (en) Semiconductor device having multi-layered wiring and manufacturing method
KR980005548A (en) METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR
KR950019931A (en) Metal wiring formation method of semiconductor device
KR930003343A (en) Metal wiring layer formation method of multilayer wiring structure
KR970053543A (en) Semiconductor device with multilayer metal film
KR970063673A (en) Method of forming metal wiring
KR950015644A (en) Metal wiring formation method
KR970052431A (en) Metal wiring formation method of semiconductor device

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination