KR970052797A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR970052797A
KR970052797A KR1019950050456A KR19950050456A KR970052797A KR 970052797 A KR970052797 A KR 970052797A KR 1019950050456 A KR1019950050456 A KR 1019950050456A KR 19950050456 A KR19950050456 A KR 19950050456A KR 970052797 A KR970052797 A KR 970052797A
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KR
South Korea
Prior art keywords
metal
forming
semiconductor device
metal wiring
layer
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KR1019950050456A
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Korean (ko)
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KR100329609B1 (en
Inventor
박홍락
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김주용
현대전자산업 주식회사
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Priority to KR1019950050456A priority Critical patent/KR100329609B1/en
Publication of KR970052797A publication Critical patent/KR970052797A/en
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Publication of KR100329609B1 publication Critical patent/KR100329609B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 제조방법에 관한 것으로,고집적 반도체 소자의 제조공정에 있어서 반도체 소자 다이(Die)최외곽면에 노출되어 있는 평탄화 절연막인 SOG나 Polyimide면을 금속박막으로 막음으로써 대기에 노출된 흡습성이 강한 평탄화 절연막을 통해 반도체 소자 내부로의 수분침투를 방지하여 소자의 특성저하를 예방할 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in the manufacturing process of a highly integrated semiconductor device, the SOG or polyimide surface, which is a planarization insulating film exposed on the outermost surface of a semiconductor device die, is blocked with a metal thin film to expose to the atmosphere. It is possible to prevent deterioration of device characteristics by preventing moisture penetration into the semiconductor device through the planarization insulating layer having high hygroscopicity.

Description

반도체 소자의 제조방법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 다층금속배선 구조의 단면도.2 is a cross-sectional view of a multi-layered metal wiring structure according to the present invention.

Claims (5)

실리콘 기판상부에 하부 절연막과 제1금속배선을 차례로 형성하는 단계와, 상기 제1금속배선 상부에 제1절연막을 형성하는 단계와, 상기 제1절연막 상부에 평탄화 절연막을 형성하는 단계와, 전체구조 상부에 제2절연막을 형성하는 단계와, 상기 제1금속배선의 상부에 위치한 상기 제2절연막과 평탄화 절연막 및 제1절연막을 차례로 식각하여 콘택홀을 형성하는 단계와, 상기 전체구조 상부에 제2금속층을 형성하는 단계와, 상기 제2금속층을 노광 및 식각하여 제2금속배선을 형성하는 단계를 구비하는 반도체 소자의 제조방법에 있어서, 상기 제2금속배선 형성을 위한 제2금속층 식각시, 반도체 소자 다이 외곽변에 위치한 부위의 금속은 식각되지 않고 금속 보호막으로 잔류시켜 상기 평탄화 절연막을 통한 수분의 흡수를 차단시키는 것을 특징으로 하는 반도체 소자의 제조방법.Forming a lower insulating film and a first metal wiring on the silicon substrate in order, forming a first insulating film on the first metal wiring, forming a planarizing insulating film on the first insulating film, and overall structure Forming a contact hole by sequentially forming a second insulating layer on the upper surface, etching the second insulating layer, the planarization insulating layer, and the first insulating layer on the first metal wiring in order, and forming a contact hole on the entire structure; A method of manufacturing a semiconductor device, comprising: forming a metal layer, and exposing and etching the second metal layer to form a second metal wiring, wherein the semiconductor metal is etched when the second metal layer is etched to form the second metal wiring. The metal in the portion located outside the device die is not etched and remains as a metal protective film to block absorption of moisture through the planarization insulating film. Method of manufacturing a semiconductor device. 제1항에 있어서, 상기 평탄화 절연막은 흡습성이 큰 SOG또는 Polyimide같은 재료로 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the planarization insulating layer is formed of a material such as SOG or polyimide having high hygroscopicity. 제1항에 있어서, 상기 제2금속배선 재료는 알루미늄, 타이타늄, 타이타늄 나이트라이드, 텅스텐중 어느 하나인 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the second metal wiring material is any one of aluminum, titanium, titanium nitride, and tungsten. 제1항에 있어서, 상기 제2금속배선 형성시 금속입자를 물리증착법이나 화학증착법으로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the metal particles are formed by physical vapor deposition or chemical vapor deposition during the formation of the second metal wiring. 제1항에 있어서, 상기 금속 보호막의 형성은 3층이상의 다층배선 공정에서 최고층 금속배선 형성공정에서 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the metal protective film is formed in a top metal wiring forming step in a multi-layer wiring process of three or more layers. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950050456A 1995-12-15 1995-12-15 Method for manufacturing semiconductor device KR100329609B1 (en)

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KR1019950050456A KR100329609B1 (en) 1995-12-15 1995-12-15 Method for manufacturing semiconductor device

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KR1019950050456A KR100329609B1 (en) 1995-12-15 1995-12-15 Method for manufacturing semiconductor device

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KR970052797A true KR970052797A (en) 1997-07-29
KR100329609B1 KR100329609B1 (en) 2002-11-07

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