KR970049422A - Hardware device for soaking and recording operation of video signal - Google Patents
Hardware device for soaking and recording operation of video signal Download PDFInfo
- Publication number
- KR970049422A KR970049422A KR1019950048326A KR19950048326A KR970049422A KR 970049422 A KR970049422 A KR 970049422A KR 1019950048326 A KR1019950048326 A KR 1019950048326A KR 19950048326 A KR19950048326 A KR 19950048326A KR 970049422 A KR970049422 A KR 970049422A
- Authority
- KR
- South Korea
- Prior art keywords
- output
- outputting
- signal
- data
- value
- Prior art date
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T5/00—Image enhancement or restoration
- G06T5/20—Image enhancement or restoration by the use of local operators
- G06T5/30—Erosion or dilatation, e.g. thinning
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
Abstract
본 발명은 영상신호의 불림연산, 녹임연산 등의 수리형태학 연산을 수행하기 위한 하드웨어장치에 관한 것으로, 영상신호 및 그에 원점대칭되는 형태소를 서로 더한 값을 출력하기 위한 복수의 가산수단; 상기 복수의 가산수단에서 출력되는 신호를 일시적으로 저장하기 위한 복수의 저장수단; 상기 복수의 저장수단에 저장된 데이타, 및 궤환된 데이타를 비교하여 가장 큰 값을 출력하기 위한 비교수단; 및 하나의 영상신호를 위한 모든 형태소에 대한 불림연산이 완료되면 상기 비교수단의 출력신호를 불림연산값으로 출력하고, 그렇지 않으면 상기 비교수단의 출력신호를 다시 상기 비교수단의 입력데이타로 궤환시키기 위한 출력수단을 포함함을 특징으로 한다.The present invention relates to a hardware device for performing mathematical morphological operations, such as summation operation, greening operation, etc. of an image signal, comprising: a plurality of addition means for outputting a value obtained by adding an image signal and morphemes symmetric to its origin; A plurality of storage means for temporarily storing the signals output from the plurality of addition means; Comparison means for comparing the data stored in the plurality of storage means and the feedback data to output the largest value; And outputting the output signal of the comparison means as a Boolean calculation value when the summation operation for all the morphemes for one image signal is completed; otherwise, for outputting the output signal of the comparison means back to the input data of the comparison means. It characterized in that it comprises an output means.
본 발명은 그레이-레벨 영상을 가산기를 이용하여 최대값/최소값을 찾아냄으로써 간단한 산술연산으로 기본연산자인 볼림과 녹임을 구현할 수 있으며, 궤환구조로 구성함으로써 형태소의 크기가 기하급수적으로 증가한다 하더라도 그를 위한 하드웨어는 선형적으로 증가할 뿐이다.The present invention can realize the basic operators Bolim and Melt by simple arithmetic operation by finding the maximum value / minimum value using the gray-level image adder. Even though the size of the morpheme increases exponentially, The hardware for this will only increase linearly.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 의한 3×3 형태소에 대한 다른 불림연산장치의 구성도를 도시한 도면,1 is a diagram showing the configuration of another Boolean calculation device for 3 × 3 morphemes according to the present invention;
제2도는 본 발명에 의한 3×3 형태소에 대한 다른 불림연산장치의 구성을 도시한 도면,2 is a diagram showing the configuration of another apparatus for computing 3 × 3 morphemes according to the present invention;
제3도는 제1도 또는 제2도에 도시된 불림연산장치에 사용된 비교기의 구성도를 도시한 도면.FIG. 3 is a diagram showing the configuration of a comparator used in the Boolean calculation apparatus shown in FIG. 1 or FIG.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950048326A KR100202847B1 (en) | 1995-12-11 | 1995-12-11 | Hardware apparatus for dilation and erosion transformation of image |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950048326A KR100202847B1 (en) | 1995-12-11 | 1995-12-11 | Hardware apparatus for dilation and erosion transformation of image |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970049422A true KR970049422A (en) | 1997-07-29 |
KR100202847B1 KR100202847B1 (en) | 1999-06-15 |
Family
ID=19439011
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950048326A KR100202847B1 (en) | 1995-12-11 | 1995-12-11 | Hardware apparatus for dilation and erosion transformation of image |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100202847B1 (en) |
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1995
- 1995-12-11 KR KR1019950048326A patent/KR100202847B1/en not_active IP Right Cessation
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Publication number | Publication date |
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KR100202847B1 (en) | 1999-06-15 |
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