KR970032203A - State Management Method of Main Processor in Electronic Switching System - Google Patents

State Management Method of Main Processor in Electronic Switching System Download PDF

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Publication number
KR970032203A
KR970032203A KR1019950046474A KR19950046474A KR970032203A KR 970032203 A KR970032203 A KR 970032203A KR 1019950046474 A KR1019950046474 A KR 1019950046474A KR 19950046474 A KR19950046474 A KR 19950046474A KR 970032203 A KR970032203 A KR 970032203A
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KR
South Korea
Prior art keywords
main processor
processor
status report
main
predetermined time
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Application number
KR1019950046474A
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Korean (ko)
Inventor
박성배
Original Assignee
유기범
대우통신 주식회사
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Publication date
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Priority to KR1019950046474A priority Critical patent/KR970032203A/en
Publication of KR970032203A publication Critical patent/KR970032203A/en

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Abstract

본 메인프로세서의 상태관리방법은 전전자 교환기에 있어서 운용유지보수 프로세서가 구비되어 있는 각각의 메인프로세서에 대한 상태체크시, 프로세서간 통신(IPC)송수신 갯수를 줄여 상대적으로 메인프로세서상태관리를 위한 운용유지보수 프로세서의 부하를 줄이기 위한 것으로써, 본 방법은 운용유지보수 프로세서의 로딩이 완료된 후, 제 1 소정시간동안 구비되어 있는 다수의 메인 프로세서로 부터 상태보고 신호가 송출되었는 지를 체크하는 단계; 체크결과, 자신의 상태보고 신호를 송출한 메인 프로세서에 대해서는 정상처리를 하는 단계;체크결과, 자신의 상태보고 신호를 송출하지 않은 메인프로세서에 대해서 운용유지보수 프로세서가 상태보고 요구를 하는 단계; 제 2소정 시간동안 상태보고 요구에 대한 응답을 한 메인 프로세서에 대해서는 정상처리를 하는 단계; 제 2 소정 시간동안 상태보고 요구에 대한 응답을 하지 않은 메인 프로세서에 대해서는 비정상처리를 하는 단계로 이루어진다.The state management method of this main processor reduces the number of inter-processor communication (IPC) transmission and reception at the state check for each main processor equipped with an operation maintenance processor in an electronic switch, and operates for relatively main processor state management. In order to reduce the load on the maintenance processor, the method includes: checking whether a status report signal has been sent from a plurality of main processors provided for a first predetermined time after loading of the operation maintenance processor is completed; Checking the main processor that has sent its status report signal as a result of normal processing; checking the status by the operation maintenance processor for the main processor which has not sent its status report signal; Performing normal processing on the main processor which has responded to the status report request for a second predetermined time; An abnormal process is performed for the main processor that has not responded to the status report request for the second predetermined time.

Description

전전자 교환기에 있어서 메인프로세서의 상태관리 방법State Management Method of Main Processor in Electronic Switching System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 전전자 교환기에 있어서 프로세서간 통신(IPC)망 구성도.1 is a block diagram of an interprocessor communication (IPC) network in an electronic switching system.

제 3 도는 본 발명에 따른 메인 프로세서의 상태관리방법에 대한 흐름도.3 is a flowchart illustrating a state management method of a main processor according to the present invention.

Claims (3)

운용유지보수프로세서(OMP)와 다수의 메인프로세어(MP)를 구비한 전전자 교환기에서 상기 메인 프로세서의 상태관리방법에 있어서, 상기운용유지보수 프로세서의 로딩이 완료된 후, 제 1소정시간동안 상기 구비되어 있는 다수의 메인 프러세서로 부터 상태보고 신호가 송출되었는 지를 체크하는 단계; 상기 체크결과, 자신의 상태보고 신호를 송출한 메인프로세서에 대해서는 정상처리를 하는 단계; 상기 체크결과, 자신의 상태보고 신호를 송출하지 않은 메인프로세서에 대해서 상기 운용유지보수 프로세서가 상태보고 요구를 하는 단계; 제 2 소정시간동안 상기 상태보고 요구에 대한 응답을 한 메인 프로세서에 대해서는 상기 정상처리를 하는 단계; 상기 제 2소정시간동안 상기 상태보고 요구에 대한 응답을 하지 않은 메인 프로세서에 대해서는 비정상처리를 하는 단계를 포함함을 특징으로 하는 전전자 교환기에 있어서 메인프로세서의 상태관리방법.In a method for managing a state of the main processor in an electronic switch having an operation maintenance processor (OMP) and a plurality of main processors (MP), the loading of the operation maintenance processor is completed during the first predetermined time. Checking whether a status report signal is transmitted from a plurality of main processors; Performing normal processing on the main processor that has sent its status report signal as a result of the check; The operation maintenance processor making a status report request to the main processor which has not sent its status report signal as a result of the check; Performing normal processing on a main processor which has responded to the status report request for a second predetermined time; And performing abnormality processing on the main processor that has not responded to the status report request for the second predetermined time. 제 1 항에 있어서, 상기 메인 프로세서에 대한 상태관리는 주기적으로 상술한 단계들을 반복하면서 이루어짐을 특징으로 하는 전전자 교환기에 있어서 메인프로세서의 상태관리방법.The method of claim 1, wherein the state management of the main processor is performed by periodically repeating the above-described steps. 제 1항에 있어서, 상기 제 소정시간은 상기 메인 프로세서가 로딩한 후, 자신의 상태를 보고하는데 소요되는 시간을 고려하여 설정됨을 특징으로 하는 전전자 교환기에 있어서 메인프로세서의 상태관리방법.The method of claim 1, wherein the predetermined time is set in consideration of the time required to report a state of the main processor after the main processor is loaded. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950046474A 1995-11-30 1995-11-30 State Management Method of Main Processor in Electronic Switching System KR970032203A (en)

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Application Number Priority Date Filing Date Title
KR1019950046474A KR970032203A (en) 1995-11-30 1995-11-30 State Management Method of Main Processor in Electronic Switching System

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Application Number Priority Date Filing Date Title
KR1019950046474A KR970032203A (en) 1995-11-30 1995-11-30 State Management Method of Main Processor in Electronic Switching System

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KR970032203A true KR970032203A (en) 1997-06-26

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100464352B1 (en) * 2002-08-16 2005-01-03 삼성전자주식회사 Loading apparatus and method for preventing an overload of an operation and maintenance processor in a mobile switching center

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100464352B1 (en) * 2002-08-16 2005-01-03 삼성전자주식회사 Loading apparatus and method for preventing an overload of an operation and maintenance processor in a mobile switching center

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